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12#ifndef HW_VFIO_VFIO_PCI_H
13#define HW_VFIO_VFIO_PCI_H
14
15#include "qemu-common.h"
16#include "exec/memory.h"
17#include "hw/pci/pci.h"
18#include "hw/vfio/vfio-common.h"
19#include "qemu/event_notifier.h"
20#include "qemu/queue.h"
21#include "qemu/timer.h"
22
23#define PCI_ANY_ID (~0)
24
25struct VFIOPCIDevice;
26
27typedef struct VFIOQuirk {
28 QLIST_ENTRY(VFIOQuirk) next;
29 void *data;
30 int nr_mem;
31 MemoryRegion *mem;
32} VFIOQuirk;
33
34typedef struct VFIOBAR {
35 VFIORegion region;
36 bool ioport;
37 bool mem64;
38 QLIST_HEAD(, VFIOQuirk) quirks;
39} VFIOBAR;
40
41typedef struct VFIOVGARegion {
42 MemoryRegion mem;
43 off_t offset;
44 int nr;
45 QLIST_HEAD(, VFIOQuirk) quirks;
46} VFIOVGARegion;
47
48typedef struct VFIOVGA {
49 off_t fd_offset;
50 int fd;
51 VFIOVGARegion region[QEMU_PCI_VGA_NUM_REGIONS];
52} VFIOVGA;
53
54typedef struct VFIOINTx {
55 bool pending;
56 bool kvm_accel;
57 uint8_t pin;
58 EventNotifier interrupt;
59 EventNotifier unmask;
60 PCIINTxRoute route;
61 uint32_t mmap_timeout;
62 QEMUTimer *mmap_timer;
63} VFIOINTx;
64
65typedef struct VFIOMSIVector {
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74
75 EventNotifier interrupt;
76 EventNotifier kvm_interrupt;
77 struct VFIOPCIDevice *vdev;
78 int virq;
79 bool use;
80} VFIOMSIVector;
81
82enum {
83 VFIO_INT_NONE = 0,
84 VFIO_INT_INTx = 1,
85 VFIO_INT_MSI = 2,
86 VFIO_INT_MSIX = 3,
87};
88
89
90typedef struct VFIOMSIXInfo {
91 uint8_t table_bar;
92 uint8_t pba_bar;
93 uint16_t entries;
94 uint32_t table_offset;
95 uint32_t pba_offset;
96 MemoryRegion mmap_mem;
97 void *mmap;
98 unsigned long *pending;
99} VFIOMSIXInfo;
100
101typedef struct VFIOPCIDevice {
102 PCIDevice pdev;
103 VFIODevice vbasedev;
104 VFIOINTx intx;
105 unsigned int config_size;
106 uint8_t *emulated_config_bits;
107 off_t config_offset;
108 unsigned int rom_size;
109 off_t rom_offset;
110 void *rom;
111 int msi_cap_size;
112 VFIOMSIVector *msi_vectors;
113 VFIOMSIXInfo *msix;
114 int nr_vectors;
115 int interrupt;
116 VFIOBAR bars[PCI_NUM_REGIONS - 1];
117 VFIOVGA *vga;
118 void *igd_opregion;
119 PCIHostDeviceAddress host;
120 EventNotifier err_notifier;
121 EventNotifier req_notifier;
122 int (*resetfn)(struct VFIOPCIDevice *);
123 uint32_t vendor_id;
124 uint32_t device_id;
125 uint32_t sub_vendor_id;
126 uint32_t sub_device_id;
127 uint32_t features;
128#define VFIO_FEATURE_ENABLE_VGA_BIT 0
129#define VFIO_FEATURE_ENABLE_VGA (1 << VFIO_FEATURE_ENABLE_VGA_BIT)
130#define VFIO_FEATURE_ENABLE_REQ_BIT 1
131#define VFIO_FEATURE_ENABLE_REQ (1 << VFIO_FEATURE_ENABLE_REQ_BIT)
132#define VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT 2
133#define VFIO_FEATURE_ENABLE_IGD_OPREGION \
134 (1 << VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT)
135 int32_t bootindex;
136 uint32_t igd_gms;
137 uint8_t pm_cap;
138 uint8_t nv_gpudirect_clique;
139 bool pci_aer;
140 bool req_enabled;
141 bool has_flr;
142 bool has_pm_reset;
143 bool rom_read_failed;
144 bool no_kvm_intx;
145 bool no_kvm_msi;
146 bool no_kvm_msix;
147} VFIOPCIDevice;
148
149uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
150void vfio_pci_write_config(PCIDevice *pdev,
151 uint32_t addr, uint32_t val, int len);
152
153uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size);
154void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size);
155
156bool vfio_blacklist_opt_rom(VFIOPCIDevice *vdev);
157void vfio_vga_quirk_setup(VFIOPCIDevice *vdev);
158void vfio_vga_quirk_exit(VFIOPCIDevice *vdev);
159void vfio_vga_quirk_finalize(VFIOPCIDevice *vdev);
160void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr);
161void vfio_bar_quirk_exit(VFIOPCIDevice *vdev, int nr);
162void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr);
163void vfio_setup_resetfn_quirk(VFIOPCIDevice *vdev);
164int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp);
165
166extern const PropertyInfo qdev_prop_nv_gpudirect_clique;
167
168int vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp);
169
170int vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev,
171 struct vfio_region_info *info,
172 Error **errp);
173
174#endif
175