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30#ifndef QEMU_ARM_VIRT_H
31#define QEMU_ARM_VIRT_H
32
33#include "qemu-common.h"
34#include "exec/hwaddr.h"
35#include "qemu/notify.h"
36#include "hw/boards.h"
37#include "hw/arm/arm.h"
38
39#define NUM_GICV2M_SPIS 64
40#define NUM_VIRTIO_TRANSPORTS 32
41
42#define ARCH_GICV3_MAINT_IRQ 9
43
44#define ARCH_TIMER_VIRT_IRQ 11
45#define ARCH_TIMER_S_EL1_IRQ 13
46#define ARCH_TIMER_NS_EL1_IRQ 14
47#define ARCH_TIMER_NS_EL2_IRQ 10
48
49#define VIRTUAL_PMU_IRQ 7
50
51#define PPI(irq) ((irq) + 16)
52
53enum {
54 VIRT_FLASH,
55 VIRT_MEM,
56 VIRT_CPUPERIPHS,
57 VIRT_GIC_DIST,
58 VIRT_GIC_CPU,
59 VIRT_GIC_V2M,
60 VIRT_GIC_ITS,
61 VIRT_GIC_REDIST,
62 VIRT_UART,
63 VIRT_MMIO,
64 VIRT_RTC,
65 VIRT_FW_CFG,
66 VIRT_PCIE,
67 VIRT_PCIE_MMIO,
68 VIRT_PCIE_PIO,
69 VIRT_PCIE_ECAM,
70 VIRT_PLATFORM_BUS,
71 VIRT_PCIE_MMIO_HIGH,
72 VIRT_GPIO,
73 VIRT_SECURE_UART,
74 VIRT_SECURE_MEM,
75};
76
77typedef struct MemMapEntry {
78 hwaddr base;
79 hwaddr size;
80} MemMapEntry;
81
82typedef struct {
83 MachineClass parent;
84 bool disallow_affinity_adjustment;
85 bool no_its;
86 bool no_pmu;
87 bool claim_edge_triggered_timers;
88} VirtMachineClass;
89
90typedef struct {
91 MachineState parent;
92 Notifier machine_done;
93 FWCfgState *fw_cfg;
94 bool secure;
95 bool highmem;
96 bool its;
97 bool virt;
98 int32_t gic_version;
99 struct arm_boot_info bootinfo;
100 const MemMapEntry *memmap;
101 const int *irqmap;
102 int smp_cpus;
103 void *fdt;
104 int fdt_size;
105 uint32_t clock_phandle;
106 uint32_t gic_phandle;
107 uint32_t msi_phandle;
108 int psci_conduit;
109} VirtMachineState;
110
111#define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
112#define VIRT_MACHINE(obj) \
113 OBJECT_CHECK(VirtMachineState, (obj), TYPE_VIRT_MACHINE)
114#define VIRT_MACHINE_GET_CLASS(obj) \
115 OBJECT_GET_CLASS(VirtMachineClass, obj, TYPE_VIRT_MACHINE)
116#define VIRT_MACHINE_CLASS(klass) \
117 OBJECT_CLASS_CHECK(VirtMachineClass, klass, TYPE_VIRT_MACHINE)
118
119void virt_acpi_setup(VirtMachineState *vms);
120
121#endif
122