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21#include "qemu/osdep.h"
22#include "qapi/error.h"
23#include "hw/intc/arm_gicv3_its_common.h"
24#include "sysemu/sysemu.h"
25#include "sysemu/kvm.h"
26#include "kvm_arm.h"
27#include "migration/blocker.h"
28
29#define TYPE_KVM_ARM_ITS "arm-its-kvm"
30#define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_ITS)
31
32static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t devid)
33{
34 struct kvm_msi msi;
35
36 if (unlikely(!s->translater_gpa_known)) {
37 MemoryRegion *mr = &s->iomem_its_translation;
38 MemoryRegionSection mrs;
39
40 mrs = memory_region_find(mr, 0, 1);
41 memory_region_unref(mrs.mr);
42 s->gits_translater_gpa = mrs.offset_within_address_space + 0x40;
43 s->translater_gpa_known = true;
44 }
45
46 msi.address_lo = extract64(s->gits_translater_gpa, 0, 32);
47 msi.address_hi = extract64(s->gits_translater_gpa, 32, 32);
48 msi.data = le32_to_cpu(value);
49 msi.flags = KVM_MSI_VALID_DEVID;
50 msi.devid = devid;
51 memset(msi.pad, 0, sizeof(msi.pad));
52
53 return kvm_vm_ioctl(kvm_state, KVM_SIGNAL_MSI, &msi);
54}
55
56
57
58
59
60
61
62static void vm_change_state_handler(void *opaque, int running,
63 RunState state)
64{
65 GICv3ITSState *s = (GICv3ITSState *)opaque;
66 Error *err = NULL;
67
68 if (running) {
69 return;
70 }
71
72 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
73 KVM_DEV_ARM_ITS_SAVE_TABLES, NULL, true, &err);
74 if (err) {
75 error_report_err(err);
76 }
77}
78
79static void kvm_arm_its_realize(DeviceState *dev, Error **errp)
80{
81 GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
82 Error *local_err = NULL;
83
84 s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_ITS, false);
85 if (s->dev_fd < 0) {
86 error_setg_errno(errp, -s->dev_fd, "error creating in-kernel ITS");
87 return;
88 }
89
90
91 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
92 KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort);
93
94
95 kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
96 KVM_VGIC_ITS_ADDR_TYPE, s->dev_fd);
97
98 gicv3_its_init_mmio(s, NULL);
99
100 if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
101 GITS_CTLR)) {
102 error_setg(&s->migration_blocker, "This operating system kernel "
103 "does not support vITS migration");
104 migrate_add_blocker(s->migration_blocker, &local_err);
105 if (local_err) {
106 error_propagate(errp, local_err);
107 error_free(s->migration_blocker);
108 return;
109 }
110 } else {
111 qemu_add_vm_change_state_handler(vm_change_state_handler, s);
112 }
113
114 kvm_msi_use_devid = true;
115 kvm_gsi_direct_mapping = false;
116 kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled();
117}
118
119
120
121
122
123
124
125static void kvm_arm_its_pre_save(GICv3ITSState *s)
126{
127 int i;
128
129 for (i = 0; i < 8; i++) {
130 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
131 GITS_BASER + i * 8, &s->baser[i], false,
132 &error_abort);
133 }
134
135 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
136 GITS_CTLR, &s->ctlr, false, &error_abort);
137
138 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
139 GITS_CBASER, &s->cbaser, false, &error_abort);
140
141 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
142 GITS_CREADR, &s->creadr, false, &error_abort);
143
144 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
145 GITS_CWRITER, &s->cwriter, false, &error_abort);
146
147 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
148 GITS_IIDR, &s->iidr, false, &error_abort);
149}
150
151
152
153
154static void kvm_arm_its_post_load(GICv3ITSState *s)
155{
156 int i;
157
158 if (!s->iidr) {
159 return;
160 }
161
162 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
163 GITS_IIDR, &s->iidr, true, &error_abort);
164
165
166
167
168
169 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
170 GITS_CBASER, &s->cbaser, true, &error_abort);
171
172 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
173 GITS_CREADR, &s->creadr, true, &error_abort);
174
175 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
176 GITS_CWRITER, &s->cwriter, true, &error_abort);
177
178
179 for (i = 0; i < 8; i++) {
180 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
181 GITS_BASER + i * 8, &s->baser[i], true,
182 &error_abort);
183 }
184
185 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
186 KVM_DEV_ARM_ITS_RESTORE_TABLES, NULL, true,
187 &error_abort);
188
189 kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS,
190 GITS_CTLR, &s->ctlr, true, &error_abort);
191}
192
193static Property kvm_arm_its_props[] = {
194 DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3",
195 GICv3State *),
196 DEFINE_PROP_END_OF_LIST(),
197};
198
199static void kvm_arm_its_class_init(ObjectClass *klass, void *data)
200{
201 DeviceClass *dc = DEVICE_CLASS(klass);
202 GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass);
203
204 dc->realize = kvm_arm_its_realize;
205 dc->props = kvm_arm_its_props;
206 icc->send_msi = kvm_its_send_msi;
207 icc->pre_save = kvm_arm_its_pre_save;
208 icc->post_load = kvm_arm_its_post_load;
209}
210
211static const TypeInfo kvm_arm_its_info = {
212 .name = TYPE_KVM_ARM_ITS,
213 .parent = TYPE_ARM_GICV3_ITS_COMMON,
214 .instance_size = sizeof(GICv3ITSState),
215 .class_init = kvm_arm_its_class_init,
216};
217
218static void kvm_arm_its_register_types(void)
219{
220 type_register_static(&kvm_arm_its_info);
221}
222
223type_init(kvm_arm_its_register_types)
224