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27#include "qemu/osdep.h"
28#include "hw/acpi/pcihp.h"
29
30#include "hw/hw.h"
31#include "hw/i386/pc.h"
32#include "hw/pci/pci.h"
33#include "hw/acpi/acpi.h"
34#include "sysemu/sysemu.h"
35#include "exec/ioport.h"
36#include "exec/address-spaces.h"
37#include "hw/pci/pci_bus.h"
38#include "qapi/error.h"
39#include "qom/qom-qobject.h"
40
41
42
43#ifdef DEBUG
44# define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
45#else
46# define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
47#endif
48
49#define ACPI_PCIHP_ADDR 0xae00
50#define ACPI_PCIHP_SIZE 0x0014
51#define PCI_UP_BASE 0x0000
52#define PCI_DOWN_BASE 0x0004
53#define PCI_EJ_BASE 0x0008
54#define PCI_RMV_BASE 0x000c
55#define PCI_SEL_BASE 0x0010
56
57typedef struct AcpiPciHpFind {
58 int bsel;
59 PCIBus *bus;
60} AcpiPciHpFind;
61
62static int acpi_pcihp_get_bsel(PCIBus *bus)
63{
64 Error *local_err = NULL;
65 uint64_t bsel = object_property_get_uint(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
66 &local_err);
67
68 if (local_err || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
69 if (local_err) {
70 error_free(local_err);
71 }
72 return -1;
73 } else {
74 return bsel;
75 }
76}
77
78
79
80
81static void *acpi_set_bsel(PCIBus *bus, void *opaque)
82{
83 unsigned *bsel_alloc = opaque;
84 unsigned *bus_bsel;
85
86 if (qbus_is_hotpluggable(BUS(bus))) {
87 bus_bsel = g_malloc(sizeof *bus_bsel);
88
89 *bus_bsel = (*bsel_alloc)++;
90 object_property_add_uint32_ptr(OBJECT(bus), ACPI_PCIHP_PROP_BSEL,
91 bus_bsel, &error_abort);
92 }
93
94 return bsel_alloc;
95}
96
97static void acpi_set_pci_info(void)
98{
99 static bool bsel_is_set;
100 PCIBus *bus;
101 unsigned bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT;
102
103 if (bsel_is_set) {
104 return;
105 }
106 bsel_is_set = true;
107
108 bus = find_i440fx();
109 if (bus) {
110
111 pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &bsel_alloc);
112 }
113}
114
115static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque)
116{
117 AcpiPciHpFind *find = opaque;
118 if (find->bsel == acpi_pcihp_get_bsel(bus)) {
119 find->bus = bus;
120 }
121}
122
123static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
124{
125 AcpiPciHpFind find = { .bsel = bsel, .bus = NULL };
126
127 if (bsel < 0) {
128 return NULL;
129 }
130
131 pci_for_each_bus(s->root, acpi_pcihp_test_hotplug_bus, &find);
132
133
134
135
136
137 if (!bsel && !find.bus) {
138 find.bus = s->root;
139 }
140 return find.bus;
141}
142
143static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState *s, PCIDevice *dev)
144{
145 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
146 DeviceClass *dc = DEVICE_GET_CLASS(dev);
147
148
149
150
151
152 return (pc->is_bridge && !dev->qdev.hotplugged) || !dc->hotpluggable;
153}
154
155static void acpi_pcihp_eject_slot(AcpiPciHpState *s, unsigned bsel, unsigned slots)
156{
157 BusChild *kid, *next;
158 int slot = ctz32(slots);
159 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
160
161 if (!bus) {
162 return;
163 }
164
165
166 s->acpi_pcihp_pci_status[bsel].down &= ~(1U << slot);
167 s->acpi_pcihp_pci_status[bsel].up &= ~(1U << slot);
168
169 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
170 DeviceState *qdev = kid->child;
171 PCIDevice *dev = PCI_DEVICE(qdev);
172 if (PCI_SLOT(dev->devfn) == slot) {
173 if (!acpi_pcihp_pc_no_hotplug(s, dev)) {
174 object_unparent(OBJECT(qdev));
175 }
176 }
177 }
178}
179
180static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState *s, int bsel)
181{
182 BusChild *kid, *next;
183 PCIBus *bus = acpi_pcihp_find_hotplug_bus(s, bsel);
184
185
186 while (s->acpi_pcihp_pci_status[bsel].down) {
187 acpi_pcihp_eject_slot(s, bsel, s->acpi_pcihp_pci_status[bsel].down);
188 }
189
190 s->acpi_pcihp_pci_status[bsel].hotplug_enable = ~0;
191
192 if (!bus) {
193 return;
194 }
195 QTAILQ_FOREACH_SAFE(kid, &bus->qbus.children, sibling, next) {
196 DeviceState *qdev = kid->child;
197 PCIDevice *pdev = PCI_DEVICE(qdev);
198 int slot = PCI_SLOT(pdev->devfn);
199
200 if (acpi_pcihp_pc_no_hotplug(s, pdev)) {
201 s->acpi_pcihp_pci_status[bsel].hotplug_enable &= ~(1U << slot);
202 }
203 }
204}
205
206static void acpi_pcihp_update(AcpiPciHpState *s)
207{
208 int i;
209
210 for (i = 0; i < ACPI_PCIHP_MAX_HOTPLUG_BUS; ++i) {
211 acpi_pcihp_update_hotplug_bus(s, i);
212 }
213}
214
215void acpi_pcihp_reset(AcpiPciHpState *s)
216{
217 acpi_set_pci_info();
218 acpi_pcihp_update(s);
219}
220
221void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
222 DeviceState *dev, Error **errp)
223{
224 PCIDevice *pdev = PCI_DEVICE(dev);
225 int slot = PCI_SLOT(pdev->devfn);
226 int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
227 if (bsel < 0) {
228 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
229 ACPI_PCIHP_PROP_BSEL "' set");
230 return;
231 }
232
233
234
235
236 if (!dev->hotplugged) {
237 return;
238 }
239
240 s->acpi_pcihp_pci_status[bsel].up |= (1U << slot);
241 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
242}
243
244void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s,
245 DeviceState *dev, Error **errp)
246{
247 PCIDevice *pdev = PCI_DEVICE(dev);
248 int slot = PCI_SLOT(pdev->devfn);
249 int bsel = acpi_pcihp_get_bsel(pci_get_bus(pdev));
250 if (bsel < 0) {
251 error_setg(errp, "Unsupported bus. Bus doesn't have property '"
252 ACPI_PCIHP_PROP_BSEL "' set");
253 return;
254 }
255
256 s->acpi_pcihp_pci_status[bsel].down |= (1U << slot);
257 acpi_send_event(DEVICE(hotplug_dev), ACPI_PCI_HOTPLUG_STATUS);
258}
259
260static uint64_t pci_read(void *opaque, hwaddr addr, unsigned int size)
261{
262 AcpiPciHpState *s = opaque;
263 uint32_t val = 0;
264 int bsel = s->hotplug_select;
265
266 if (bsel < 0 || bsel >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
267 return 0;
268 }
269
270 switch (addr) {
271 case PCI_UP_BASE:
272 val = s->acpi_pcihp_pci_status[bsel].up;
273 if (!s->legacy_piix) {
274 s->acpi_pcihp_pci_status[bsel].up = 0;
275 }
276 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val);
277 break;
278 case PCI_DOWN_BASE:
279 val = s->acpi_pcihp_pci_status[bsel].down;
280 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32 "\n", val);
281 break;
282 case PCI_EJ_BASE:
283
284 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32 "\n", val);
285 break;
286 case PCI_RMV_BASE:
287 val = s->acpi_pcihp_pci_status[bsel].hotplug_enable;
288 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32 "\n", val);
289 break;
290 case PCI_SEL_BASE:
291 val = s->hotplug_select;
292 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32 "\n", val);
293 default:
294 break;
295 }
296
297 return val;
298}
299
300static void pci_write(void *opaque, hwaddr addr, uint64_t data,
301 unsigned int size)
302{
303 AcpiPciHpState *s = opaque;
304 switch (addr) {
305 case PCI_EJ_BASE:
306 if (s->hotplug_select >= ACPI_PCIHP_MAX_HOTPLUG_BUS) {
307 break;
308 }
309 acpi_pcihp_eject_slot(s, s->hotplug_select, data);
310 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx " <== %" PRIu64 "\n",
311 addr, data);
312 break;
313 case PCI_SEL_BASE:
314 s->hotplug_select = s->legacy_piix ? ACPI_PCIHP_BSEL_DEFAULT : data;
315 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx " <== %" PRIu64 "\n",
316 addr, data);
317 default:
318 break;
319 }
320}
321
322static const MemoryRegionOps acpi_pcihp_io_ops = {
323 .read = pci_read,
324 .write = pci_write,
325 .endianness = DEVICE_LITTLE_ENDIAN,
326 .valid = {
327 .min_access_size = 4,
328 .max_access_size = 4,
329 },
330};
331
332void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
333 MemoryRegion *address_space_io, bool bridges_enabled)
334{
335 s->io_len = ACPI_PCIHP_SIZE;
336 s->io_base = ACPI_PCIHP_ADDR;
337
338 s->root= root_bus;
339 s->legacy_piix = !bridges_enabled;
340
341 memory_region_init_io(&s->io, owner, &acpi_pcihp_io_ops, s,
342 "acpi-pci-hotplug", s->io_len);
343 memory_region_add_subregion(address_space_io, s->io_base, &s->io);
344
345 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_BASE_PROP, &s->io_base,
346 &error_abort);
347 object_property_add_uint16_ptr(owner, ACPI_PCIHP_IO_LEN_PROP, &s->io_len,
348 &error_abort);
349}
350
351const VMStateDescription vmstate_acpi_pcihp_pci_status = {
352 .name = "acpi_pcihp_pci_status",
353 .version_id = 1,
354 .minimum_version_id = 1,
355 .fields = (VMStateField[]) {
356 VMSTATE_UINT32(up, AcpiPciHpPciStatus),
357 VMSTATE_UINT32(down, AcpiPciHpPciStatus),
358 VMSTATE_END_OF_LIST()
359 }
360};
361