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24#include "qemu/osdep.h"
25#include "hw/hw.h"
26#include "hw/display/vga.h"
27#include "vga_int.h"
28#include "ui/pixel_ops.h"
29
30#define VGA_RAM_SIZE (8192 * 1024)
31
32typedef struct ISAVGAMMState {
33 VGACommonState vga;
34 int it_shift;
35} ISAVGAMMState;
36
37
38static uint32_t vga_mm_readb (void *opaque, hwaddr addr)
39{
40 ISAVGAMMState *s = opaque;
41
42 return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff;
43}
44
45static void vga_mm_writeb (void *opaque,
46 hwaddr addr, uint32_t value)
47{
48 ISAVGAMMState *s = opaque;
49
50 vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff);
51}
52
53static uint32_t vga_mm_readw (void *opaque, hwaddr addr)
54{
55 ISAVGAMMState *s = opaque;
56
57 return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff;
58}
59
60static void vga_mm_writew (void *opaque,
61 hwaddr addr, uint32_t value)
62{
63 ISAVGAMMState *s = opaque;
64
65 vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff);
66}
67
68static uint32_t vga_mm_readl (void *opaque, hwaddr addr)
69{
70 ISAVGAMMState *s = opaque;
71
72 return vga_ioport_read(&s->vga, addr >> s->it_shift);
73}
74
75static void vga_mm_writel (void *opaque,
76 hwaddr addr, uint32_t value)
77{
78 ISAVGAMMState *s = opaque;
79
80 vga_ioport_write(&s->vga, addr >> s->it_shift, value);
81}
82
83static const MemoryRegionOps vga_mm_ctrl_ops = {
84 .old_mmio = {
85 .read = {
86 vga_mm_readb,
87 vga_mm_readw,
88 vga_mm_readl,
89 },
90 .write = {
91 vga_mm_writeb,
92 vga_mm_writew,
93 vga_mm_writel,
94 },
95 },
96 .endianness = DEVICE_NATIVE_ENDIAN,
97};
98
99static void vga_mm_init(ISAVGAMMState *s, hwaddr vram_base,
100 hwaddr ctrl_base, int it_shift,
101 MemoryRegion *address_space)
102{
103 MemoryRegion *s_ioport_ctrl, *vga_io_memory;
104
105 s->it_shift = it_shift;
106 s_ioport_ctrl = g_malloc(sizeof(*s_ioport_ctrl));
107 memory_region_init_io(s_ioport_ctrl, NULL, &vga_mm_ctrl_ops, s,
108 "vga-mm-ctrl", 0x100000);
109 memory_region_set_flush_coalesced(s_ioport_ctrl);
110
111 vga_io_memory = g_malloc(sizeof(*vga_io_memory));
112
113 memory_region_init_io(vga_io_memory, NULL, &vga_mem_ops, &s->vga,
114 "vga-mem", 0x20000);
115
116 vmstate_register(NULL, 0, &vmstate_vga_common, s);
117
118 memory_region_add_subregion(address_space, ctrl_base, s_ioport_ctrl);
119 s->vga.bank_offset = 0;
120 memory_region_add_subregion(address_space,
121 vram_base + 0x000a0000, vga_io_memory);
122 memory_region_set_coalescing(vga_io_memory);
123}
124
125int isa_vga_mm_init(hwaddr vram_base,
126 hwaddr ctrl_base, int it_shift,
127 MemoryRegion *address_space)
128{
129 ISAVGAMMState *s;
130
131 s = g_malloc0(sizeof(*s));
132
133 s->vga.vram_size_mb = VGA_RAM_SIZE >> 20;
134 vga_common_init(&s->vga, NULL, true);
135 vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
136
137 s->vga.con = graphic_console_init(NULL, 0, s->vga.hw_ops, s);
138
139 vga_init_vbe(&s->vga, NULL, address_space);
140 return 0;
141}
142