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27#include "qemu/osdep.h"
28#include "hw/hw.h"
29#include "hw/i2c/pm_smbus.h"
30#include "hw/pci/pci.h"
31#include "sysemu/sysemu.h"
32#include "hw/i2c/i2c.h"
33#include "hw/i2c/smbus.h"
34
35#include "hw/i386/ich9.h"
36
37#define ICH9_SMB_DEVICE(obj) \
38 OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
39
40typedef struct ICH9SMBState {
41 PCIDevice dev;
42
43 PMSMBus smb;
44} ICH9SMBState;
45
46static const VMStateDescription vmstate_ich9_smbus = {
47 .name = "ich9_smb",
48 .version_id = 1,
49 .minimum_version_id = 1,
50 .fields = (VMStateField[]) {
51 VMSTATE_PCI_DEVICE(dev, struct ICH9SMBState),
52 VMSTATE_END_OF_LIST()
53 }
54};
55
56static void ich9_smbus_write_config(PCIDevice *d, uint32_t address,
57 uint32_t val, int len)
58{
59 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
60
61 pci_default_write_config(d, address, val, len);
62 if (range_covers_byte(address, len, ICH9_SMB_HOSTC)) {
63 uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
64 if ((hostc & ICH9_SMB_HOSTC_HST_EN) &&
65 !(hostc & ICH9_SMB_HOSTC_I2C_EN)) {
66 memory_region_set_enabled(&s->smb.io, true);
67 } else {
68 memory_region_set_enabled(&s->smb.io, false);
69 }
70 }
71}
72
73static void ich9_smbus_realize(PCIDevice *d, Error **errp)
74{
75 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
76
77
78 pci_config_set_interrupt_pin(d->config, 0x01);
79
80 pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
81
82
83 pm_smbus_init(&d->qdev, &s->smb);
84 pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
85 &s->smb.io);
86}
87
88static void ich9_smb_class_init(ObjectClass *klass, void *data)
89{
90 DeviceClass *dc = DEVICE_CLASS(klass);
91 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
92
93 k->vendor_id = PCI_VENDOR_ID_INTEL;
94 k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
95 k->revision = ICH9_A2_SMB_REVISION;
96 k->class_id = PCI_CLASS_SERIAL_SMBUS;
97 dc->vmsd = &vmstate_ich9_smbus;
98 dc->desc = "ICH9 SMBUS Bridge";
99 k->realize = ich9_smbus_realize;
100 k->config_write = ich9_smbus_write_config;
101
102
103
104
105 dc->user_creatable = false;
106}
107
108I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
109{
110 PCIDevice *d =
111 pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
112 ICH9SMBState *s = ICH9_SMB_DEVICE(d);
113 return s->smb.smbus;
114}
115
116static const TypeInfo ich9_smb_info = {
117 .name = TYPE_ICH9_SMB_DEVICE,
118 .parent = TYPE_PCI_DEVICE,
119 .instance_size = sizeof(ICH9SMBState),
120 .class_init = ich9_smb_class_init,
121 .interfaces = (InterfaceInfo[]) {
122 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
123 { },
124 },
125};
126
127static void ich9_smb_register(void)
128{
129 type_register_static(&ich9_smb_info);
130}
131
132type_init(ich9_smb_register);
133