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12#include "qemu/osdep.h"
13#include "qemu-common.h"
14#include "e500.h"
15#include "hw/net/fsl_etsec/etsec.h"
16#include "hw/boards.h"
17#include "sysemu/device_tree.h"
18#include "sysemu/kvm.h"
19#include "hw/sysbus.h"
20#include "hw/pci/pci.h"
21#include "hw/ppc/openpic.h"
22#include "kvm_ppc.h"
23
24static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt)
25{
26 const char model[] = "QEMU ppce500";
27 const char compatible[] = "fsl,qemu-e500";
28
29 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
30 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
31 sizeof(compatible));
32}
33
34static void e500plat_init(MachineState *machine)
35{
36 PPCE500Params params = {
37 .pci_first_slot = 0x1,
38 .pci_nr_slots = PCI_SLOT_MAX - 1,
39 .fixup_devtree = e500plat_fixup_devtree,
40 .mpic_version = OPENPIC_MODEL_FSL_MPIC_42,
41 .has_mpc8xxx_gpio = true,
42 .has_platform_bus = true,
43 .platform_bus_base = 0xf00000000ULL,
44 .platform_bus_size = (128ULL * 1024 * 1024),
45 .platform_bus_first_irq = 5,
46 .platform_bus_num_irqs = 10,
47 .ccsrbar_base = 0xFE0000000ULL,
48 .pci_pio_base = 0xFE1000000ULL,
49 .pci_mmio_base = 0xC00000000ULL,
50 .pci_mmio_bus_base = 0xE0000000ULL,
51 .spin_base = 0xFEF000000ULL,
52 };
53
54
55
56 if (kvm_enabled() && !kvmppc_has_cap_epr()) {
57 params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
58 }
59
60 ppce500_init(machine, ¶ms);
61}
62
63static void e500plat_machine_init(MachineClass *mc)
64{
65 mc->desc = "generic paravirt e500 platform";
66 mc->init = e500plat_init;
67 mc->max_cpus = 32;
68 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
69 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
70}
71
72DEFINE_MACHINE("ppce500", e500plat_machine_init)
73