LXR qemu/hw/ppc/mac.h

   1/*
   2 * QEMU PowerMac emulation shared definitions and prototypes
   3 *
   4 * Copyright (c) 2004-2007 Fabrice Bellard
   5 * Copyright (c) 2007 Jocelyn Mayer
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 */
  25
  26#ifndef PPC_MAC_H
  27#define PPC_MAC_H
  28
  29#include "exec/memory.h"
  30#include "hw/sysbus.h"
  31#include "hw/ide/internal.h"
  32#include "hw/input/adb.h"
  33#include "hw/misc/mos6522.h"
  34
  35/* SMP is not enabled, for now */
  36#define MAX_CPUS 1
  37
  38#define BIOS_SIZE     (1024 * 1024)
  39#define NVRAM_SIZE        0x2000
  40#define PROM_FILENAME    "openbios-ppc"
  41#define PROM_ADDR         0xfff00000
  42
  43#define KERNEL_LOAD_ADDR 0x01000000
  44#define KERNEL_GAP       0x00100000
  45
  46#define ESCC_CLOCK 3686400
  47
  48
  49/* MacIO */
  50#define TYPE_MACIO_IDE "macio-ide"
  51#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
  52
  53typedef struct MACIOIDEState {
  54    /*< private >*/
  55    SysBusDevice parent_obj;
  56    /*< public >*/
  57    uint32_t channel;
  58    qemu_irq real_ide_irq;
  59    qemu_irq real_dma_irq;
  60    qemu_irq ide_irq;
  61    qemu_irq dma_irq;
  62
  63    MemoryRegion mem;
  64    IDEBus bus;
  65    IDEDMA dma;
  66    void *dbdma;
  67    bool dma_active;
  68    uint32_t timing_reg;
  69    uint32_t irq_reg;
  70} MACIOIDEState;
  71
  72void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
  73void macio_ide_register_dma(MACIOIDEState *ide);
  74
  75void macio_init(PCIDevice *dev,
  76                MemoryRegion *pic_mem);
  77
  78/* Heathrow PIC */
  79DeviceState *heathrow_pic_init(int nb_cpus, qemu_irq **irqs,
  80                               qemu_irq **pic_irqs);
  81
  82/* Grackle PCI */
  83#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
  84PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
  85                         MemoryRegion *address_space_mem,
  86                         MemoryRegion *address_space_io);
  87
  88/* UniNorth PCI */
  89PCIBus *pci_pmac_init(qemu_irq *pic,
  90                      MemoryRegion *address_space_mem,
  91                      MemoryRegion *address_space_io);
  92PCIBus *pci_pmac_u3_init(qemu_irq *pic,
  93                         MemoryRegion *address_space_mem,
  94                         MemoryRegion *address_space_io);
  95
  96/* Mac NVRAM */
  97#define TYPE_MACIO_NVRAM "macio-nvram"
  98#define MACIO_NVRAM(obj) \
  99    OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM)
 100
 101typedef struct MacIONVRAMState {
 102    /*< private >*/
 103    SysBusDevice parent_obj;
 104    /*< public >*/
 105
 106    uint32_t size;
 107    uint32_t it_shift;
 108
 109    MemoryRegion mem;
 110    uint8_t *data;
 111} MacIONVRAMState;
 112
 113void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
 114#endif /* PPC_MAC_H */
 115