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26#include "qemu/osdep.h"
27#include "qapi/error.h"
28#include "hw/hw.h"
29#include "hw/ppc/ppc.h"
30#include "mac.h"
31#include "hw/input/adb.h"
32#include "hw/timer/m48t59.h"
33#include "sysemu/sysemu.h"
34#include "net/net.h"
35#include "hw/isa/isa.h"
36#include "hw/pci/pci.h"
37#include "hw/boards.h"
38#include "hw/nvram/fw_cfg.h"
39#include "hw/char/escc.h"
40#include "hw/misc/macio/macio.h"
41#include "hw/ide.h"
42#include "hw/loader.h"
43#include "elf.h"
44#include "qemu/error-report.h"
45#include "sysemu/kvm.h"
46#include "kvm_ppc.h"
47#include "exec/address-spaces.h"
48#include "qemu/cutils.h"
49
50#define MAX_IDE_BUS 2
51#define CFG_ADDR 0xf0000510
52#define TBFREQ 16600000UL
53#define CLOCKFREQ 266000000UL
54#define BUSFREQ 66000000UL
55
56#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
57
58static void fw_cfg_boot_set(void *opaque, const char *boot_device,
59 Error **errp)
60{
61 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
62}
63
64static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
65{
66 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
67}
68
69static void ppc_heathrow_reset(void *opaque)
70{
71 PowerPCCPU *cpu = opaque;
72
73 cpu_reset(CPU(cpu));
74}
75
76static void ppc_heathrow_init(MachineState *machine)
77{
78 ram_addr_t ram_size = machine->ram_size;
79 const char *kernel_filename = machine->kernel_filename;
80 const char *kernel_cmdline = machine->kernel_cmdline;
81 const char *initrd_filename = machine->initrd_filename;
82 const char *boot_device = machine->boot_order;
83 MemoryRegion *sysmem = get_system_memory();
84 PowerPCCPU *cpu = NULL;
85 CPUPPCState *env = NULL;
86 char *filename;
87 qemu_irq *pic, **heathrow_irqs;
88 int linux_boot, i;
89 MemoryRegion *ram = g_new(MemoryRegion, 1);
90 MemoryRegion *bios = g_new(MemoryRegion, 1);
91 MemoryRegion *isa = g_new(MemoryRegion, 1);
92 uint32_t kernel_base, initrd_base, cmdline_base = 0;
93 int32_t kernel_size, initrd_size;
94 PCIBus *pci_bus;
95 OldWorldMacIOState *macio;
96 MACIOIDEState *macio_ide;
97 DeviceState *dev, *pic_dev;
98 BusState *adb_bus;
99 int bios_size, ndrv_size;
100 uint8_t *ndrv_file;
101 uint16_t ppc_boot_device;
102 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
103 void *fw_cfg;
104 uint64_t tbfreq;
105
106 linux_boot = (kernel_filename != NULL);
107
108
109 for (i = 0; i < smp_cpus; i++) {
110 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
111 env = &cpu->env;
112
113
114 cpu_ppc_tb_init(env, TBFREQ);
115 qemu_register_reset(ppc_heathrow_reset, cpu);
116 }
117
118
119 if (ram_size > (2047 << 20)) {
120 fprintf(stderr,
121 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
122 ((unsigned int)ram_size / (1 << 20)));
123 exit(1);
124 }
125
126 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
127 ram_size);
128 memory_region_add_subregion(sysmem, 0, ram);
129
130
131 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
132 &error_fatal);
133
134 if (bios_name == NULL)
135 bios_name = PROM_FILENAME;
136 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
137 memory_region_set_readonly(bios, true);
138 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
139
140
141 if (filename) {
142 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
143 1, PPC_ELF_MACHINE, 0, 0);
144 g_free(filename);
145 } else {
146 bios_size = -1;
147 }
148 if (bios_size < 0 || bios_size > BIOS_SIZE) {
149 error_report("could not load PowerPC bios '%s'", bios_name);
150 exit(1);
151 }
152
153 if (linux_boot) {
154 uint64_t lowaddr = 0;
155 int bswap_needed;
156
157#ifdef BSWAP_NEEDED
158 bswap_needed = 1;
159#else
160 bswap_needed = 0;
161#endif
162 kernel_base = KERNEL_LOAD_ADDR;
163 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
164 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
165 0, 0);
166 if (kernel_size < 0)
167 kernel_size = load_aout(kernel_filename, kernel_base,
168 ram_size - kernel_base, bswap_needed,
169 TARGET_PAGE_SIZE);
170 if (kernel_size < 0)
171 kernel_size = load_image_targphys(kernel_filename,
172 kernel_base,
173 ram_size - kernel_base);
174 if (kernel_size < 0) {
175 error_report("could not load kernel '%s'", kernel_filename);
176 exit(1);
177 }
178
179 if (initrd_filename) {
180 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
181 initrd_size = load_image_targphys(initrd_filename, initrd_base,
182 ram_size - initrd_base);
183 if (initrd_size < 0) {
184 error_report("could not load initial ram disk '%s'",
185 initrd_filename);
186 exit(1);
187 }
188 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
189 } else {
190 initrd_base = 0;
191 initrd_size = 0;
192 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
193 }
194 ppc_boot_device = 'm';
195 } else {
196 kernel_base = 0;
197 kernel_size = 0;
198 initrd_base = 0;
199 initrd_size = 0;
200 ppc_boot_device = '\0';
201 for (i = 0; boot_device[i] != '\0'; i++) {
202
203
204
205
206#if 0
207 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
208 ppc_boot_device = boot_device[i];
209 break;
210 }
211#else
212 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
213 ppc_boot_device = boot_device[i];
214 break;
215 }
216#endif
217 }
218 if (ppc_boot_device == '\0') {
219 error_report("No valid boot device for G3 Beige machine");
220 exit(1);
221 }
222 }
223
224
225 memory_region_init_alias(isa, NULL, "isa_mmio",
226 get_system_io(), 0, 0x00200000);
227 memory_region_add_subregion(sysmem, 0xfe000000, isa);
228
229
230 heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
231 heathrow_irqs[0] =
232 g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
233
234 for (i = 0; i < smp_cpus; i++) {
235 switch (PPC_INPUT(env)) {
236 case PPC_FLAGS_INPUT_6xx:
237 heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
238 heathrow_irqs[i][0] =
239 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
240 break;
241 default:
242 error_report("Bus model not supported on OldWorld Mac machine");
243 exit(1);
244 }
245 }
246
247
248 if (kvm_enabled()) {
249 tbfreq = kvmppc_get_tbfreq();
250 } else {
251 tbfreq = TBFREQ;
252 }
253
254
255 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
256 error_report("Only 6xx bus is supported on heathrow machine");
257 exit(1);
258 }
259 pic_dev = heathrow_pic_init(1, heathrow_irqs, &pic);
260 pci_bus = pci_grackle_init(0xfec00000, pic,
261 get_system_memory(),
262 get_system_io());
263 pci_vga_init(pci_bus);
264
265 for (i = 0; i < nb_nics; i++) {
266 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
267 }
268
269 ide_drive_get(hd, ARRAY_SIZE(hd));
270
271
272 macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
273 dev = DEVICE(macio);
274 qdev_connect_gpio_out(dev, 0, pic[0x12]);
275 qdev_connect_gpio_out(dev, 1, pic[0x10]);
276 qdev_connect_gpio_out(dev, 2, pic[0x0F]);
277 qdev_connect_gpio_out(dev, 3, pic[0x0D]);
278 qdev_connect_gpio_out(dev, 4, pic[0x02]);
279 qdev_connect_gpio_out(dev, 5, pic[0x0E]);
280 qdev_connect_gpio_out(dev, 6, pic[0x03]);
281 qdev_prop_set_uint64(dev, "frequency", tbfreq);
282 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
283 &error_abort);
284 qdev_init_nofail(dev);
285
286 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
287 "ide[0]"));
288 macio_ide_init_drives(macio_ide, hd);
289
290 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
291 "ide[1]"));
292 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
293
294 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
295 adb_bus = qdev_get_child_bus(dev, "adb.0");
296 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
297 qdev_init_nofail(dev);
298 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
299 qdev_init_nofail(dev);
300
301 if (machine_usb(machine)) {
302 pci_create_simple(pci_bus, -1, "pci-ohci");
303 }
304
305 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
306 graphic_depth = 15;
307
308
309
310 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2);
311 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
312 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
313 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
314 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
315 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
316 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
317 if (kernel_cmdline) {
318 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
319 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
320 } else {
321 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
322 }
323 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
324 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
325 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
326
327 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
328 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
329 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
330
331 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
332 if (kvm_enabled()) {
333#ifdef CONFIG_KVM
334 uint8_t *hypercall;
335
336 hypercall = g_malloc(16);
337 kvmppc_get_hypercall(env, hypercall, 16);
338 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
339 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
340#endif
341 }
342 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
343
344 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
345 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
346
347
348 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
349 if (filename) {
350 ndrv_size = get_image_size(filename);
351 if (ndrv_size != -1) {
352 ndrv_file = g_malloc(ndrv_size);
353 ndrv_size = load_image(filename, ndrv_file);
354
355 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
356 }
357 g_free(filename);
358 }
359
360 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
361}
362
363static int heathrow_kvm_type(const char *arg)
364{
365
366 return 2;
367}
368
369static void heathrow_class_init(ObjectClass *oc, void *data)
370{
371 MachineClass *mc = MACHINE_CLASS(oc);
372
373 mc->desc = "Heathrow based PowerMAC";
374 mc->init = ppc_heathrow_init;
375 mc->block_default_type = IF_IDE;
376 mc->max_cpus = MAX_CPUS;
377#ifndef TARGET_PPC64
378 mc->is_default = 1;
379#endif
380
381 mc->default_boot_order = "cd";
382 mc->kvm_type = heathrow_kvm_type;
383 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
384}
385
386static const TypeInfo ppc_heathrow_machine_info = {
387 .name = MACHINE_TYPE_NAME("g3beige"),
388 .parent = TYPE_MACHINE,
389 .class_init = heathrow_class_init
390};
391
392static void ppc_heathrow_register_types(void)
393{
394 type_register_static(&ppc_heathrow_machine_info);
395}
396
397type_init(ppc_heathrow_register_types);
398
