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9#include "qemu/osdep.h"
10#include "hw/cpu/core.h"
11#include "hw/ppc/spapr_cpu_core.h"
12#include "target/ppc/cpu.h"
13#include "hw/ppc/spapr.h"
14#include "hw/boards.h"
15#include "qapi/error.h"
16#include "sysemu/cpus.h"
17#include "sysemu/kvm.h"
18#include "target/ppc/kvm_ppc.h"
19#include "hw/ppc/ppc.h"
20#include "target/ppc/mmu-hash64.h"
21#include "sysemu/numa.h"
22#include "sysemu/hw_accel.h"
23#include "qemu/error-report.h"
24
25static void spapr_cpu_reset(void *opaque)
26{
27 PowerPCCPU *cpu = opaque;
28 CPUState *cs = CPU(cpu);
29 CPUPPCState *env = &cpu->env;
30 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
31
32 cpu_reset(cs);
33
34
35
36
37 cs->halted = 1;
38
39 env->spr[SPR_HIOR] = 0;
40
41
42
43
44 if (cs != first_cpu) {
45 env->spr[SPR_LPCR] &= ~pcc->lpcr_pm;
46 }
47
48
49
50
51 if (cs != first_cpu) {
52 ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort);
53 }
54}
55
56static void spapr_cpu_destroy(PowerPCCPU *cpu)
57{
58 qemu_unregister_reset(spapr_cpu_reset, cpu);
59}
60
61static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
62 Error **errp)
63{
64 CPUPPCState *env = &cpu->env;
65
66
67 cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
68
69
70 cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
71
72 qemu_register_reset(spapr_cpu_reset, cpu);
73 spapr_cpu_reset(cpu);
74}
75
76
77
78
79
80const char *spapr_get_cpu_core_type(const char *cpu_type)
81{
82 int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
83 char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
84 len, cpu_type);
85 ObjectClass *oc = object_class_by_name(core_type);
86
87 g_free(core_type);
88 if (!oc) {
89 return NULL;
90 }
91
92 return object_class_get_name(oc);
93}
94
95static void spapr_cpu_core_unrealizefn(DeviceState *dev, Error **errp)
96{
97 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
98 CPUCore *cc = CPU_CORE(dev);
99 int i;
100
101 for (i = 0; i < cc->nr_threads; i++) {
102 Object *obj = OBJECT(sc->threads[i]);
103 DeviceState *dev = DEVICE(obj);
104 CPUState *cs = CPU(dev);
105 PowerPCCPU *cpu = POWERPC_CPU(cs);
106
107 spapr_cpu_destroy(cpu);
108 object_unparent(cpu->intc);
109 cpu_remove_sync(cs);
110 object_unparent(obj);
111 }
112 g_free(sc->threads);
113}
114
115static void spapr_cpu_core_realize_child(Object *child,
116 sPAPRMachineState *spapr, Error **errp)
117{
118 Error *local_err = NULL;
119 CPUState *cs = CPU(child);
120 PowerPCCPU *cpu = POWERPC_CPU(cs);
121
122 object_property_set_bool(child, true, "realized", &local_err);
123 if (local_err) {
124 goto error;
125 }
126
127 spapr_cpu_init(spapr, cpu, &local_err);
128 if (local_err) {
129 goto error;
130 }
131
132 cpu->intc = icp_create(child, spapr->icp_type, XICS_FABRIC(spapr),
133 &local_err);
134 if (local_err) {
135 goto error;
136 }
137
138 return;
139
140error:
141 error_propagate(errp, local_err);
142}
143
144static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
145{
146
147
148
149 sPAPRMachineState *spapr =
150 (sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(),
151 TYPE_SPAPR_MACHINE);
152 sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
153 sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
154 CPUCore *cc = CPU_CORE(OBJECT(dev));
155 Error *local_err = NULL;
156 Object *obj;
157 int i, j;
158
159 if (!spapr) {
160 error_setg(errp, TYPE_SPAPR_CPU_CORE " needs a pseries machine");
161 return;
162 }
163
164 sc->threads = g_new(PowerPCCPU *, cc->nr_threads);
165 for (i = 0; i < cc->nr_threads; i++) {
166 char id[32];
167 CPUState *cs;
168 PowerPCCPU *cpu;
169
170 obj = object_new(scc->cpu_type);
171
172 cs = CPU(obj);
173 cpu = sc->threads[i] = POWERPC_CPU(obj);
174 cs->cpu_index = cc->core_id + i;
175 spapr_set_vcpu_id(cpu, cs->cpu_index, &local_err);
176 if (local_err) {
177 goto err;
178 }
179
180
181
182 cpu->node_id = sc->node_id;
183
184 snprintf(id, sizeof(id), "thread[%d]", i);
185 object_property_add_child(OBJECT(sc), id, obj, &local_err);
186 if (local_err) {
187 goto err;
188 }
189 object_unref(obj);
190 }
191
192 for (j = 0; j < cc->nr_threads; j++) {
193 obj = OBJECT(sc->threads[j]);
194
195 spapr_cpu_core_realize_child(obj, spapr, &local_err);
196 if (local_err) {
197 goto err;
198 }
199 }
200 return;
201
202err:
203 while (--i >= 0) {
204 obj = OBJECT(sc->threads[i]);
205 object_unparent(obj);
206 }
207 g_free(sc->threads);
208 error_propagate(errp, local_err);
209}
210
211static Property spapr_cpu_core_properties[] = {
212 DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NODE_ID),
213 DEFINE_PROP_END_OF_LIST()
214};
215
216static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
217{
218 DeviceClass *dc = DEVICE_CLASS(oc);
219 sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
220
221 dc->realize = spapr_cpu_core_realize;
222 dc->unrealize = spapr_cpu_core_unrealizefn;
223 dc->props = spapr_cpu_core_properties;
224 scc->cpu_type = data;
225}
226
227#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
228 { \
229 .parent = TYPE_SPAPR_CPU_CORE, \
230 .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
231 .class_init = spapr_cpu_core_class_init, \
232 .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
233 }
234
235static const TypeInfo spapr_cpu_core_type_infos[] = {
236 {
237 .name = TYPE_SPAPR_CPU_CORE,
238 .parent = TYPE_CPU_CORE,
239 .abstract = true,
240 .instance_size = sizeof(sPAPRCPUCore),
241 .class_size = sizeof(sPAPRCPUCoreClass),
242 },
243 DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
244 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
245 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
246 DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
247 DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
248 DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
249 DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
250 DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
251 DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
252 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
253 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
254#ifdef CONFIG_KVM
255 DEFINE_SPAPR_CPU_CORE_TYPE("host"),
256#endif
257};
258
259DEFINE_TYPES(spapr_cpu_core_type_infos)
260