1#ifndef QEMU_HW_ACPI_H
2#define QEMU_HW_ACPI_H
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23#include "qemu/notify.h"
24#include "exec/memory.h"
25#include "hw/irq.h"
26#include "hw/acpi/acpi_dev_interface.h"
27
28
29
30
31#define ACPI_MAX_RAM_SLOTS 256
32
33
34
35
36#define ACPI_GPE_REGISTER_WIDTH 8
37#define ACPI_PM1_REGISTER_WIDTH 16
38#define ACPI_PM2_REGISTER_WIDTH 8
39#define ACPI_PM_TIMER_WIDTH 32
40
41
42#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
43#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
44#define ACPI_PM_PROP_S4_VAL "s4_val"
45#define ACPI_PM_PROP_SCI_INT "sci_int"
46#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
47#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
48#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
49#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
50#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
51
52
53#define PM_TIMER_FREQUENCY 3579545
54
55
56
57
58
59
60
61
62#define ACPI_BITMASK_TIMER_STATUS 0x0001
63#define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
64#define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
65#define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
66#define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
67#define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
68#define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000
69#define ACPI_BITMASK_WAKE_STATUS 0x8000
70
71#define ACPI_BITMASK_ALL_FIXED_STATUS (\
72 ACPI_BITMASK_TIMER_STATUS | \
73 ACPI_BITMASK_BUS_MASTER_STATUS | \
74 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
75 ACPI_BITMASK_POWER_BUTTON_STATUS | \
76 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
77 ACPI_BITMASK_RT_CLOCK_STATUS | \
78 ACPI_BITMASK_WAKE_STATUS)
79
80
81#define ACPI_BITMASK_TIMER_ENABLE 0x0001
82#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
83#define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
84#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
85#define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
86#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000
87
88#define ACPI_BITMASK_PM1_COMMON_ENABLED ( \
89 ACPI_BITMASK_RT_CLOCK_ENABLE | \
90 ACPI_BITMASK_POWER_BUTTON_ENABLE | \
91 ACPI_BITMASK_GLOBAL_LOCK_ENABLE | \
92 ACPI_BITMASK_TIMER_ENABLE)
93
94
95#define ACPI_BITMASK_SCI_ENABLE 0x0001
96#define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
97#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
98#define ACPI_BITMASK_SLEEP_TYPE 0x1C00
99#define ACPI_BITMASK_SLEEP_ENABLE 0x2000
100
101
102#define ACPI_BITMASK_ARB_DISABLE 0x0001
103
104
105typedef struct ACPIPMTimer ACPIPMTimer;
106typedef struct ACPIPM1EVT ACPIPM1EVT;
107typedef struct ACPIPM1CNT ACPIPM1CNT;
108typedef struct ACPIGPE ACPIGPE;
109typedef struct ACPIREGS ACPIREGS;
110
111typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
112
113struct ACPIPMTimer {
114 QEMUTimer *timer;
115 MemoryRegion io;
116 int64_t overflow_time;
117
118 acpi_update_sci_fn update_sci;
119};
120
121struct ACPIPM1EVT {
122 MemoryRegion io;
123 uint16_t sts;
124 uint16_t en;
125 acpi_update_sci_fn update_sci;
126};
127
128struct ACPIPM1CNT {
129 MemoryRegion io;
130 uint16_t cnt;
131 uint8_t s4_val;
132};
133
134struct ACPIGPE {
135 uint8_t len;
136
137 uint8_t *sts;
138 uint8_t *en;
139};
140
141struct ACPIREGS {
142 ACPIPMTimer tmr;
143 ACPIGPE gpe;
144 struct {
145 ACPIPM1EVT evt;
146 ACPIPM1CNT cnt;
147 } pm1;
148 Notifier wakeup;
149};
150
151
152void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
153void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
154void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
155 MemoryRegion *parent);
156void acpi_pm_tmr_reset(ACPIREGS *ar);
157
158
159uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
160void acpi_pm1_evt_power_down(ACPIREGS *ar);
161void acpi_pm1_evt_reset(ACPIREGS *ar);
162void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
163 MemoryRegion *parent);
164
165
166void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
167 bool disable_s3, bool disable_s4, uint8_t s4_val);
168void acpi_pm1_cnt_update(ACPIREGS *ar,
169 bool sci_enable, bool sci_disable);
170void acpi_pm1_cnt_reset(ACPIREGS *ar);
171
172
173void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
174void acpi_gpe_reset(ACPIREGS *ar);
175
176void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
177uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
178
179void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
180 AcpiEventStatusBits status);
181
182void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
183
184
185extern int acpi_enabled;
186extern char unsigned *acpi_tables;
187extern size_t acpi_tables_len;
188
189uint8_t *acpi_table_first(void);
190uint8_t *acpi_table_next(uint8_t *current);
191unsigned acpi_table_len(void *current);
192void acpi_table_add(const QemuOpts *opts, Error **errp);
193void acpi_table_add_builtin(const QemuOpts *opts, Error **errp);
194
195typedef struct AcpiSlicOem AcpiSlicOem;
196struct AcpiSlicOem {
197 char *id;
198 char *table_id;
199};
200int acpi_get_slic_oem(AcpiSlicOem *oem);
201
202#endif
203