1#ifndef TARGET_ARM_TRANSLATE_H
2#define TARGET_ARM_TRANSLATE_H
3
4#include "exec/translator.h"
5
6
7
8typedef struct DisasContext {
9 DisasContextBase base;
10
11 target_ulong pc;
12 target_ulong next_page_start;
13 uint32_t insn;
14
15 int condjmp;
16
17 TCGLabel *condlabel;
18
19 int condexec_mask;
20 int condexec_cond;
21 int thumb;
22 int sctlr_b;
23 TCGMemOp be_data;
24#if !defined(CONFIG_USER_ONLY)
25 int user;
26#endif
27 ARMMMUIdx mmu_idx;
28 bool tbi0;
29 bool tbi1;
30 bool ns;
31 int fp_excp_el;
32 int sve_excp_el;
33 int sve_len;
34
35 bool secure_routed_to_el3;
36 bool vfp_enabled;
37 int vec_len;
38 int vec_stride;
39 bool v7m_handler_mode;
40 bool v8m_secure;
41
42
43
44 uint32_t svc_imm;
45 int aarch64;
46 int current_el;
47 GHashTable *cp_regs;
48 uint64_t features;
49
50
51
52
53
54
55
56 bool fp_access_checked;
57
58
59
60 bool ss_active;
61 bool pstate_ss;
62
63
64
65
66 bool is_ldex;
67
68 bool ss_same_el;
69
70 int c15_cpar;
71
72 TCGOp *insn_start;
73#define TMP_A64_MAX 16
74 int tmp_a64_count;
75 TCGv_i64 tmp_a64[TMP_A64_MAX];
76} DisasContext;
77
78typedef struct DisasCompare {
79 TCGCond cond;
80 TCGv_i32 value;
81 bool value_global;
82} DisasCompare;
83
84
85extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF;
86extern TCGv_i64 cpu_exclusive_addr;
87extern TCGv_i64 cpu_exclusive_val;
88
89static inline int arm_dc_feature(DisasContext *dc, int feature)
90{
91 return (dc->features & (1ULL << feature)) != 0;
92}
93
94static inline int get_mem_index(DisasContext *s)
95{
96 return arm_to_core_mmu_idx(s->mmu_idx);
97}
98
99
100
101
102static inline int default_exception_el(DisasContext *s)
103{
104
105
106
107
108
109 return (s->mmu_idx == ARMMMUIdx_S1SE0 && s->secure_routed_to_el3)
110 ? 3 : MAX(1, s->current_el);
111}
112
113static inline void disas_set_insn_syndrome(DisasContext *s, uint32_t syn)
114{
115
116
117
118 syn &= ARM_INSN_START_WORD2_MASK;
119 syn >>= ARM_INSN_START_WORD2_SHIFT;
120
121
122 assert(s->insn_start != NULL);
123 tcg_set_insn_start_param(s->insn_start, 2, syn);
124 s->insn_start = NULL;
125}
126
127
128#define DISAS_JUMP DISAS_TARGET_0
129#define DISAS_UPDATE DISAS_TARGET_1
130
131
132
133
134#define DISAS_WFI DISAS_TARGET_2
135#define DISAS_SWI DISAS_TARGET_3
136
137#define DISAS_WFE DISAS_TARGET_4
138#define DISAS_HVC DISAS_TARGET_5
139#define DISAS_SMC DISAS_TARGET_6
140#define DISAS_YIELD DISAS_TARGET_7
141
142
143
144#define DISAS_BX_EXCRET DISAS_TARGET_8
145
146
147
148
149
150
151#define DISAS_EXIT DISAS_TARGET_9
152
153#ifdef TARGET_AARCH64
154void a64_translate_init(void);
155void gen_a64_set_pc_im(uint64_t val);
156void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
157 fprintf_function cpu_fprintf, int flags);
158extern const TranslatorOps aarch64_translator_ops;
159#else
160static inline void a64_translate_init(void)
161{
162}
163
164static inline void gen_a64_set_pc_im(uint64_t val)
165{
166}
167
168static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
169 fprintf_function cpu_fprintf,
170 int flags)
171{
172}
173#endif
174
175void arm_test_cc(DisasCompare *cmp, int cc);
176void arm_free_cc(DisasCompare *cmp);
177void arm_jump_cc(DisasCompare *cmp, TCGLabel *label);
178void arm_gen_test_cc(int cc, TCGLabel *label);
179
180#endif
181