LXR qemu/tests/tcg/mips/mips64-dsp/maq_s_l

   1#include "io.h"
   2
   3int main(void)
   4{
   5    long long rt, rs, dsp;
   6    long long achi, acli;
   7    long long acho, aclo;
   8    long long resulth, resultl;
   9
  10    achi = 0x05;
  11    acli = 0xB4CB;
  12    rs  = 0x98765432FF060000;
  13    rt  = 0xfdeca987CB000000;
  14    resulth = 0x05;
  15    resultl = 0x18278587;
  16
  17    __asm
  18        ("mthi %2, $ac1\n\t"
  19         "mtlo %3, $ac1\n\t"
  20         "maq_s.l.pwl $ac1, %4, %5\n\t"
  21         "mfhi %0, $ac1\n\t"
  22         "mflo %1, $ac1\n\t"
  23         : "=r"(acho), "=r"(aclo)
  24         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  25        );
  26    if ((resulth != acho) || (resultl != aclo)) {
  27        printf("maq_s_l.w.pwl wrong 1\n");
  28
  29        return -1;
  30    }
  31
  32    achi = 0x05;
  33    acli = 0xB4CB;
  34    rs  = 0x80000000FF060000;
  35    rt  = 0x80000000CB000000;
  36    resulth = 0x05;
  37    resultl = 0xb4ca;
  38
  39    __asm
  40        ("mthi %3, $ac1\n\t"
  41         "mtlo %4, $ac1\n\t"
  42         "maq_s.l.pwl $ac1, %5, %6\n\t"
  43         "mfhi %0, $ac1\n\t"
  44         "mflo %1, $ac1\n\t"
  45         "rddsp %2\n\t"
  46         : "=r"(acho), "=r"(aclo), "=r"(dsp)
  47         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  48        );
  49    dsp = (dsp >> 17) & 0x1;
  50    if ((dsp != 0x1) || (resulth != acho) || (resultl != aclo)) {
  51        printf("maq_s_l.w.pwl wrong 2\n");
  52
  53        return -1;
  54    }
  55    return 0;
  56}
  57