qemu/hw/i2c/bitbang_i2c.c
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   1/*
   2 * Bit-Bang i2c emulation extracted from
   3 * Marvell MV88W8618 / Freecom MusicPal emulation.
   4 *
   5 * Copyright (c) 2008 Jan Kiszka
   6 *
   7 * This code is licensed under the GNU GPL v2.
   8 *
   9 * Contributions after 2012-01-13 are licensed under the terms of the
  10 * GNU GPL, version 2 or (at your option) any later version.
  11 */
  12#include "qemu/osdep.h"
  13#include "hw/hw.h"
  14#include "bitbang_i2c.h"
  15#include "hw/sysbus.h"
  16
  17//#define DEBUG_BITBANG_I2C
  18
  19#ifdef DEBUG_BITBANG_I2C
  20#define DPRINTF(fmt, ...) \
  21do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0)
  22#else
  23#define DPRINTF(fmt, ...) do {} while(0)
  24#endif
  25
  26typedef enum bitbang_i2c_state {
  27    STOPPED = 0,
  28    SENDING_BIT7,
  29    SENDING_BIT6,
  30    SENDING_BIT5,
  31    SENDING_BIT4,
  32    SENDING_BIT3,
  33    SENDING_BIT2,
  34    SENDING_BIT1,
  35    SENDING_BIT0,
  36    WAITING_FOR_ACK,
  37    RECEIVING_BIT7,
  38    RECEIVING_BIT6,
  39    RECEIVING_BIT5,
  40    RECEIVING_BIT4,
  41    RECEIVING_BIT3,
  42    RECEIVING_BIT2,
  43    RECEIVING_BIT1,
  44    RECEIVING_BIT0,
  45    SENDING_ACK,
  46    SENT_NACK
  47} bitbang_i2c_state;
  48
  49struct bitbang_i2c_interface {
  50    I2CBus *bus;
  51    bitbang_i2c_state state;
  52    int last_data;
  53    int last_clock;
  54    int device_out;
  55    uint8_t buffer;
  56    int current_addr;
  57};
  58
  59static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c)
  60{
  61    DPRINTF("STOP\n");
  62    if (i2c->current_addr >= 0)
  63        i2c_end_transfer(i2c->bus);
  64    i2c->current_addr = -1;
  65    i2c->state = STOPPED;
  66}
  67
  68/* Set device data pin.  */
  69static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level)
  70{
  71    i2c->device_out = level;
  72    //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out);
  73    return level & i2c->last_data;
  74}
  75
  76/* Leave device data pin unodified.  */
  77static int bitbang_i2c_nop(bitbang_i2c_interface *i2c)
  78{
  79    return bitbang_i2c_ret(i2c, i2c->device_out);
  80}
  81
  82/* Returns data line level.  */
  83int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level)
  84{
  85    int data;
  86
  87    if (level != 0 && level != 1) {
  88        abort();
  89    }
  90
  91    if (line == BITBANG_I2C_SDA) {
  92        if (level == i2c->last_data) {
  93            return bitbang_i2c_nop(i2c);
  94        }
  95        i2c->last_data = level;
  96        if (i2c->last_clock == 0) {
  97            return bitbang_i2c_nop(i2c);
  98        }
  99        if (level == 0) {
 100            DPRINTF("START\n");
 101            /* START condition.  */
 102            i2c->state = SENDING_BIT7;
 103            i2c->current_addr = -1;
 104        } else {
 105            /* STOP condition.  */
 106            bitbang_i2c_enter_stop(i2c);
 107        }
 108        return bitbang_i2c_ret(i2c, 1);
 109    }
 110
 111    data = i2c->last_data;
 112    if (i2c->last_clock == level) {
 113        return bitbang_i2c_nop(i2c);
 114    }
 115    i2c->last_clock = level;
 116    if (level == 0) {
 117        /* State is set/read at the start of the clock pulse.
 118           release the data line at the end.  */
 119        return bitbang_i2c_ret(i2c, 1);
 120    }
 121    switch (i2c->state) {
 122    case STOPPED:
 123    case SENT_NACK:
 124        return bitbang_i2c_ret(i2c, 1);
 125
 126    case SENDING_BIT7 ... SENDING_BIT0:
 127        i2c->buffer = (i2c->buffer << 1) | data;
 128        /* will end up in WAITING_FOR_ACK */
 129        i2c->state++; 
 130        return bitbang_i2c_ret(i2c, 1);
 131
 132    case WAITING_FOR_ACK:
 133    {
 134        int ret;
 135
 136        if (i2c->current_addr < 0) {
 137            i2c->current_addr = i2c->buffer;
 138            DPRINTF("Address 0x%02x\n", i2c->current_addr);
 139            ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1,
 140                                     i2c->current_addr & 1);
 141        } else {
 142            DPRINTF("Sent 0x%02x\n", i2c->buffer);
 143            ret = i2c_send(i2c->bus, i2c->buffer);
 144        }
 145        if (ret) {
 146            /* NACK (either addressing a nonexistent device, or the
 147             * device we were sending to decided to NACK us).
 148             */
 149            DPRINTF("Got NACK\n");
 150            bitbang_i2c_enter_stop(i2c);
 151            return bitbang_i2c_ret(i2c, 1);
 152        }
 153        if (i2c->current_addr & 1) {
 154            i2c->state = RECEIVING_BIT7;
 155        } else {
 156            i2c->state = SENDING_BIT7;
 157        }
 158        return bitbang_i2c_ret(i2c, 0);
 159    }
 160    case RECEIVING_BIT7:
 161        i2c->buffer = i2c_recv(i2c->bus);
 162        DPRINTF("RX byte 0x%02x\n", i2c->buffer);
 163        /* Fall through... */
 164    case RECEIVING_BIT6 ... RECEIVING_BIT0:
 165        data = i2c->buffer >> 7;
 166        /* will end up in SENDING_ACK */
 167        i2c->state++;
 168        i2c->buffer <<= 1;
 169        return bitbang_i2c_ret(i2c, data);
 170
 171    case SENDING_ACK:
 172        i2c->state = RECEIVING_BIT7;
 173        if (data != 0) {
 174            DPRINTF("NACKED\n");
 175            i2c->state = SENT_NACK;
 176            i2c_nack(i2c->bus);
 177        } else {
 178            DPRINTF("ACKED\n");
 179        }
 180        return bitbang_i2c_ret(i2c, 1);
 181    }
 182    abort();
 183}
 184
 185bitbang_i2c_interface *bitbang_i2c_init(I2CBus *bus)
 186{
 187    bitbang_i2c_interface *s;
 188
 189    s = g_malloc0(sizeof(bitbang_i2c_interface));
 190
 191    s->bus = bus;
 192    s->last_data = 1;
 193    s->last_clock = 1;
 194    s->device_out = 1;
 195
 196    return s;
 197}
 198
 199/* GPIO interface.  */
 200
 201#define TYPE_GPIO_I2C "gpio_i2c"
 202#define GPIO_I2C(obj) OBJECT_CHECK(GPIOI2CState, (obj), TYPE_GPIO_I2C)
 203
 204typedef struct GPIOI2CState {
 205    SysBusDevice parent_obj;
 206
 207    MemoryRegion dummy_iomem;
 208    bitbang_i2c_interface *bitbang;
 209    int last_level;
 210    qemu_irq out;
 211} GPIOI2CState;
 212
 213static void bitbang_i2c_gpio_set(void *opaque, int irq, int level)
 214{
 215    GPIOI2CState *s = opaque;
 216
 217    level = bitbang_i2c_set(s->bitbang, irq, level);
 218    if (level != s->last_level) {
 219        s->last_level = level;
 220        qemu_set_irq(s->out, level);
 221    }
 222}
 223
 224static void gpio_i2c_init(Object *obj)
 225{
 226    DeviceState *dev = DEVICE(obj);
 227    GPIOI2CState *s = GPIO_I2C(obj);
 228    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 229    I2CBus *bus;
 230
 231    memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0);
 232    sysbus_init_mmio(sbd, &s->dummy_iomem);
 233
 234    bus = i2c_init_bus(dev, "i2c");
 235    s->bitbang = bitbang_i2c_init(bus);
 236
 237    qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2);
 238    qdev_init_gpio_out(dev, &s->out, 1);
 239}
 240
 241static void gpio_i2c_class_init(ObjectClass *klass, void *data)
 242{
 243    DeviceClass *dc = DEVICE_CLASS(klass);
 244
 245    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 246    dc->desc = "Virtual GPIO to I2C bridge";
 247}
 248
 249static const TypeInfo gpio_i2c_info = {
 250    .name          = TYPE_GPIO_I2C,
 251    .parent        = TYPE_SYS_BUS_DEVICE,
 252    .instance_size = sizeof(GPIOI2CState),
 253    .instance_init = gpio_i2c_init,
 254    .class_init    = gpio_i2c_class_init,
 255};
 256
 257static void bitbang_i2c_register_types(void)
 258{
 259    type_register_static(&gpio_i2c_info);
 260}
 261
 262type_init(bitbang_i2c_register_types)
 263