LXR qemu/hw/isa/i82378.c

   1/*
   2 * QEMU Intel i82378 emulation (PCI to ISA bridge)
   3 *
   4 * Copyright (c) 2010-2011 Hervé Poussineau
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "hw/pci/pci.h"
  22#include "hw/i386/pc.h"
  23#include "hw/timer/i8254.h"
  24#include "hw/timer/mc146818rtc.h"
  25#include "hw/audio/pcspk.h"
  26
  27#define TYPE_I82378 "i82378"
  28#define I82378(obj) \
  29    OBJECT_CHECK(I82378State, (obj), TYPE_I82378)
  30
  31typedef struct I82378State {
  32    PCIDevice parent_obj;
  33
  34    qemu_irq out[2];
  35    qemu_irq *i8259;
  36    MemoryRegion io;
  37} I82378State;
  38
  39static const VMStateDescription vmstate_i82378 = {
  40    .name = "pci-i82378",
  41    .version_id = 0,
  42    .minimum_version_id = 0,
  43    .fields = (VMStateField[]) {
  44        VMSTATE_PCI_DEVICE(parent_obj, I82378State),
  45        VMSTATE_END_OF_LIST()
  46    },
  47};
  48
  49static void i82378_request_out0_irq(void *opaque, int irq, int level)
  50{
  51    I82378State *s = opaque;
  52    qemu_set_irq(s->out[0], level);
  53}
  54
  55static void i82378_request_pic_irq(void *opaque, int irq, int level)
  56{
  57    DeviceState *dev = opaque;
  58    I82378State *s = I82378(dev);
  59
  60    qemu_set_irq(s->i8259[irq], level);
  61}
  62
  63static void i82378_realize(PCIDevice *pci, Error **errp)
  64{
  65    DeviceState *dev = DEVICE(pci);
  66    I82378State *s = I82378(dev);
  67    uint8_t *pci_conf;
  68    ISABus *isabus;
  69    ISADevice *isa;
  70
  71    pci_conf = pci->config;
  72    pci_set_word(pci_conf + PCI_COMMAND,
  73                 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
  74    pci_set_word(pci_conf + PCI_STATUS,
  75                 PCI_STATUS_DEVSEL_MEDIUM);
  76
  77    pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */
  78
  79    isabus = isa_bus_new(dev, get_system_memory(),
  80                         pci_address_space_io(pci), errp);
  81    if (!isabus) {
  82        return;
  83    }
  84
  85    /* This device has:
  86       2 82C59 (irq)
  87       1 82C54 (pit)
  88       2 82C37 (dma)
  89       NMI
  90       Utility Bus Support Registers
  91
  92       All devices accept byte access only, except timer
  93     */
  94
  95    /* 2 82C59 (irq) */
  96    s->i8259 = i8259_init(isabus,
  97                          qemu_allocate_irq(i82378_request_out0_irq, s, 0));
  98    isa_bus_irqs(isabus, s->i8259);
  99
 100    /* 1 82C54 (pit) */
 101    isa = i8254_pit_init(isabus, 0x40, 0, NULL);
 102
 103    /* speaker */
 104    pcspk_init(isabus, isa);
 105
 106    /* 2 82C37 (dma) */
 107    isa = isa_create_simple(isabus, "i82374");
 108
 109    /* timer */
 110    isa_create_simple(isabus, TYPE_MC146818_RTC);
 111}
 112
 113static void i82378_init(Object *obj)
 114{
 115    DeviceState *dev = DEVICE(obj);
 116    I82378State *s = I82378(obj);
 117
 118    qdev_init_gpio_out(dev, s->out, 1);
 119    qdev_init_gpio_in(dev, i82378_request_pic_irq, 16);
 120}
 121
 122static void i82378_class_init(ObjectClass *klass, void *data)
 123{
 124    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 125    DeviceClass *dc = DEVICE_CLASS(klass);
 126
 127    k->realize = i82378_realize;
 128    k->vendor_id = PCI_VENDOR_ID_INTEL;
 129    k->device_id = PCI_DEVICE_ID_INTEL_82378;
 130    k->revision = 0x03;
 131    k->class_id = PCI_CLASS_BRIDGE_ISA;
 132    dc->vmsd = &vmstate_i82378;
 133    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 134}
 135
 136static const TypeInfo i82378_type_info = {
 137    .name = TYPE_I82378,
 138    .parent = TYPE_PCI_DEVICE,
 139    .instance_size = sizeof(I82378State),
 140    .instance_init = i82378_init,
 141    .class_init = i82378_class_init,
 142    .interfaces = (InterfaceInfo[]) {
 143        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
 144        { },
 145    },
 146};
 147
 148static void i82378_register_types(void)
 149{
 150    type_register_static(&i82378_type_info);
 151}
 152
 153type_init(i82378_register_types)
 154