qemu/hw/mips/mips_r4k.c
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   1/*
   2 * QEMU/MIPS pseudo-board
   3 *
   4 * emulates a simple machine with ISA-like bus.
   5 * ISA IO space mapped to the 0x14000000 (PHYS) and
   6 * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7 * All peripherial devices are attached to this "bus" with
   8 * the standard PC ISA addresses.
   9*/
  10#include "qemu/osdep.h"
  11#include "qapi/error.h"
  12#include "qemu-common.h"
  13#include "cpu.h"
  14#include "hw/hw.h"
  15#include "hw/mips/mips.h"
  16#include "hw/mips/cpudevs.h"
  17#include "hw/i386/pc.h"
  18#include "hw/char/serial.h"
  19#include "hw/isa/isa.h"
  20#include "net/net.h"
  21#include "hw/net/ne2000-isa.h"
  22#include "sysemu/sysemu.h"
  23#include "hw/boards.h"
  24#include "hw/block/flash.h"
  25#include "qemu/log.h"
  26#include "hw/mips/bios.h"
  27#include "hw/ide.h"
  28#include "hw/loader.h"
  29#include "elf.h"
  30#include "hw/timer/mc146818rtc.h"
  31#include "hw/input/i8042.h"
  32#include "hw/timer/i8254.h"
  33#include "sysemu/block-backend.h"
  34#include "exec/address-spaces.h"
  35#include "sysemu/qtest.h"
  36#include "qemu/error-report.h"
  37
  38#define MAX_IDE_BUS 2
  39
  40static const int ide_iobase[2] = { 0x1f0, 0x170 };
  41static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  42static const int ide_irq[2] = { 14, 15 };
  43
  44static ISADevice *pit; /* PIT i8254 */
  45
  46/* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  47
  48static struct _loaderparams {
  49    int ram_size;
  50    const char *kernel_filename;
  51    const char *kernel_cmdline;
  52    const char *initrd_filename;
  53} loaderparams;
  54
  55static void mips_qemu_write (void *opaque, hwaddr addr,
  56                             uint64_t val, unsigned size)
  57{
  58    if ((addr & 0xffff) == 0 && val == 42)
  59        qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
  60    else if ((addr & 0xffff) == 4 && val == 42)
  61        qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  62}
  63
  64static uint64_t mips_qemu_read (void *opaque, hwaddr addr,
  65                                unsigned size)
  66{
  67    return 0;
  68}
  69
  70static const MemoryRegionOps mips_qemu_ops = {
  71    .read = mips_qemu_read,
  72    .write = mips_qemu_write,
  73    .endianness = DEVICE_NATIVE_ENDIAN,
  74};
  75
  76typedef struct ResetData {
  77    MIPSCPU *cpu;
  78    uint64_t vector;
  79} ResetData;
  80
  81static int64_t load_kernel(void)
  82{
  83    int64_t entry, kernel_high;
  84    long kernel_size, initrd_size, params_size;
  85    ram_addr_t initrd_offset;
  86    uint32_t *params_buf;
  87    int big_endian;
  88
  89#ifdef TARGET_WORDS_BIGENDIAN
  90    big_endian = 1;
  91#else
  92    big_endian = 0;
  93#endif
  94    kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
  95                           NULL, (uint64_t *)&entry, NULL,
  96                           (uint64_t *)&kernel_high, big_endian,
  97                           EM_MIPS, 1, 0);
  98    if (kernel_size >= 0) {
  99        if ((entry & ~0x7fffffffULL) == 0x80000000)
 100            entry = (int32_t)entry;
 101    } else {
 102        error_report("could not load kernel '%s': %s",
 103                     loaderparams.kernel_filename,
 104                     load_elf_strerror(kernel_size));
 105        exit(1);
 106    }
 107
 108    /* load initrd */
 109    initrd_size = 0;
 110    initrd_offset = 0;
 111    if (loaderparams.initrd_filename) {
 112        initrd_size = get_image_size (loaderparams.initrd_filename);
 113        if (initrd_size > 0) {
 114            initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
 115            if (initrd_offset + initrd_size > ram_size) {
 116                error_report("memory too small for initial ram disk '%s'",
 117                             loaderparams.initrd_filename);
 118                exit(1);
 119            }
 120            initrd_size = load_image_targphys(loaderparams.initrd_filename,
 121                                              initrd_offset,
 122                                              ram_size - initrd_offset);
 123        }
 124        if (initrd_size == (target_ulong) -1) {
 125            error_report("could not load initial ram disk '%s'",
 126                         loaderparams.initrd_filename);
 127            exit(1);
 128        }
 129    }
 130
 131    /* Store command line.  */
 132    params_size = 264;
 133    params_buf = g_malloc(params_size);
 134
 135    params_buf[0] = tswap32(ram_size);
 136    params_buf[1] = tswap32(0x12345678);
 137
 138    if (initrd_size > 0) {
 139        snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s",
 140                 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 141                 initrd_size, loaderparams.kernel_cmdline);
 142    } else {
 143        snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline);
 144    }
 145
 146    rom_add_blob_fixed("params", params_buf, params_size,
 147                       (16 << 20) - 264);
 148
 149    g_free(params_buf);
 150    return entry;
 151}
 152
 153static void main_cpu_reset(void *opaque)
 154{
 155    ResetData *s = (ResetData *)opaque;
 156    CPUMIPSState *env = &s->cpu->env;
 157
 158    cpu_reset(CPU(s->cpu));
 159    env->active_tc.PC = s->vector;
 160}
 161
 162static const int sector_len = 32 * 1024;
 163static
 164void mips_r4k_init(MachineState *machine)
 165{
 166    ram_addr_t ram_size = machine->ram_size;
 167    const char *kernel_filename = machine->kernel_filename;
 168    const char *kernel_cmdline = machine->kernel_cmdline;
 169    const char *initrd_filename = machine->initrd_filename;
 170    char *filename;
 171    MemoryRegion *address_space_mem = get_system_memory();
 172    MemoryRegion *ram = g_new(MemoryRegion, 1);
 173    MemoryRegion *bios;
 174    MemoryRegion *iomem = g_new(MemoryRegion, 1);
 175    MemoryRegion *isa_io = g_new(MemoryRegion, 1);
 176    MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
 177    int bios_size;
 178    MIPSCPU *cpu;
 179    CPUMIPSState *env;
 180    ResetData *reset_info;
 181    int i;
 182    qemu_irq *i8259;
 183    ISABus *isa_bus;
 184    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 185    DriveInfo *dinfo;
 186    int be;
 187
 188    /* init CPUs */
 189    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
 190    env = &cpu->env;
 191
 192    reset_info = g_malloc0(sizeof(ResetData));
 193    reset_info->cpu = cpu;
 194    reset_info->vector = env->active_tc.PC;
 195    qemu_register_reset(main_cpu_reset, reset_info);
 196
 197    /* allocate RAM */
 198    if (ram_size > (256 << 20)) {
 199        error_report("Too much memory for this machine: %dMB, maximum 256MB",
 200                     ((unsigned int)ram_size / (1 << 20)));
 201        exit(1);
 202    }
 203    memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
 204
 205    memory_region_add_subregion(address_space_mem, 0, ram);
 206
 207    memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000);
 208    memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 209
 210    /* Try to load a BIOS image. If this fails, we continue regardless,
 211       but initialize the hardware ourselves. When a kernel gets
 212       preloaded we also initialize the hardware, since the BIOS wasn't
 213       run. */
 214    if (bios_name == NULL)
 215        bios_name = BIOS_FILENAME;
 216    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 217    if (filename) {
 218        bios_size = get_image_size(filename);
 219    } else {
 220        bios_size = -1;
 221    }
 222#ifdef TARGET_WORDS_BIGENDIAN
 223    be = 1;
 224#else
 225    be = 0;
 226#endif
 227    if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 228        bios = g_new(MemoryRegion, 1);
 229        memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
 230                               &error_fatal);
 231        memory_region_set_readonly(bios, true);
 232        memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 233
 234        load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 235    } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
 236        uint32_t mips_rom = 0x00400000;
 237        if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom,
 238                                   blk_by_legacy_dinfo(dinfo),
 239                                   sector_len, mips_rom / sector_len,
 240                                   4, 0, 0, 0, 0, be)) {
 241            fprintf(stderr, "qemu: Error registering flash memory.\n");
 242        }
 243    } else if (!qtest_enabled()) {
 244        /* not fatal */
 245        warn_report("could not load MIPS bios '%s'", bios_name);
 246    }
 247    g_free(filename);
 248
 249    if (kernel_filename) {
 250        loaderparams.ram_size = ram_size;
 251        loaderparams.kernel_filename = kernel_filename;
 252        loaderparams.kernel_cmdline = kernel_cmdline;
 253        loaderparams.initrd_filename = initrd_filename;
 254        reset_info->vector = load_kernel();
 255    }
 256
 257    /* Init CPU internal devices */
 258    cpu_mips_irq_init_cpu(cpu);
 259    cpu_mips_clock_init(cpu);
 260
 261    /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
 262    memory_region_init_alias(isa_io, NULL, "isa-io",
 263                             get_system_io(), 0, 0x00010000);
 264    memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
 265    memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
 266    memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
 267    isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
 268
 269    /* The PIC is attached to the MIPS CPU INT0 pin */
 270    i8259 = i8259_init(isa_bus, env->irq[2]);
 271    isa_bus_irqs(isa_bus, i8259);
 272
 273    mc146818_rtc_init(isa_bus, 2000, NULL);
 274
 275    pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
 276
 277    serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
 278
 279    isa_vga_init(isa_bus);
 280
 281    if (nd_table[0].used)
 282        isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 283
 284    ide_drive_get(hd, ARRAY_SIZE(hd));
 285    for(i = 0; i < MAX_IDE_BUS; i++)
 286        isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 287                     hd[MAX_IDE_DEVS * i],
 288                     hd[MAX_IDE_DEVS * i + 1]);
 289
 290    isa_create_simple(isa_bus, TYPE_I8042);
 291}
 292
 293static void mips_machine_init(MachineClass *mc)
 294{
 295    mc->desc = "mips r4k platform";
 296    mc->init = mips_r4k_init;
 297    mc->block_default_type = IF_IDE;
 298#ifdef TARGET_MIPS64
 299    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
 300#else
 301    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
 302#endif
 303
 304}
 305
 306DEFINE_MACHINE("mips", mips_machine_init)
 307