qemu/hw/misc/auxbus.c
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   1/*
   2 * auxbus.c
   3 *
   4 *  Copyright 2015 : GreenSocs Ltd
   5 *      http://www.greensocs.com/ , email: info@greensocs.com
   6 *
   7 *  Developed by :
   8 *  Frederic Konrad   <fred.konrad@greensocs.com>
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation, either version 2 of the License, or
  13 * (at your option)any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License along
  21 * with this program; if not, see <http://www.gnu.org/licenses/>.
  22 *
  23 */
  24
  25/*
  26 * This is an implementation of the AUX bus for VESA Display Port v1.1a.
  27 */
  28
  29#include "qemu/osdep.h"
  30#include "qemu/log.h"
  31#include "hw/misc/auxbus.h"
  32#include "hw/i2c/i2c.h"
  33#include "monitor/monitor.h"
  34
  35#ifndef DEBUG_AUX
  36#define DEBUG_AUX 0
  37#endif
  38
  39#define DPRINTF(fmt, ...) do {                                                 \
  40    if (DEBUG_AUX) {                                                           \
  41        qemu_log("aux: " fmt , ## __VA_ARGS__);                                \
  42    }                                                                          \
  43} while (0)
  44
  45#define TYPE_AUXTOI2C "aux-to-i2c-bridge"
  46#define AUXTOI2C(obj) OBJECT_CHECK(AUXTOI2CState, (obj), TYPE_AUXTOI2C)
  47
  48static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent);
  49static inline I2CBus *aux_bridge_get_i2c_bus(AUXTOI2CState *bridge);
  50
  51/* aux-bus implementation (internal not public) */
  52static void aux_bus_class_init(ObjectClass *klass, void *data)
  53{
  54    BusClass *k = BUS_CLASS(klass);
  55
  56    /* AUXSlave has an MMIO so we need to change the way we print information
  57     * in monitor.
  58     */
  59    k->print_dev = aux_slave_dev_print;
  60}
  61
  62AUXBus *aux_init_bus(DeviceState *parent, const char *name)
  63{
  64    AUXBus *bus;
  65
  66    bus = AUX_BUS(qbus_create(TYPE_AUX_BUS, parent, name));
  67    bus->bridge = AUXTOI2C(qdev_create(BUS(bus), TYPE_AUXTOI2C));
  68
  69    /* Memory related. */
  70    bus->aux_io = g_malloc(sizeof(*bus->aux_io));
  71    memory_region_init(bus->aux_io, OBJECT(bus), "aux-io", (1 << 20));
  72    address_space_init(&bus->aux_addr_space, bus->aux_io, "aux-io");
  73    return bus;
  74}
  75
  76static void aux_bus_map_device(AUXBus *bus, AUXSlave *dev, hwaddr addr)
  77{
  78    memory_region_add_subregion(bus->aux_io, addr, dev->mmio);
  79}
  80
  81static bool aux_bus_is_bridge(AUXBus *bus, DeviceState *dev)
  82{
  83    return (dev == DEVICE(bus->bridge));
  84}
  85
  86I2CBus *aux_get_i2c_bus(AUXBus *bus)
  87{
  88    return aux_bridge_get_i2c_bus(bus->bridge);
  89}
  90
  91AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
  92                      uint8_t len, uint8_t *data)
  93{
  94    AUXReply ret = AUX_NACK;
  95    I2CBus *i2c_bus = aux_get_i2c_bus(bus);
  96    size_t i;
  97    bool is_write = false;
  98
  99    DPRINTF("request at address 0x%" PRIX32 ", command %u, len %u\n", address,
 100            cmd, len);
 101
 102    switch (cmd) {
 103    /*
 104     * Forward the request on the AUX bus..
 105     */
 106    case WRITE_AUX:
 107    case READ_AUX:
 108        is_write = cmd == READ_AUX ? false : true;
 109        for (i = 0; i < len; i++) {
 110            if (!address_space_rw(&bus->aux_addr_space, address++,
 111                                  MEMTXATTRS_UNSPECIFIED, data++, 1,
 112                                  is_write)) {
 113                ret = AUX_I2C_ACK;
 114            } else {
 115                ret = AUX_NACK;
 116                break;
 117            }
 118        }
 119        break;
 120    /*
 121     * Classic I2C transactions..
 122     */
 123    case READ_I2C:
 124    case WRITE_I2C:
 125        is_write = cmd == READ_I2C ? false : true;
 126        if (i2c_bus_busy(i2c_bus)) {
 127            i2c_end_transfer(i2c_bus);
 128        }
 129
 130        if (i2c_start_transfer(i2c_bus, address, is_write)) {
 131            ret = AUX_I2C_NACK;
 132            break;
 133        }
 134
 135        ret = AUX_I2C_ACK;
 136        while (len > 0) {
 137            if (i2c_send_recv(i2c_bus, data++, is_write) < 0) {
 138                ret = AUX_I2C_NACK;
 139                break;
 140            }
 141            len--;
 142        }
 143        i2c_end_transfer(i2c_bus);
 144        break;
 145    /*
 146     * I2C MOT transactions.
 147     *
 148     * Here we send a start when:
 149     *  - We didn't start transaction yet.
 150     *  - We had a READ and we do a WRITE.
 151     *  - We changed the address.
 152     */
 153    case WRITE_I2C_MOT:
 154    case READ_I2C_MOT:
 155        is_write = cmd == READ_I2C_MOT ? false : true;
 156        ret = AUX_I2C_NACK;
 157        if (!i2c_bus_busy(i2c_bus)) {
 158            /*
 159             * No transactions started..
 160             */
 161            if (i2c_start_transfer(i2c_bus, address, is_write)) {
 162                break;
 163            }
 164        } else if ((address != bus->last_i2c_address) ||
 165                   (bus->last_transaction != cmd)) {
 166            /*
 167             * Transaction started but we need to restart..
 168             */
 169            i2c_end_transfer(i2c_bus);
 170            if (i2c_start_transfer(i2c_bus, address, is_write)) {
 171                break;
 172            }
 173        }
 174
 175        bus->last_transaction = cmd;
 176        bus->last_i2c_address = address;
 177        while (len > 0) {
 178            if (i2c_send_recv(i2c_bus, data++, is_write) < 0) {
 179                i2c_end_transfer(i2c_bus);
 180                break;
 181            }
 182            len--;
 183        }
 184        if (len == 0) {
 185            ret = AUX_I2C_ACK;
 186        }
 187        break;
 188    default:
 189        DPRINTF("Not implemented!\n");
 190        return AUX_NACK;
 191    }
 192
 193    DPRINTF("reply: %u\n", ret);
 194    return ret;
 195}
 196
 197static const TypeInfo aux_bus_info = {
 198    .name = TYPE_AUX_BUS,
 199    .parent = TYPE_BUS,
 200    .instance_size = sizeof(AUXBus),
 201    .class_init = aux_bus_class_init
 202};
 203
 204/* aux-i2c implementation (internal not public) */
 205struct AUXTOI2CState {
 206    /*< private >*/
 207    DeviceState parent_obj;
 208
 209    /*< public >*/
 210    I2CBus *i2c_bus;
 211};
 212
 213static void aux_bridge_class_init(ObjectClass *oc, void *data)
 214{
 215    DeviceClass *dc = DEVICE_CLASS(oc);
 216
 217    /* This device is private and is created only once for each
 218     * aux-bus in aux_init_bus(..). So don't allow the user to add one.
 219     */
 220    dc->user_creatable = false;
 221}
 222
 223static void aux_bridge_init(Object *obj)
 224{
 225    AUXTOI2CState *s = AUXTOI2C(obj);
 226
 227    s->i2c_bus = i2c_init_bus(DEVICE(obj), "aux-i2c");
 228}
 229
 230static inline I2CBus *aux_bridge_get_i2c_bus(AUXTOI2CState *bridge)
 231{
 232    return bridge->i2c_bus;
 233}
 234
 235static const TypeInfo aux_to_i2c_type_info = {
 236    .name = TYPE_AUXTOI2C,
 237    .parent = TYPE_DEVICE,
 238    .class_init = aux_bridge_class_init,
 239    .instance_size = sizeof(AUXTOI2CState),
 240    .instance_init = aux_bridge_init
 241};
 242
 243/* aux-slave implementation */
 244static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent)
 245{
 246    AUXBus *bus = AUX_BUS(qdev_get_parent_bus(dev));
 247    AUXSlave *s;
 248
 249    /* Don't print anything if the device is I2C "bridge". */
 250    if (aux_bus_is_bridge(bus, dev)) {
 251        return;
 252    }
 253
 254    s = AUX_SLAVE(dev);
 255
 256    monitor_printf(mon, "%*smemory " TARGET_FMT_plx "/" TARGET_FMT_plx "\n",
 257                   indent, "",
 258                   object_property_get_uint(OBJECT(s->mmio), "addr", NULL),
 259                   memory_region_size(s->mmio));
 260}
 261
 262DeviceState *aux_create_slave(AUXBus *bus, const char *type, uint32_t addr)
 263{
 264    DeviceState *dev;
 265
 266    dev = DEVICE(object_new(type));
 267    assert(dev);
 268    qdev_set_parent_bus(dev, &bus->qbus);
 269    qdev_init_nofail(dev);
 270    aux_bus_map_device(AUX_BUS(qdev_get_parent_bus(dev)), AUX_SLAVE(dev), addr);
 271    return dev;
 272}
 273
 274void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio)
 275{
 276    assert(!aux_slave->mmio);
 277    aux_slave->mmio = mmio;
 278}
 279
 280static void aux_slave_class_init(ObjectClass *klass, void *data)
 281{
 282    DeviceClass *k = DEVICE_CLASS(klass);
 283
 284    set_bit(DEVICE_CATEGORY_MISC, k->categories);
 285    k->bus_type = TYPE_AUX_BUS;
 286}
 287
 288static const TypeInfo aux_slave_type_info = {
 289    .name = TYPE_AUX_SLAVE,
 290    .parent = TYPE_DEVICE,
 291    .instance_size = sizeof(AUXSlave),
 292    .abstract = true,
 293    .class_init = aux_slave_class_init,
 294};
 295
 296static void aux_register_types(void)
 297{
 298    type_register_static(&aux_bus_info);
 299    type_register_static(&aux_slave_type_info);
 300    type_register_static(&aux_to_i2c_type_info);
 301}
 302
 303type_init(aux_register_types)
 304