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25#include "tcg.h"
26#include "exec/helper-proto.h"
27#include "exec/helper-gen.h"
28
29
30
31void tcg_gen_op1(TCGOpcode, TCGArg);
32void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
33void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
34void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
35void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
36void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
37
38void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
39void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
40void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
41
42static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
43{
44 tcg_gen_op1(opc, tcgv_i32_arg(a1));
45}
46
47static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
48{
49 tcg_gen_op1(opc, tcgv_i64_arg(a1));
50}
51
52static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
53{
54 tcg_gen_op1(opc, a1);
55}
56
57static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
58{
59 tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
60}
61
62static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
63{
64 tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
65}
66
67static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
68{
69 tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
70}
71
72static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
73{
74 tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
75}
76
77static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
78{
79 tcg_gen_op2(opc, a1, a2);
80}
81
82static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
83 TCGv_i32 a2, TCGv_i32 a3)
84{
85 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
86}
87
88static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
89 TCGv_i64 a2, TCGv_i64 a3)
90{
91 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
92}
93
94static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
95 TCGv_i32 a2, TCGArg a3)
96{
97 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
98}
99
100static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
101 TCGv_i64 a2, TCGArg a3)
102{
103 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
104}
105
106static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
107 TCGv_ptr base, TCGArg offset)
108{
109 tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
110}
111
112static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
113 TCGv_ptr base, TCGArg offset)
114{
115 tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
116}
117
118static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
119 TCGv_i32 a3, TCGv_i32 a4)
120{
121 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
122 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
123}
124
125static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
126 TCGv_i64 a3, TCGv_i64 a4)
127{
128 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
129 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
130}
131
132static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
133 TCGv_i32 a3, TCGArg a4)
134{
135 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
136 tcgv_i32_arg(a3), a4);
137}
138
139static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
140 TCGv_i64 a3, TCGArg a4)
141{
142 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
143 tcgv_i64_arg(a3), a4);
144}
145
146static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
147 TCGArg a3, TCGArg a4)
148{
149 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
150}
151
152static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
153 TCGArg a3, TCGArg a4)
154{
155 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
156}
157
158static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
159 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
160{
161 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
162 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
163}
164
165static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
166 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
167{
168 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
169 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
170}
171
172static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
173 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
174{
175 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
176 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
177}
178
179static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
180 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
181{
182 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
183 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
184}
185
186static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
187 TCGv_i32 a3, TCGArg a4, TCGArg a5)
188{
189 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
190 tcgv_i32_arg(a3), a4, a5);
191}
192
193static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
194 TCGv_i64 a3, TCGArg a4, TCGArg a5)
195{
196 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
197 tcgv_i64_arg(a3), a4, a5);
198}
199
200static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
201 TCGv_i32 a3, TCGv_i32 a4,
202 TCGv_i32 a5, TCGv_i32 a6)
203{
204 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
205 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
206 tcgv_i32_arg(a6));
207}
208
209static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
210 TCGv_i64 a3, TCGv_i64 a4,
211 TCGv_i64 a5, TCGv_i64 a6)
212{
213 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
214 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
215 tcgv_i64_arg(a6));
216}
217
218static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
219 TCGv_i32 a3, TCGv_i32 a4,
220 TCGv_i32 a5, TCGArg a6)
221{
222 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
223 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
224}
225
226static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
227 TCGv_i64 a3, TCGv_i64 a4,
228 TCGv_i64 a5, TCGArg a6)
229{
230 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
231 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
232}
233
234static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
235 TCGv_i32 a3, TCGv_i32 a4,
236 TCGArg a5, TCGArg a6)
237{
238 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
239 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
240}
241
242static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
243 TCGv_i64 a3, TCGv_i64 a4,
244 TCGArg a5, TCGArg a6)
245{
246 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
247 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
248}
249
250
251
252
253static inline void gen_set_label(TCGLabel *l)
254{
255 tcg_gen_op1(INDEX_op_set_label, label_arg(l));
256}
257
258static inline void tcg_gen_br(TCGLabel *l)
259{
260 tcg_gen_op1(INDEX_op_br, label_arg(l));
261}
262
263void tcg_gen_mb(TCGBar);
264
265
266
267
268
269void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
270void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
271void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
272void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
273void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
274void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
275void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
276void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
277void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
278void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
279void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
280void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
281void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
282void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
283void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
284void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
285void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
286void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
287void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
288void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
289void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
290void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
291void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
292void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
293void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
294void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
295void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
296void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
297void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
298void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
299 unsigned int ofs, unsigned int len);
300void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
301 unsigned int ofs, unsigned int len);
302void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
303 unsigned int ofs, unsigned int len);
304void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
305 unsigned int ofs, unsigned int len);
306void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
307void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
308void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
309 TCGv_i32 arg1, TCGv_i32 arg2);
310void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
311 TCGv_i32 arg1, int32_t arg2);
312void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
313 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
314void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
315 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
316void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
317 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
318void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
319void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
320void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
321void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
322void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
323void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
324void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
325void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
326void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
327
328static inline void tcg_gen_discard_i32(TCGv_i32 arg)
329{
330 tcg_gen_op1_i32(INDEX_op_discard, arg);
331}
332
333static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
334{
335 if (ret != arg) {
336 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
337 }
338}
339
340static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
341{
342 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
343}
344
345static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
346 tcg_target_long offset)
347{
348 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
349}
350
351static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
352 tcg_target_long offset)
353{
354 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
355}
356
357static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
358 tcg_target_long offset)
359{
360 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
361}
362
363static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
364 tcg_target_long offset)
365{
366 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
367}
368
369static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
370 tcg_target_long offset)
371{
372 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
373}
374
375static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
376 tcg_target_long offset)
377{
378 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
379}
380
381static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
382 tcg_target_long offset)
383{
384 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
385}
386
387static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
388 tcg_target_long offset)
389{
390 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
391}
392
393static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
394{
395 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
396}
397
398static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
399{
400 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
401}
402
403static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
404{
405 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
406}
407
408static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
409{
410 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
411}
412
413static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
414{
415 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
416}
417
418static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
419{
420 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
421}
422
423static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
424{
425 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
426}
427
428static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
429{
430 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
431}
432
433static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
434{
435 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
436}
437
438static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
439{
440 if (TCG_TARGET_HAS_neg_i32) {
441 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
442 } else {
443 tcg_gen_subfi_i32(ret, 0, arg);
444 }
445}
446
447static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
448{
449 if (TCG_TARGET_HAS_not_i32) {
450 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
451 } else {
452 tcg_gen_xori_i32(ret, arg, -1);
453 }
454}
455
456
457
458void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
459void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
460void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
461void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
462void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
463void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
464void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
465void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
466void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
467void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
468void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
469void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
470void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
471void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
472void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
473void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
474void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
475void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
476void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
477void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
478void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
479void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
480void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
481void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
482void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
483void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
484void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
485void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
486void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
487void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
488 unsigned int ofs, unsigned int len);
489void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
490 unsigned int ofs, unsigned int len);
491void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
492 unsigned int ofs, unsigned int len);
493void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
494 unsigned int ofs, unsigned int len);
495void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
496void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
497void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
498 TCGv_i64 arg1, TCGv_i64 arg2);
499void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
500 TCGv_i64 arg1, int64_t arg2);
501void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
502 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
503void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
504 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
505void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
506 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
507void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
508void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
509void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
510void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
511void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
512void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
513void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
514void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
515void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
516void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
517void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
518void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
519void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
520
521#if TCG_TARGET_REG_BITS == 64
522static inline void tcg_gen_discard_i64(TCGv_i64 arg)
523{
524 tcg_gen_op1_i64(INDEX_op_discard, arg);
525}
526
527static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
528{
529 if (ret != arg) {
530 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
531 }
532}
533
534static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
535{
536 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
537}
538
539static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
540 tcg_target_long offset)
541{
542 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
543}
544
545static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
546 tcg_target_long offset)
547{
548 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
549}
550
551static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
552 tcg_target_long offset)
553{
554 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
555}
556
557static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
558 tcg_target_long offset)
559{
560 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
561}
562
563static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
564 tcg_target_long offset)
565{
566 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
567}
568
569static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
570 tcg_target_long offset)
571{
572 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
573}
574
575static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
576 tcg_target_long offset)
577{
578 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
579}
580
581static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
582 tcg_target_long offset)
583{
584 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
585}
586
587static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
588 tcg_target_long offset)
589{
590 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
591}
592
593static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
594 tcg_target_long offset)
595{
596 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
597}
598
599static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
600 tcg_target_long offset)
601{
602 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
603}
604
605static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
606{
607 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
608}
609
610static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
611{
612 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
613}
614
615static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
616{
617 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
618}
619
620static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
621{
622 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
623}
624
625static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
626{
627 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
628}
629
630static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
631{
632 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
633}
634
635static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
636{
637 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
638}
639
640static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
641{
642 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
643}
644
645static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
646{
647 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
648}
649#else
650static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
651 tcg_target_long offset)
652{
653 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
654}
655
656static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
657 tcg_target_long offset)
658{
659 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
660}
661
662static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
663 tcg_target_long offset)
664{
665 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
666}
667
668static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
669{
670 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
671 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
672}
673
674static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
675{
676 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
677 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
678}
679
680void tcg_gen_discard_i64(TCGv_i64 arg);
681void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
682void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
683void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
684void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
685void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
686void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
687void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
688void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
689void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
690void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
691void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
692void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
693void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
694void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
695void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
696void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
697void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
698#endif
699
700static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
701{
702 if (TCG_TARGET_HAS_neg_i64) {
703 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
704 } else {
705 tcg_gen_subfi_i64(ret, 0, arg);
706 }
707}
708
709
710
711void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
712void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
713void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
714void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
715void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
716void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
717void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
718
719static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
720{
721 tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
722}
723
724
725
726#ifndef TARGET_LONG_BITS
727#error must include QEMU headers
728#endif
729
730#if TARGET_INSN_START_WORDS == 1
731# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
732static inline void tcg_gen_insn_start(target_ulong pc)
733{
734 tcg_gen_op1(INDEX_op_insn_start, pc);
735}
736# else
737static inline void tcg_gen_insn_start(target_ulong pc)
738{
739 tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
740}
741# endif
742#elif TARGET_INSN_START_WORDS == 2
743# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
744static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
745{
746 tcg_gen_op2(INDEX_op_insn_start, pc, a1);
747}
748# else
749static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
750{
751 tcg_gen_op4(INDEX_op_insn_start,
752 (uint32_t)pc, (uint32_t)(pc >> 32),
753 (uint32_t)a1, (uint32_t)(a1 >> 32));
754}
755# endif
756#elif TARGET_INSN_START_WORDS == 3
757# if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
758static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
759 target_ulong a2)
760{
761 tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
762}
763# else
764static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
765 target_ulong a2)
766{
767 tcg_gen_op6(INDEX_op_insn_start,
768 (uint32_t)pc, (uint32_t)(pc >> 32),
769 (uint32_t)a1, (uint32_t)(a1 >> 32),
770 (uint32_t)a2, (uint32_t)(a2 >> 32));
771}
772# endif
773#else
774# error "Unhandled number of operands to insn_start"
775#endif
776
777static inline void tcg_gen_exit_tb(uintptr_t val)
778{
779 tcg_gen_op1i(INDEX_op_exit_tb, val);
780}
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795void tcg_gen_goto_tb(unsigned idx);
796
797
798
799
800
801
802
803
804
805
806void tcg_gen_lookup_and_goto_ptr(void);
807
808#if TARGET_LONG_BITS == 32
809#define tcg_temp_new() tcg_temp_new_i32()
810#define tcg_global_reg_new tcg_global_reg_new_i32
811#define tcg_global_mem_new tcg_global_mem_new_i32
812#define tcg_temp_local_new() tcg_temp_local_new_i32()
813#define tcg_temp_free tcg_temp_free_i32
814#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
815#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
816#else
817#define tcg_temp_new() tcg_temp_new_i64()
818#define tcg_global_reg_new tcg_global_reg_new_i64
819#define tcg_global_mem_new tcg_global_mem_new_i64
820#define tcg_temp_local_new() tcg_temp_local_new_i64()
821#define tcg_temp_free tcg_temp_free_i64
822#define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
823#define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
824#endif
825
826void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
827void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
828void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
829void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
830
831static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
832{
833 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
834}
835
836static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
837{
838 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
839}
840
841static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
842{
843 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
844}
845
846static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
847{
848 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
849}
850
851static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
852{
853 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
854}
855
856static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
857{
858 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
859}
860
861static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
862{
863 tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
864}
865
866static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
867{
868 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
869}
870
871static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
872{
873 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
874}
875
876static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
877{
878 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
879}
880
881static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
882{
883 tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
884}
885
886void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
887 TCGArg, TCGMemOp);
888void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
889 TCGArg, TCGMemOp);
890
891void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
892void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
893void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
894void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
895void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
896void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
897void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
898void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
899void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
900void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
901void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
902void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
903void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
904void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
905void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
906void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
907void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
908void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
909
910void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
911void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
912void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
913void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
914void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
915void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
916void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
917void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
918void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
919void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
920void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
921void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
922void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
923void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
924void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
925void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
926void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
927void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
928
929void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
930void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
931void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
932
933void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
934 TCGv_vec a, TCGv_vec b);
935
936void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
937void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
938void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
939
940#if TARGET_LONG_BITS == 64
941#define tcg_gen_movi_tl tcg_gen_movi_i64
942#define tcg_gen_mov_tl tcg_gen_mov_i64
943#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
944#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
945#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
946#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
947#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
948#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
949#define tcg_gen_ld_tl tcg_gen_ld_i64
950#define tcg_gen_st8_tl tcg_gen_st8_i64
951#define tcg_gen_st16_tl tcg_gen_st16_i64
952#define tcg_gen_st32_tl tcg_gen_st32_i64
953#define tcg_gen_st_tl tcg_gen_st_i64
954#define tcg_gen_add_tl tcg_gen_add_i64
955#define tcg_gen_addi_tl tcg_gen_addi_i64
956#define tcg_gen_sub_tl tcg_gen_sub_i64
957#define tcg_gen_neg_tl tcg_gen_neg_i64
958#define tcg_gen_subfi_tl tcg_gen_subfi_i64
959#define tcg_gen_subi_tl tcg_gen_subi_i64
960#define tcg_gen_and_tl tcg_gen_and_i64
961#define tcg_gen_andi_tl tcg_gen_andi_i64
962#define tcg_gen_or_tl tcg_gen_or_i64
963#define tcg_gen_ori_tl tcg_gen_ori_i64
964#define tcg_gen_xor_tl tcg_gen_xor_i64
965#define tcg_gen_xori_tl tcg_gen_xori_i64
966#define tcg_gen_not_tl tcg_gen_not_i64
967#define tcg_gen_shl_tl tcg_gen_shl_i64
968#define tcg_gen_shli_tl tcg_gen_shli_i64
969#define tcg_gen_shr_tl tcg_gen_shr_i64
970#define tcg_gen_shri_tl tcg_gen_shri_i64
971#define tcg_gen_sar_tl tcg_gen_sar_i64
972#define tcg_gen_sari_tl tcg_gen_sari_i64
973#define tcg_gen_brcond_tl tcg_gen_brcond_i64
974#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
975#define tcg_gen_setcond_tl tcg_gen_setcond_i64
976#define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
977#define tcg_gen_mul_tl tcg_gen_mul_i64
978#define tcg_gen_muli_tl tcg_gen_muli_i64
979#define tcg_gen_div_tl tcg_gen_div_i64
980#define tcg_gen_rem_tl tcg_gen_rem_i64
981#define tcg_gen_divu_tl tcg_gen_divu_i64
982#define tcg_gen_remu_tl tcg_gen_remu_i64
983#define tcg_gen_discard_tl tcg_gen_discard_i64
984#define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
985#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
986#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
987#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
988#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
989#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
990#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
991#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
992#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
993#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
994#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
995#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
996#define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
997#define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
998#define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
999#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1000#define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1001#define tcg_gen_andc_tl tcg_gen_andc_i64
1002#define tcg_gen_eqv_tl tcg_gen_eqv_i64
1003#define tcg_gen_nand_tl tcg_gen_nand_i64
1004#define tcg_gen_nor_tl tcg_gen_nor_i64
1005#define tcg_gen_orc_tl tcg_gen_orc_i64
1006#define tcg_gen_clz_tl tcg_gen_clz_i64
1007#define tcg_gen_ctz_tl tcg_gen_ctz_i64
1008#define tcg_gen_clzi_tl tcg_gen_clzi_i64
1009#define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1010#define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1011#define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1012#define tcg_gen_rotl_tl tcg_gen_rotl_i64
1013#define tcg_gen_rotli_tl tcg_gen_rotli_i64
1014#define tcg_gen_rotr_tl tcg_gen_rotr_i64
1015#define tcg_gen_rotri_tl tcg_gen_rotri_i64
1016#define tcg_gen_deposit_tl tcg_gen_deposit_i64
1017#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1018#define tcg_gen_extract_tl tcg_gen_extract_i64
1019#define tcg_gen_sextract_tl tcg_gen_sextract_i64
1020#define tcg_const_tl tcg_const_i64
1021#define tcg_const_local_tl tcg_const_local_i64
1022#define tcg_gen_movcond_tl tcg_gen_movcond_i64
1023#define tcg_gen_add2_tl tcg_gen_add2_i64
1024#define tcg_gen_sub2_tl tcg_gen_sub2_i64
1025#define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1026#define tcg_gen_muls2_tl tcg_gen_muls2_i64
1027#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1028#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1029#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1030#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1031#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1032#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1033#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1034#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1035#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1036#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1037#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1038#define tcg_gen_dup_tl_vec tcg_gen_dup_i64_vec
1039#else
1040#define tcg_gen_movi_tl tcg_gen_movi_i32
1041#define tcg_gen_mov_tl tcg_gen_mov_i32
1042#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1043#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1044#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1045#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1046#define tcg_gen_ld32u_tl tcg_gen_ld_i32
1047#define tcg_gen_ld32s_tl tcg_gen_ld_i32
1048#define tcg_gen_ld_tl tcg_gen_ld_i32
1049#define tcg_gen_st8_tl tcg_gen_st8_i32
1050#define tcg_gen_st16_tl tcg_gen_st16_i32
1051#define tcg_gen_st32_tl tcg_gen_st_i32
1052#define tcg_gen_st_tl tcg_gen_st_i32
1053#define tcg_gen_add_tl tcg_gen_add_i32
1054#define tcg_gen_addi_tl tcg_gen_addi_i32
1055#define tcg_gen_sub_tl tcg_gen_sub_i32
1056#define tcg_gen_neg_tl tcg_gen_neg_i32
1057#define tcg_gen_subfi_tl tcg_gen_subfi_i32
1058#define tcg_gen_subi_tl tcg_gen_subi_i32
1059#define tcg_gen_and_tl tcg_gen_and_i32
1060#define tcg_gen_andi_tl tcg_gen_andi_i32
1061#define tcg_gen_or_tl tcg_gen_or_i32
1062#define tcg_gen_ori_tl tcg_gen_ori_i32
1063#define tcg_gen_xor_tl tcg_gen_xor_i32
1064#define tcg_gen_xori_tl tcg_gen_xori_i32
1065#define tcg_gen_not_tl tcg_gen_not_i32
1066#define tcg_gen_shl_tl tcg_gen_shl_i32
1067#define tcg_gen_shli_tl tcg_gen_shli_i32
1068#define tcg_gen_shr_tl tcg_gen_shr_i32
1069#define tcg_gen_shri_tl tcg_gen_shri_i32
1070#define tcg_gen_sar_tl tcg_gen_sar_i32
1071#define tcg_gen_sari_tl tcg_gen_sari_i32
1072#define tcg_gen_brcond_tl tcg_gen_brcond_i32
1073#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1074#define tcg_gen_setcond_tl tcg_gen_setcond_i32
1075#define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1076#define tcg_gen_mul_tl tcg_gen_mul_i32
1077#define tcg_gen_muli_tl tcg_gen_muli_i32
1078#define tcg_gen_div_tl tcg_gen_div_i32
1079#define tcg_gen_rem_tl tcg_gen_rem_i32
1080#define tcg_gen_divu_tl tcg_gen_divu_i32
1081#define tcg_gen_remu_tl tcg_gen_remu_i32
1082#define tcg_gen_discard_tl tcg_gen_discard_i32
1083#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1084#define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1085#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1086#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1087#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1088#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1089#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1090#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1091#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1092#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1093#define tcg_gen_ext32u_tl tcg_gen_mov_i32
1094#define tcg_gen_ext32s_tl tcg_gen_mov_i32
1095#define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1096#define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1097#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1098#define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1099#define tcg_gen_andc_tl tcg_gen_andc_i32
1100#define tcg_gen_eqv_tl tcg_gen_eqv_i32
1101#define tcg_gen_nand_tl tcg_gen_nand_i32
1102#define tcg_gen_nor_tl tcg_gen_nor_i32
1103#define tcg_gen_orc_tl tcg_gen_orc_i32
1104#define tcg_gen_clz_tl tcg_gen_clz_i32
1105#define tcg_gen_ctz_tl tcg_gen_ctz_i32
1106#define tcg_gen_clzi_tl tcg_gen_clzi_i32
1107#define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1108#define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1109#define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1110#define tcg_gen_rotl_tl tcg_gen_rotl_i32
1111#define tcg_gen_rotli_tl tcg_gen_rotli_i32
1112#define tcg_gen_rotr_tl tcg_gen_rotr_i32
1113#define tcg_gen_rotri_tl tcg_gen_rotri_i32
1114#define tcg_gen_deposit_tl tcg_gen_deposit_i32
1115#define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1116#define tcg_gen_extract_tl tcg_gen_extract_i32
1117#define tcg_gen_sextract_tl tcg_gen_sextract_i32
1118#define tcg_const_tl tcg_const_i32
1119#define tcg_const_local_tl tcg_const_local_i32
1120#define tcg_gen_movcond_tl tcg_gen_movcond_i32
1121#define tcg_gen_add2_tl tcg_gen_add2_i32
1122#define tcg_gen_sub2_tl tcg_gen_sub2_i32
1123#define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1124#define tcg_gen_muls2_tl tcg_gen_muls2_i32
1125#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1126#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1127#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1128#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1129#define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1130#define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1131#define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1132#define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1133#define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1134#define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1135#define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1136#define tcg_gen_dup_tl_vec tcg_gen_dup_i32_vec
1137#endif
1138
1139#if UINTPTR_MAX == UINT32_MAX
1140# define tcg_gen_ld_ptr(R, A, O) \
1141 tcg_gen_ld_i32(TCGV_PTR_TO_NAT(R), (A), (O))
1142# define tcg_gen_discard_ptr(A) \
1143 tcg_gen_discard_i32(TCGV_PTR_TO_NAT(A))
1144# define tcg_gen_add_ptr(R, A, B) \
1145 tcg_gen_add_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1146# define tcg_gen_addi_ptr(R, A, B) \
1147 tcg_gen_addi_i32(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1148# define tcg_gen_ext_i32_ptr(R, A) \
1149 tcg_gen_mov_i32(TCGV_PTR_TO_NAT(R), (A))
1150#else
1151# define tcg_gen_ld_ptr(R, A, O) \
1152 tcg_gen_ld_i64(TCGV_PTR_TO_NAT(R), (A), (O))
1153# define tcg_gen_discard_ptr(A) \
1154 tcg_gen_discard_i64(TCGV_PTR_TO_NAT(A))
1155# define tcg_gen_add_ptr(R, A, B) \
1156 tcg_gen_add_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), TCGV_PTR_TO_NAT(B))
1157# define tcg_gen_addi_ptr(R, A, B) \
1158 tcg_gen_addi_i64(TCGV_PTR_TO_NAT(R), TCGV_PTR_TO_NAT(A), (B))
1159# define tcg_gen_ext_i32_ptr(R, A) \
1160 tcg_gen_ext_i32_i64(TCGV_PTR_TO_NAT(R), (A))
1161#endif
1162
