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20#include "hw/hw.h"
21#include "hw/pci/pci.h"
22#include "qemu/event_notifier.h"
23#include "qemu/osdep.h"
24
25typedef struct PCITestDevHdr {
26 uint8_t test;
27 uint8_t width;
28 uint8_t pad0[2];
29 uint32_t offset;
30 uint8_t data;
31 uint8_t pad1[3];
32 uint32_t count;
33 uint8_t name[];
34} PCITestDevHdr;
35
36typedef struct IOTest {
37 MemoryRegion *mr;
38 EventNotifier notifier;
39 bool hasnotifier;
40 unsigned size;
41 bool match_data;
42 PCITestDevHdr *hdr;
43 unsigned bufsize;
44} IOTest;
45
46#define IOTEST_DATAMATCH 0xFA
47#define IOTEST_NOMATCH 0xCE
48
49#define IOTEST_IOSIZE 128
50#define IOTEST_MEMSIZE 2048
51
52static const char *iotest_test[] = {
53 "no-eventfd",
54 "wildcard-eventfd",
55 "datamatch-eventfd"
56};
57
58static const char *iotest_type[] = {
59 "mmio",
60 "portio"
61};
62
63#define IOTEST_TEST(i) (iotest_test[((i) % ARRAY_SIZE(iotest_test))])
64#define IOTEST_TYPE(i) (iotest_type[((i) / ARRAY_SIZE(iotest_test))])
65#define IOTEST_MAX_TEST (ARRAY_SIZE(iotest_test))
66#define IOTEST_MAX_TYPE (ARRAY_SIZE(iotest_type))
67#define IOTEST_MAX (IOTEST_MAX_TEST * IOTEST_MAX_TYPE)
68
69enum {
70 IOTEST_ACCESS_NAME,
71 IOTEST_ACCESS_DATA,
72 IOTEST_ACCESS_MAX,
73};
74
75#define IOTEST_ACCESS_TYPE uint8_t
76#define IOTEST_ACCESS_WIDTH (sizeof(uint8_t))
77
78typedef struct PCITestDevState {
79
80 PCIDevice parent_obj;
81
82
83 MemoryRegion mmio;
84 MemoryRegion portio;
85 IOTest *tests;
86 int current;
87} PCITestDevState;
88
89#define TYPE_PCI_TEST_DEV "pci-testdev"
90
91#define PCI_TEST_DEV(obj) \
92 OBJECT_CHECK(PCITestDevState, (obj), TYPE_PCI_TEST_DEV)
93
94#define IOTEST_IS_MEM(i) (strcmp(IOTEST_TYPE(i), "portio"))
95#define IOTEST_REGION(d, i) (IOTEST_IS_MEM(i) ? &(d)->mmio : &(d)->portio)
96#define IOTEST_SIZE(i) (IOTEST_IS_MEM(i) ? IOTEST_MEMSIZE : IOTEST_IOSIZE)
97#define IOTEST_PCI_BAR(i) (IOTEST_IS_MEM(i) ? PCI_BASE_ADDRESS_SPACE_MEMORY : \
98 PCI_BASE_ADDRESS_SPACE_IO)
99
100static int pci_testdev_start(IOTest *test)
101{
102 test->hdr->count = 0;
103 if (!test->hasnotifier) {
104 return 0;
105 }
106 event_notifier_test_and_clear(&test->notifier);
107 memory_region_add_eventfd(test->mr,
108 le32_to_cpu(test->hdr->offset),
109 test->size,
110 test->match_data,
111 test->hdr->data,
112 &test->notifier);
113 return 0;
114}
115
116static void pci_testdev_stop(IOTest *test)
117{
118 if (!test->hasnotifier) {
119 return;
120 }
121 memory_region_del_eventfd(test->mr,
122 le32_to_cpu(test->hdr->offset),
123 test->size,
124 test->match_data,
125 test->hdr->data,
126 &test->notifier);
127}
128
129static void
130pci_testdev_reset(PCITestDevState *d)
131{
132 if (d->current == -1) {
133 return;
134 }
135 pci_testdev_stop(&d->tests[d->current]);
136 d->current = -1;
137}
138
139static void pci_testdev_inc(IOTest *test, unsigned inc)
140{
141 uint32_t c = le32_to_cpu(test->hdr->count);
142 test->hdr->count = cpu_to_le32(c + inc);
143}
144
145static void
146pci_testdev_write(void *opaque, hwaddr addr, uint64_t val,
147 unsigned size, int type)
148{
149 PCITestDevState *d = opaque;
150 IOTest *test;
151 int t, r;
152
153 if (addr == offsetof(PCITestDevHdr, test)) {
154 pci_testdev_reset(d);
155 if (val >= IOTEST_MAX_TEST) {
156 return;
157 }
158 t = type * IOTEST_MAX_TEST + val;
159 r = pci_testdev_start(&d->tests[t]);
160 if (r < 0) {
161 return;
162 }
163 d->current = t;
164 return;
165 }
166 if (d->current < 0) {
167 return;
168 }
169 test = &d->tests[d->current];
170 if (addr != le32_to_cpu(test->hdr->offset)) {
171 return;
172 }
173 if (test->match_data && test->size != size) {
174 return;
175 }
176 if (test->match_data && val != test->hdr->data) {
177 return;
178 }
179 pci_testdev_inc(test, 1);
180}
181
182static uint64_t
183pci_testdev_read(void *opaque, hwaddr addr, unsigned size)
184{
185 PCITestDevState *d = opaque;
186 const char *buf;
187 IOTest *test;
188 if (d->current < 0) {
189 return 0;
190 }
191 test = &d->tests[d->current];
192 buf = (const char *)test->hdr;
193 if (addr + size >= test->bufsize) {
194 return 0;
195 }
196 if (test->hasnotifier) {
197 event_notifier_test_and_clear(&test->notifier);
198 }
199 return buf[addr];
200}
201
202static void
203pci_testdev_mmio_write(void *opaque, hwaddr addr, uint64_t val,
204 unsigned size)
205{
206 pci_testdev_write(opaque, addr, val, size, 0);
207}
208
209static void
210pci_testdev_pio_write(void *opaque, hwaddr addr, uint64_t val,
211 unsigned size)
212{
213 pci_testdev_write(opaque, addr, val, size, 1);
214}
215
216static const MemoryRegionOps pci_testdev_mmio_ops = {
217 .read = pci_testdev_read,
218 .write = pci_testdev_mmio_write,
219 .endianness = DEVICE_LITTLE_ENDIAN,
220 .impl = {
221 .min_access_size = 1,
222 .max_access_size = 1,
223 },
224};
225
226static const MemoryRegionOps pci_testdev_pio_ops = {
227 .read = pci_testdev_read,
228 .write = pci_testdev_pio_write,
229 .endianness = DEVICE_LITTLE_ENDIAN,
230 .impl = {
231 .min_access_size = 1,
232 .max_access_size = 1,
233 },
234};
235
236static int pci_testdev_init(PCIDevice *pci_dev)
237{
238 PCITestDevState *d = PCI_TEST_DEV(pci_dev);
239 uint8_t *pci_conf;
240 char *name;
241 int r, i;
242
243 pci_conf = pci_dev->config;
244
245 pci_conf[PCI_INTERRUPT_PIN] = 0;
246
247 memory_region_init_io(&d->mmio, OBJECT(d), &pci_testdev_mmio_ops, d,
248 "pci-testdev-mmio", IOTEST_MEMSIZE * 2);
249 memory_region_init_io(&d->portio, OBJECT(d), &pci_testdev_pio_ops, d,
250 "pci-testdev-portio", IOTEST_IOSIZE * 2);
251 pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
252 pci_register_bar(pci_dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &d->portio);
253
254 d->current = -1;
255 d->tests = g_malloc0(IOTEST_MAX * sizeof *d->tests);
256 for (i = 0; i < IOTEST_MAX; ++i) {
257 IOTest *test = &d->tests[i];
258 name = g_strdup_printf("%s-%s", IOTEST_TYPE(i), IOTEST_TEST(i));
259 test->bufsize = sizeof(PCITestDevHdr) + strlen(name) + 1;
260 test->hdr = g_malloc0(test->bufsize);
261 memcpy(test->hdr->name, name, strlen(name) + 1);
262 g_free(name);
263 test->hdr->offset = cpu_to_le32(IOTEST_SIZE(i) + i * IOTEST_ACCESS_WIDTH);
264 test->size = IOTEST_ACCESS_WIDTH;
265 test->match_data = strcmp(IOTEST_TEST(i), "wildcard-eventfd");
266 test->hdr->test = i;
267 test->hdr->data = test->match_data ? IOTEST_DATAMATCH : IOTEST_NOMATCH;
268 test->hdr->width = IOTEST_ACCESS_WIDTH;
269 test->mr = IOTEST_REGION(d, i);
270 if (!strcmp(IOTEST_TEST(i), "no-eventfd")) {
271 test->hasnotifier = false;
272 continue;
273 }
274 r = event_notifier_init(&test->notifier, 0);
275 assert(r >= 0);
276 test->hasnotifier = true;
277 }
278
279 return 0;
280}
281
282static void
283pci_testdev_uninit(PCIDevice *dev)
284{
285 PCITestDevState *d = PCI_TEST_DEV(dev);
286 int i;
287
288 pci_testdev_reset(d);
289 for (i = 0; i < IOTEST_MAX; ++i) {
290 if (d->tests[i].hasnotifier) {
291 event_notifier_cleanup(&d->tests[i].notifier);
292 }
293 g_free(d->tests[i].hdr);
294 }
295 g_free(d->tests);
296}
297
298static void qdev_pci_testdev_reset(DeviceState *dev)
299{
300 PCITestDevState *d = PCI_TEST_DEV(dev);
301 pci_testdev_reset(d);
302}
303
304static void pci_testdev_class_init(ObjectClass *klass, void *data)
305{
306 DeviceClass *dc = DEVICE_CLASS(klass);
307 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
308
309 k->init = pci_testdev_init;
310 k->exit = pci_testdev_uninit;
311 k->vendor_id = PCI_VENDOR_ID_REDHAT;
312 k->device_id = PCI_DEVICE_ID_REDHAT_TEST;
313 k->revision = 0x00;
314 k->class_id = PCI_CLASS_OTHERS;
315 dc->desc = "PCI Test Device";
316 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
317 dc->reset = qdev_pci_testdev_reset;
318}
319
320static const TypeInfo pci_testdev_info = {
321 .name = TYPE_PCI_TEST_DEV,
322 .parent = TYPE_PCI_DEVICE,
323 .instance_size = sizeof(PCITestDevState),
324 .class_init = pci_testdev_class_init,
325};
326
327static void pci_testdev_register_types(void)
328{
329 type_register_static(&pci_testdev_info);
330}
331
332type_init(pci_testdev_register_types)
333
