LXR qemu/hw/microblaze/petalogix_s3adsp1800

   1/*
   2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
   3 * boards.
   4 *
   5 * Copyright (c) 2009 Edgar E. Iglesias.
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 */
  25
  26#include "hw/sysbus.h"
  27#include "hw/hw.h"
  28#include "net/net.h"
  29#include "hw/block/flash.h"
  30#include "sysemu/sysemu.h"
  31#include "hw/devices.h"
  32#include "hw/boards.h"
  33#include "sysemu/block-backend.h"
  34#include "exec/address-spaces.h"
  35
  36#include "boot.h"
  37
  38#define LMB_BRAM_SIZE  (128 * 1024)
  39#define FLASH_SIZE     (16 * 1024 * 1024)
  40
  41#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
  42
  43#define MEMORY_BASEADDR 0x90000000
  44#define FLASH_BASEADDR 0xa0000000
  45#define INTC_BASEADDR 0x81800000
  46#define TIMER_BASEADDR 0x83c00000
  47#define UARTLITE_BASEADDR 0x84000000
  48#define ETHLITE_BASEADDR 0x81000000
  49
  50#define TIMER_IRQ           0
  51#define ETHLITE_IRQ         1
  52#define UARTLITE_IRQ        3
  53
  54static void machine_cpu_reset(MicroBlazeCPU *cpu)
  55{
  56    CPUMBState *env = &cpu->env;
  57
  58    env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family.  */
  59}
  60
  61static void
  62petalogix_s3adsp1800_init(MachineState *machine)
  63{
  64    ram_addr_t ram_size = machine->ram_size;
  65    const char *cpu_model = machine->cpu_model;
  66    DeviceState *dev;
  67    MicroBlazeCPU *cpu;
  68    DriveInfo *dinfo;
  69    int i;
  70    hwaddr ddr_base = MEMORY_BASEADDR;
  71    MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
  72    MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
  73    qemu_irq irq[32];
  74    MemoryRegion *sysmem = get_system_memory();
  75
  76    /* init CPUs */
  77    if (cpu_model == NULL) {
  78        cpu_model = "microblaze";
  79    }
  80    cpu = cpu_mb_init(cpu_model);
  81
  82    /* Attach emulated BRAM through the LMB.  */
  83    memory_region_init_ram(phys_lmb_bram, NULL,
  84                           "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
  85                           &error_abort);
  86    vmstate_register_ram_global(phys_lmb_bram);
  87    memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
  88
  89    memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
  90                           ram_size, &error_abort);
  91    vmstate_register_ram_global(phys_ram);
  92    memory_region_add_subregion(sysmem, ddr_base, phys_ram);
  93
  94    dinfo = drive_get(IF_PFLASH, 0, 0);
  95    pflash_cfi01_register(FLASH_BASEADDR,
  96                          NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
  97                          dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
  98                          (64 * 1024), FLASH_SIZE >> 16,
  99                          1, 0x89, 0x18, 0x0000, 0x0, 1);
 100
 101    dev = qdev_create(NULL, "xlnx.xps-intc");
 102    qdev_prop_set_uint32(dev, "kind-of-intr",
 103                         1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
 104    qdev_init_nofail(dev);
 105    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
 106    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
 107                       qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
 108    for (i = 0; i < 32; i++) {
 109        irq[i] = qdev_get_gpio_in(dev, i);
 110    }
 111
 112    sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR,
 113                         irq[UARTLITE_IRQ]);
 114
 115    /* 2 timers at irq 2 @ 62 Mhz.  */
 116    dev = qdev_create(NULL, "xlnx.xps-timer");
 117    qdev_prop_set_uint32(dev, "one-timer-only", 0);
 118    qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
 119    qdev_init_nofail(dev);
 120    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
 121    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
 122
 123    qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
 124    dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
 125    qdev_set_nic_properties(dev, &nd_table[0]);
 126    qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
 127    qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
 128    qdev_init_nofail(dev);
 129    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
 130    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
 131
 132    microblaze_load_kernel(cpu, ddr_base, ram_size,
 133                           machine->initrd_filename,
 134                           BINARY_DEVICE_TREE_FILE,
 135                           machine_cpu_reset);
 136}
 137
 138static QEMUMachine petalogix_s3adsp1800_machine = {
 139    .name = "petalogix-s3adsp1800",
 140    .desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800",
 141    .init = petalogix_s3adsp1800_init,
 142    .is_default = 1,
 143};
 144
 145static void petalogix_s3adsp1800_machine_init(void)
 146{
 147    qemu_register_machine(&petalogix_s3adsp1800_machine);
 148}
 149
 150machine_init(petalogix_s3adsp1800_machine_init);
 151