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25#include "hw/hw.h"
26#include "hw/ppc/mac.h"
27#include "hw/pci/pci.h"
28#include "hw/ppc/mac_dbdma.h"
29#include "hw/char/escc.h"
30
31#define TYPE_MACIO "macio"
32#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
33
34typedef struct MacIOState
35{
36
37 PCIDevice parent;
38
39
40 MemoryRegion bar;
41 CUDAState cuda;
42 void *dbdma;
43 MemoryRegion *pic_mem;
44 MemoryRegion *escc_mem;
45 uint64_t frequency;
46} MacIOState;
47
48#define OLDWORLD_MACIO(obj) \
49 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
50
51typedef struct OldWorldMacIOState {
52
53 MacIOState parent_obj;
54
55
56 qemu_irq irqs[5];
57
58 MacIONVRAMState nvram;
59 MACIOIDEState ide[2];
60} OldWorldMacIOState;
61
62#define NEWWORLD_MACIO(obj) \
63 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
64
65typedef struct NewWorldMacIOState {
66
67 MacIOState parent_obj;
68
69 qemu_irq irqs[5];
70 MACIOIDEState ide[2];
71} NewWorldMacIOState;
72
73
74
75
76
77
78
79
80
81
82
83
84static void macio_escc_legacy_setup(MacIOState *macio_state)
85{
86 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
87 MemoryRegion *bar = &macio_state->bar;
88 int i;
89 static const int maps[] = {
90 0x00, 0x00,
91 0x02, 0x20,
92 0x04, 0x10,
93 0x06, 0x30,
94 0x08, 0x40,
95 0x0A, 0x50,
96 0x60, 0x60,
97 0x70, 0x70,
98 0x80, 0x70,
99 0x90, 0x80,
100 0xA0, 0x90,
101 0xB0, 0xA0,
102 0xC0, 0xB0,
103 0xD0, 0xC0,
104 0xE0, 0xD0,
105 0xF0, 0xE0,
106 };
107
108 memory_region_init(escc_legacy, NULL, "escc-legacy", 256);
109 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
110 MemoryRegion *port = g_new(MemoryRegion, 1);
111 memory_region_init_alias(port, NULL, "escc-legacy-port",
112 macio_state->escc_mem, maps[i+1], 0x2);
113 memory_region_add_subregion(escc_legacy, maps[i], port);
114 }
115
116 memory_region_add_subregion(bar, 0x12000, escc_legacy);
117}
118
119static void macio_bar_setup(MacIOState *macio_state)
120{
121 MemoryRegion *bar = &macio_state->bar;
122
123 if (macio_state->escc_mem) {
124 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
125 macio_escc_legacy_setup(macio_state);
126 }
127}
128
129static int macio_common_initfn(PCIDevice *d)
130{
131 MacIOState *s = MACIO(d);
132 SysBusDevice *sysbus_dev;
133 int ret;
134
135 d->config[0x3d] = 0x01;
136
137 ret = qdev_init(DEVICE(&s->cuda));
138 if (ret < 0) {
139 return ret;
140 }
141 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
142 memory_region_add_subregion(&s->bar, 0x16000,
143 sysbus_mmio_get_region(sysbus_dev, 0));
144
145 macio_bar_setup(s);
146 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
147
148 return 0;
149}
150
151static int macio_initfn_ide(MacIOState *s, MACIOIDEState *ide, qemu_irq irq0,
152 qemu_irq irq1, int dmaid)
153{
154 SysBusDevice *sysbus_dev;
155
156 sysbus_dev = SYS_BUS_DEVICE(ide);
157 sysbus_connect_irq(sysbus_dev, 0, irq0);
158 sysbus_connect_irq(sysbus_dev, 1, irq1);
159 macio_ide_register_dma(ide, s->dbdma, dmaid);
160 return qdev_init(DEVICE(ide));
161}
162
163static int macio_oldworld_initfn(PCIDevice *d)
164{
165 MacIOState *s = MACIO(d);
166 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
167 SysBusDevice *sysbus_dev;
168 int i;
169 int cur_irq = 0;
170 int ret = macio_common_initfn(d);
171 if (ret < 0) {
172 return ret;
173 }
174
175 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
176 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
177
178 ret = qdev_init(DEVICE(&os->nvram));
179 if (ret < 0) {
180 return ret;
181 }
182 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
183 memory_region_add_subregion(&s->bar, 0x60000,
184 sysbus_mmio_get_region(sysbus_dev, 0));
185 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
186
187 if (s->pic_mem) {
188
189 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
190 }
191
192
193 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
194 qemu_irq irq0 = os->irqs[cur_irq++];
195 qemu_irq irq1 = os->irqs[cur_irq++];
196
197 ret = macio_initfn_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4));
198 if (ret < 0) {
199 return ret;
200 }
201 }
202
203 return 0;
204}
205
206static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
207 int index)
208{
209 gchar *name;
210
211 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
212 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
213 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
214 &ide->mem);
215 name = g_strdup_printf("ide[%i]", index);
216 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
217 g_free(name);
218}
219
220static void macio_oldworld_init(Object *obj)
221{
222 MacIOState *s = MACIO(obj);
223 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
224 DeviceState *dev;
225 int i;
226
227 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
228
229 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
230 dev = DEVICE(&os->nvram);
231 qdev_prop_set_uint32(dev, "size", 0x2000);
232 qdev_prop_set_uint32(dev, "it_shift", 4);
233
234 for (i = 0; i < 2; i++) {
235 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
236 }
237}
238
239static void timer_write(void *opaque, hwaddr addr, uint64_t value,
240 unsigned size)
241{
242}
243
244static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
245{
246 uint32_t value = 0;
247 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
248 uint64_t kltime;
249
250 kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
251 kltime = muldiv64(kltime, 18432000, 1048575);
252
253 switch (addr) {
254 case 0x38:
255 value = kltime;
256 break;
257 case 0x3c:
258 value = kltime >> 32;
259 break;
260 }
261
262 return value;
263}
264
265static const MemoryRegionOps timer_ops = {
266 .read = timer_read,
267 .write = timer_write,
268 .endianness = DEVICE_LITTLE_ENDIAN,
269};
270
271static int macio_newworld_initfn(PCIDevice *d)
272{
273 MacIOState *s = MACIO(d);
274 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
275 SysBusDevice *sysbus_dev;
276 MemoryRegion *timer_memory = g_new(MemoryRegion, 1);
277 int i;
278 int cur_irq = 0;
279 int ret = macio_common_initfn(d);
280 if (ret < 0) {
281 return ret;
282 }
283
284 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
285 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
286
287 if (s->pic_mem) {
288
289 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
290 }
291
292
293 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
294 qemu_irq irq0 = ns->irqs[cur_irq++];
295 qemu_irq irq1 = ns->irqs[cur_irq++];
296
297 ret = macio_initfn_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4));
298 if (ret < 0) {
299 return ret;
300 }
301 }
302
303
304 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
305 0x1000);
306 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
307
308 return 0;
309}
310
311static void macio_newworld_init(Object *obj)
312{
313 MacIOState *s = MACIO(obj);
314 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
315 int i;
316
317 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
318
319 for (i = 0; i < 2; i++) {
320 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
321 }
322}
323
324static void macio_instance_init(Object *obj)
325{
326 MacIOState *s = MACIO(obj);
327 MemoryRegion *dbdma_mem;
328
329 memory_region_init(&s->bar, NULL, "macio", 0x80000);
330
331 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
332 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
333 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
334
335 s->dbdma = DBDMA_init(&dbdma_mem);
336 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
337}
338
339static void macio_oldworld_class_init(ObjectClass *oc, void *data)
340{
341 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
342
343 pdc->init = macio_oldworld_initfn;
344 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
345}
346
347static void macio_newworld_class_init(ObjectClass *oc, void *data)
348{
349 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
350
351 pdc->init = macio_newworld_initfn;
352 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
353}
354
355static Property macio_properties[] = {
356 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
357 DEFINE_PROP_END_OF_LIST()
358};
359
360static void macio_class_init(ObjectClass *klass, void *data)
361{
362 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
363 DeviceClass *dc = DEVICE_CLASS(klass);
364
365 k->vendor_id = PCI_VENDOR_ID_APPLE;
366 k->class_id = PCI_CLASS_OTHERS << 8;
367 dc->props = macio_properties;
368}
369
370static const TypeInfo macio_oldworld_type_info = {
371 .name = TYPE_OLDWORLD_MACIO,
372 .parent = TYPE_MACIO,
373 .instance_size = sizeof(OldWorldMacIOState),
374 .instance_init = macio_oldworld_init,
375 .class_init = macio_oldworld_class_init,
376};
377
378static const TypeInfo macio_newworld_type_info = {
379 .name = TYPE_NEWWORLD_MACIO,
380 .parent = TYPE_MACIO,
381 .instance_size = sizeof(NewWorldMacIOState),
382 .instance_init = macio_newworld_init,
383 .class_init = macio_newworld_class_init,
384};
385
386static const TypeInfo macio_type_info = {
387 .name = TYPE_MACIO,
388 .parent = TYPE_PCI_DEVICE,
389 .instance_size = sizeof(MacIOState),
390 .instance_init = macio_instance_init,
391 .abstract = true,
392 .class_init = macio_class_init,
393};
394
395static void macio_register_types(void)
396{
397 type_register_static(&macio_type_info);
398 type_register_static(&macio_oldworld_type_info);
399 type_register_static(&macio_newworld_type_info);
400}
401
402type_init(macio_register_types)
403
404void macio_init(PCIDevice *d,
405 MemoryRegion *pic_mem,
406 MemoryRegion *escc_mem)
407{
408 MacIOState *macio_state = MACIO(d);
409
410 macio_state->pic_mem = pic_mem;
411 macio_state->escc_mem = escc_mem;
412
413
414 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
415 macio_state->frequency);
416
417 qdev_init_nofail(DEVICE(d));
418}
419
