LXR qemu/tests/tcg/mips/mips64-dspr2/dpa_w

   1#include"io.h"
   2int main(void)
   3{
   4    long long rt, rs;
   5    long long achi, acli;
   6    long long acho, aclo;
   7    long long resh, resl;
   8
   9    achi = 0x1;
  10    acli = 0x1;
  11
  12    rs = 0x0001000100010001;
  13    rt = 0x0002000200020002;
  14
  15    resh = 0x1;
  16    resl = 0x9;
  17
  18    asm("mthi %2, $ac1\t\n"
  19        "mtlo %3, $ac1\t\n"
  20        "dpa.w.qh $ac1, %4, %5\t\n"
  21        "mfhi %0, $ac1\t\n"
  22        "mflo %1, $ac1\t\n"
  23        : "=r"(acho), "=r"(aclo)
  24        : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  25       );
  26
  27    if ((acho != resh) || (aclo != resl)) {
  28        printf("1 dpa.w.qh error\n");
  29        return -1;
  30    }
  31
  32
  33    achi = 0xffffffff;
  34    acli = 0xaaaaaaaa;
  35
  36    rs = 0xaaaabbbbccccdddd;
  37    rt = 0x7777888899996666;
  38
  39    resh = 0xffffffffffffffff;
  40    resl = 0x320cdf02;
  41
  42    asm("mthi %2, $ac1\t\n"
  43        "mtlo %3, $ac1\t\n"
  44        "dpa.w.qh $ac1, %4, %5\t\n"
  45        "mfhi %0, $ac1\t\n"
  46        "mflo %1, $ac1\t\n"
  47        : "=r"(acho), "=r"(aclo)
  48        : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  49       );
  50    if ((acho != resh) || (aclo != resl)) {
  51        printf("2 dpa.w.qh error\n");
  52        return -1;
  53    }
  54
  55    return 0;
  56}
  57