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25#include "hw/hw.h"
26#include "hw/ppc/mac.h"
27#include "hw/pci/pci.h"
28#include "hw/ppc/mac_dbdma.h"
29#include "hw/char/escc.h"
30
31#define TYPE_MACIO "macio"
32#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
33
34typedef struct MacIOState
35{
36
37 PCIDevice parent;
38
39
40 MemoryRegion bar;
41 CUDAState cuda;
42 void *dbdma;
43 MemoryRegion *pic_mem;
44 MemoryRegion *escc_mem;
45 uint64_t frequency;
46} MacIOState;
47
48#define OLDWORLD_MACIO(obj) \
49 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
50
51typedef struct OldWorldMacIOState {
52
53 MacIOState parent_obj;
54
55
56 qemu_irq irqs[5];
57
58 MacIONVRAMState nvram;
59 MACIOIDEState ide[2];
60} OldWorldMacIOState;
61
62#define NEWWORLD_MACIO(obj) \
63 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
64
65typedef struct NewWorldMacIOState {
66
67 MacIOState parent_obj;
68
69 qemu_irq irqs[5];
70 MACIOIDEState ide[2];
71} NewWorldMacIOState;
72
73
74
75
76
77
78
79
80
81
82
83
84static void macio_escc_legacy_setup(MacIOState *macio_state)
85{
86 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
87 MemoryRegion *bar = &macio_state->bar;
88 int i;
89 static const int maps[] = {
90 0x00, 0x00,
91 0x02, 0x20,
92 0x04, 0x10,
93 0x06, 0x30,
94 0x08, 0x40,
95 0x0A, 0x50,
96 0x60, 0x60,
97 0x70, 0x70,
98 0x80, 0x70,
99 0x90, 0x80,
100 0xA0, 0x90,
101 0xB0, 0xA0,
102 0xC0, 0xB0,
103 0xD0, 0xC0,
104 0xE0, 0xD0,
105 0xF0, 0xE0,
106 };
107
108 memory_region_init(escc_legacy, NULL, "escc-legacy", 256);
109 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
110 MemoryRegion *port = g_new(MemoryRegion, 1);
111 memory_region_init_alias(port, NULL, "escc-legacy-port",
112 macio_state->escc_mem, maps[i+1], 0x2);
113 memory_region_add_subregion(escc_legacy, maps[i], port);
114 }
115
116 memory_region_add_subregion(bar, 0x12000, escc_legacy);
117}
118
119static void macio_bar_setup(MacIOState *macio_state)
120{
121 MemoryRegion *bar = &macio_state->bar;
122
123 if (macio_state->escc_mem) {
124 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
125 macio_escc_legacy_setup(macio_state);
126 }
127}
128
129static void macio_common_realize(PCIDevice *d, Error **errp)
130{
131 MacIOState *s = MACIO(d);
132 SysBusDevice *sysbus_dev;
133 Error *err = NULL;
134
135 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
136 if (err) {
137 error_propagate(errp, err);
138 return;
139 }
140 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
141 memory_region_add_subregion(&s->bar, 0x16000,
142 sysbus_mmio_get_region(sysbus_dev, 0));
143
144 macio_bar_setup(s);
145 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
146}
147
148static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
149 qemu_irq irq0, qemu_irq irq1, int dmaid,
150 Error **errp)
151{
152 SysBusDevice *sysbus_dev;
153
154 sysbus_dev = SYS_BUS_DEVICE(ide);
155 sysbus_connect_irq(sysbus_dev, 0, irq0);
156 sysbus_connect_irq(sysbus_dev, 1, irq1);
157 macio_ide_register_dma(ide, s->dbdma, dmaid);
158 object_property_set_bool(OBJECT(ide), true, "realized", errp);
159}
160
161static void macio_oldworld_realize(PCIDevice *d, Error **errp)
162{
163 MacIOState *s = MACIO(d);
164 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
165 Error *err = NULL;
166 SysBusDevice *sysbus_dev;
167 int i;
168 int cur_irq = 0;
169
170 macio_common_realize(d, &err);
171 if (err) {
172 error_propagate(errp, err);
173 return;
174 }
175
176 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
177 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
178
179 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
180 if (err) {
181 error_propagate(errp, err);
182 return;
183 }
184 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
185 memory_region_add_subregion(&s->bar, 0x60000,
186 sysbus_mmio_get_region(sysbus_dev, 0));
187 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
188
189 if (s->pic_mem) {
190
191 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
192 }
193
194
195 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
196 qemu_irq irq0 = os->irqs[cur_irq++];
197 qemu_irq irq1 = os->irqs[cur_irq++];
198
199 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
200 if (err) {
201 error_propagate(errp, err);
202 return;
203 }
204 }
205}
206
207static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
208 int index)
209{
210 gchar *name;
211
212 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
213 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
214 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
215 &ide->mem);
216 name = g_strdup_printf("ide[%i]", index);
217 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
218 g_free(name);
219}
220
221static void macio_oldworld_init(Object *obj)
222{
223 MacIOState *s = MACIO(obj);
224 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
225 DeviceState *dev;
226 int i;
227
228 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
229
230 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
231 dev = DEVICE(&os->nvram);
232 qdev_prop_set_uint32(dev, "size", 0x2000);
233 qdev_prop_set_uint32(dev, "it_shift", 4);
234
235 for (i = 0; i < 2; i++) {
236 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
237 }
238}
239
240static void timer_write(void *opaque, hwaddr addr, uint64_t value,
241 unsigned size)
242{
243}
244
245static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
246{
247 uint32_t value = 0;
248 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
249 uint64_t kltime;
250
251 kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
252 kltime = muldiv64(kltime, 18432000, 1048575);
253
254 switch (addr) {
255 case 0x38:
256 value = kltime;
257 break;
258 case 0x3c:
259 value = kltime >> 32;
260 break;
261 }
262
263 return value;
264}
265
266static const MemoryRegionOps timer_ops = {
267 .read = timer_read,
268 .write = timer_write,
269 .endianness = DEVICE_LITTLE_ENDIAN,
270};
271
272static void macio_newworld_realize(PCIDevice *d, Error **errp)
273{
274 MacIOState *s = MACIO(d);
275 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
276 Error *err = NULL;
277 SysBusDevice *sysbus_dev;
278 MemoryRegion *timer_memory = NULL;
279 int i;
280 int cur_irq = 0;
281
282 macio_common_realize(d, &err);
283 if (err) {
284 error_propagate(errp, err);
285 return;
286 }
287
288 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
289 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
290
291 if (s->pic_mem) {
292
293 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
294 }
295
296
297 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
298 qemu_irq irq0 = ns->irqs[cur_irq++];
299 qemu_irq irq1 = ns->irqs[cur_irq++];
300
301 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
302 if (err) {
303 error_propagate(errp, err);
304 return;
305 }
306 }
307
308
309 timer_memory = g_new(MemoryRegion, 1);
310 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
311 0x1000);
312 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
313}
314
315static void macio_newworld_init(Object *obj)
316{
317 MacIOState *s = MACIO(obj);
318 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
319 int i;
320
321 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
322
323 for (i = 0; i < 2; i++) {
324 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
325 }
326}
327
328static void macio_instance_init(Object *obj)
329{
330 MacIOState *s = MACIO(obj);
331 MemoryRegion *dbdma_mem;
332
333 memory_region_init(&s->bar, NULL, "macio", 0x80000);
334
335 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
336 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
337 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
338
339 s->dbdma = DBDMA_init(&dbdma_mem);
340 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
341}
342
343static const VMStateDescription vmstate_macio_oldworld = {
344 .name = "macio-oldworld",
345 .version_id = 0,
346 .minimum_version_id = 0,
347 .fields = (VMStateField[]) {
348 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
349 VMSTATE_END_OF_LIST()
350 }
351};
352
353static void macio_oldworld_class_init(ObjectClass *oc, void *data)
354{
355 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
356 DeviceClass *dc = DEVICE_CLASS(oc);
357
358 pdc->realize = macio_oldworld_realize;
359 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
360 dc->vmsd = &vmstate_macio_oldworld;
361}
362
363static const VMStateDescription vmstate_macio_newworld = {
364 .name = "macio-newworld",
365 .version_id = 0,
366 .minimum_version_id = 0,
367 .fields = (VMStateField[]) {
368 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
369 VMSTATE_END_OF_LIST()
370 }
371};
372
373static void macio_newworld_class_init(ObjectClass *oc, void *data)
374{
375 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
376 DeviceClass *dc = DEVICE_CLASS(oc);
377
378 pdc->realize = macio_newworld_realize;
379 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
380 dc->vmsd = &vmstate_macio_newworld;
381}
382
383static Property macio_properties[] = {
384 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
385 DEFINE_PROP_END_OF_LIST()
386};
387
388static void macio_class_init(ObjectClass *klass, void *data)
389{
390 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
391 DeviceClass *dc = DEVICE_CLASS(klass);
392
393 k->vendor_id = PCI_VENDOR_ID_APPLE;
394 k->class_id = PCI_CLASS_OTHERS << 8;
395 dc->props = macio_properties;
396}
397
398static const TypeInfo macio_oldworld_type_info = {
399 .name = TYPE_OLDWORLD_MACIO,
400 .parent = TYPE_MACIO,
401 .instance_size = sizeof(OldWorldMacIOState),
402 .instance_init = macio_oldworld_init,
403 .class_init = macio_oldworld_class_init,
404};
405
406static const TypeInfo macio_newworld_type_info = {
407 .name = TYPE_NEWWORLD_MACIO,
408 .parent = TYPE_MACIO,
409 .instance_size = sizeof(NewWorldMacIOState),
410 .instance_init = macio_newworld_init,
411 .class_init = macio_newworld_class_init,
412};
413
414static const TypeInfo macio_type_info = {
415 .name = TYPE_MACIO,
416 .parent = TYPE_PCI_DEVICE,
417 .instance_size = sizeof(MacIOState),
418 .instance_init = macio_instance_init,
419 .abstract = true,
420 .class_init = macio_class_init,
421};
422
423static void macio_register_types(void)
424{
425 type_register_static(&macio_type_info);
426 type_register_static(&macio_oldworld_type_info);
427 type_register_static(&macio_newworld_type_info);
428}
429
430type_init(macio_register_types)
431
432void macio_init(PCIDevice *d,
433 MemoryRegion *pic_mem,
434 MemoryRegion *escc_mem)
435{
436 MacIOState *macio_state = MACIO(d);
437
438 macio_state->pic_mem = pic_mem;
439 macio_state->escc_mem = escc_mem;
440
441
442 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
443 macio_state->frequency);
444
445 qdev_init_nofail(DEVICE(d));
446}
447
