qemu/hw/i386/acpi-dsdt.dsl
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   1/*
   2 * Bochs/QEMU ACPI DSDT ASL definition
   3 *
   4 * Copyright (c) 2006 Fabrice Bellard
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License version 2 as published by the Free Software Foundation.
   9 *
  10 * This library is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13 * Lesser General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU Lesser General Public
  16 * License along with this library; if not, write to the Free Software
  17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18 */
  19
  20ACPI_EXTRACT_ALL_CODE AcpiDsdtAmlCode
  21
  22DefinitionBlock (
  23    "acpi-dsdt.aml",    // Output Filename
  24    "DSDT",             // Signature
  25    0x01,               // DSDT Compliance Revision
  26    "BXPC",             // OEMID
  27    "BXDSDT",           // TABLE ID
  28    0x1                 // OEM Revision
  29    )
  30{
  31
  32#include "acpi-dsdt-dbug.dsl"
  33
  34    Scope(\_SB) {
  35        Device(PCI0) {
  36            Name(_HID, EisaId("PNP0A03"))
  37            Name(_ADR, 0x00)
  38            Name(_UID, 1)
  39//#define PX13 S0B_
  40//            External(PX13, DeviceObj)
  41        }
  42    }
  43
  44#include "acpi-dsdt-hpet.dsl"
  45
  46/****************************************************************
  47 * PIIX4 PM
  48 ****************************************************************/
  49
  50    Scope(\_SB.PCI0) {
  51        Device(PX13) {
  52            Name(_ADR, 0x00010003)
  53            OperationRegion(P13C, PCI_Config, 0x00, 0xff)
  54        }
  55    }
  56
  57
  58/****************************************************************
  59 * PIIX3 ISA bridge
  60 ****************************************************************/
  61
  62    Scope(\_SB.PCI0) {
  63
  64        External(ISA, DeviceObj)
  65
  66        Device(ISA) {
  67            Name(_ADR, 0x00010000)
  68
  69            /* PIIX PCI to ISA irq remapping */
  70            OperationRegion(P40C, PCI_Config, 0x60, 0x04)
  71
  72            /* enable bits */
  73            Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
  74                Offset(0x5f),
  75                , 7,
  76                LPEN, 1,         // LPT
  77                Offset(0x67),
  78                , 3,
  79                CAEN, 1,         // COM1
  80                , 3,
  81                CBEN, 1,         // COM2
  82            }
  83            Name(FDEN, 1)
  84        }
  85    }
  86
  87#include "acpi-dsdt-isa.dsl"
  88
  89
  90/****************************************************************
  91 * PCI hotplug
  92 ****************************************************************/
  93
  94    Scope(\_SB.PCI0) {
  95        OperationRegion(PCST, SystemIO, 0xae00, 0x08)
  96        Field(PCST, DWordAcc, NoLock, WriteAsZeros) {
  97            PCIU, 32,
  98            PCID, 32,
  99        }
 100
 101        OperationRegion(SEJ, SystemIO, 0xae08, 0x04)
 102        Field(SEJ, DWordAcc, NoLock, WriteAsZeros) {
 103            B0EJ, 32,
 104        }
 105
 106        OperationRegion(BNMR, SystemIO, 0xae10, 0x04)
 107        Field(BNMR, DWordAcc, NoLock, WriteAsZeros) {
 108            BNUM, 32,
 109        }
 110
 111        /* Lock to protect access to fields above. */
 112        Mutex(BLCK, 0)
 113
 114        /* Methods called by bulk generated PCI devices below */
 115
 116        /* Methods called by hotplug devices */
 117        Method(PCEJ, 2, NotSerialized) {
 118            // _EJ0 method - eject callback
 119            Acquire(BLCK, 0xFFFF)
 120            Store(Arg0, BNUM)
 121            Store(ShiftLeft(1, Arg1), B0EJ)
 122            Release(BLCK)
 123            Return (0x0)
 124        }
 125
 126        /* Hotplug notification method supplied by SSDT */
 127        External(\_SB.PCI0.PCNT, MethodObj)
 128    }
 129
 130
 131/****************************************************************
 132 * PCI IRQs
 133 ****************************************************************/
 134
 135    Scope(\_SB) {
 136        Scope(PCI0) {
 137            Method (_PRT, 0) {
 138                Store(Package(128) {}, Local0)
 139                Store(Zero, Local1)
 140                While(LLess(Local1, 128)) {
 141                    // slot = pin >> 2
 142                    Store(ShiftRight(Local1, 2), Local2)
 143
 144                    // lnk = (slot + pin) & 3
 145                    Store(And(Add(Local1, Local2), 3), Local3)
 146                    If (LEqual(Local3, 0)) {
 147                        Store(Package(4) { Zero, Zero, LNKD, Zero }, Local4)
 148                    }
 149                    If (LEqual(Local3, 1)) {
 150                        // device 1 is the power-management device, needs SCI
 151                        If (LEqual(Local1, 4)) {
 152                            Store(Package(4) { Zero, Zero, LNKS, Zero }, Local4)
 153                        } Else {
 154                            Store(Package(4) { Zero, Zero, LNKA, Zero }, Local4)
 155                        }
 156                    }
 157                    If (LEqual(Local3, 2)) {
 158                        Store(Package(4) { Zero, Zero, LNKB, Zero }, Local4)
 159                    }
 160                    If (LEqual(Local3, 3)) {
 161                        Store(Package(4) { Zero, Zero, LNKC, Zero }, Local4)
 162                    }
 163
 164                    // Complete the interrupt routing entry:
 165                    //    Package(4) { 0x[slot]FFFF, [pin], [link], 0) }
 166
 167                    Store(Or(ShiftLeft(Local2, 16), 0xFFFF), Index(Local4, 0))
 168                    Store(And(Local1, 3),                    Index(Local4, 1))
 169                    Store(Local4,                            Index(Local0, Local1))
 170
 171                    Increment(Local1)
 172                }
 173
 174                Return(Local0)
 175            }
 176        }
 177
 178        Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
 179            PRQ0,   8,
 180            PRQ1,   8,
 181            PRQ2,   8,
 182            PRQ3,   8
 183        }
 184
 185        Method(IQST, 1, NotSerialized) {
 186            // _STA method - get status
 187            If (And(0x80, Arg0)) {
 188                Return (0x09)
 189            }
 190            Return (0x0B)
 191        }
 192        Method(IQCR, 1, Serialized) {
 193            // _CRS method - get current settings
 194            Name(PRR0, ResourceTemplate() {
 195                Interrupt(, Level, ActiveHigh, Shared) { 0 }
 196            })
 197            CreateDWordField(PRR0, 0x05, PRRI)
 198            If (LLess(Arg0, 0x80)) {
 199                Store(Arg0, PRRI)
 200            }
 201            Return (PRR0)
 202        }
 203
 204#define define_link(link, uid, reg)                             \
 205        Device(link) {                                          \
 206            Name(_HID, EISAID("PNP0C0F"))                       \
 207            Name(_UID, uid)                                     \
 208            Name(_PRS, ResourceTemplate() {                     \
 209                Interrupt(, Level, ActiveHigh, Shared) {        \
 210                    5, 10, 11                                   \
 211                }                                               \
 212            })                                                  \
 213            Method(_STA, 0, NotSerialized) {                    \
 214                Return (IQST(reg))                              \
 215            }                                                   \
 216            Method(_DIS, 0, NotSerialized) {                    \
 217                Or(reg, 0x80, reg)                              \
 218            }                                                   \
 219            Method(_CRS, 0, NotSerialized) {                    \
 220                Return (IQCR(reg))                              \
 221            }                                                   \
 222            Method(_SRS, 1, NotSerialized) {                    \
 223                CreateDWordField(Arg0, 0x05, PRRI)              \
 224                Store(PRRI, reg)                                \
 225            }                                                   \
 226        }
 227
 228        define_link(LNKA, 0, PRQ0)
 229        define_link(LNKB, 1, PRQ1)
 230        define_link(LNKC, 2, PRQ2)
 231        define_link(LNKD, 3, PRQ3)
 232
 233        Device(LNKS) {
 234            Name(_HID, EISAID("PNP0C0F"))
 235            Name(_UID, 4)
 236            Name(_PRS, ResourceTemplate() {
 237                Interrupt(, Level, ActiveHigh, Shared) { 9 }
 238            })
 239
 240            // The SCI cannot be disabled and is always attached to GSI 9,
 241            // so these are no-ops.  We only need this link to override the
 242            // polarity to active high and match the content of the MADT.
 243            Method(_STA, 0, NotSerialized) { Return (0x0b) }
 244            Method(_DIS, 0, NotSerialized) { }
 245            Method(_CRS, 0, NotSerialized) { Return (_PRS) }
 246            Method(_SRS, 1, NotSerialized) { }
 247        }
 248    }
 249
 250#include "hw/acpi/pc-hotplug.h"
 251#define CPU_STATUS_BASE PIIX4_CPU_HOTPLUG_IO_BASE
 252#include "acpi-dsdt-cpu-hotplug.dsl"
 253#include "acpi-dsdt-mem-hotplug.dsl"
 254
 255
 256/****************************************************************
 257 * General purpose events
 258 ****************************************************************/
 259    Scope(\_GPE) {
 260        Name(_HID, "ACPI0006")
 261
 262        Method(_L00) {
 263        }
 264        Method(_E01) {
 265            // PCI hotplug event
 266            Acquire(\_SB.PCI0.BLCK, 0xFFFF)
 267            \_SB.PCI0.PCNT()
 268            Release(\_SB.PCI0.BLCK)
 269        }
 270        Method(_E02) {
 271            // CPU hotplug event
 272            \_SB.PRSC()
 273        }
 274        Method(_E03) {
 275            // Memory hotplug event
 276            \_SB.PCI0.MEMORY_HOTPLUG_DEVICE.MEMORY_SLOT_SCAN_METHOD()
 277        }
 278        Method(_L04) {
 279        }
 280        Method(_L05) {
 281        }
 282        Method(_L06) {
 283        }
 284        Method(_L07) {
 285        }
 286        Method(_L08) {
 287        }
 288        Method(_L09) {
 289        }
 290        Method(_L0A) {
 291        }
 292        Method(_L0B) {
 293        }
 294        Method(_L0C) {
 295        }
 296        Method(_L0D) {
 297        }
 298        Method(_L0E) {
 299        }
 300        Method(_L0F) {
 301        }
 302    }
 303}
 304