1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25#include "hw/hw.h"
26#include "hw/sysbus.h"
27#include "trace.h"
28#include "ui/console.h"
29#include "framebuffer.h"
30#include "ui/pixel_ops.h"
31#include "qemu/error-report.h"
32
33#define BITS 8
34#include "milkymist-vgafb_template.h"
35#define BITS 15
36#include "milkymist-vgafb_template.h"
37#define BITS 16
38#include "milkymist-vgafb_template.h"
39#define BITS 24
40#include "milkymist-vgafb_template.h"
41#define BITS 32
42#include "milkymist-vgafb_template.h"
43
44enum {
45 R_CTRL = 0,
46 R_HRES,
47 R_HSYNC_START,
48 R_HSYNC_END,
49 R_HSCAN,
50 R_VRES,
51 R_VSYNC_START,
52 R_VSYNC_END,
53 R_VSCAN,
54 R_BASEADDRESS,
55 R_BASEADDRESS_ACT,
56 R_BURST_COUNT,
57 R_DDC,
58 R_SOURCE_CLOCK,
59 R_MAX
60};
61
62enum {
63 CTRL_RESET = (1<<0),
64};
65
66#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
67#define MILKYMIST_VGAFB(obj) \
68 OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)
69
70struct MilkymistVgafbState {
71 SysBusDevice parent_obj;
72
73 MemoryRegion regs_region;
74 MemoryRegionSection fbsection;
75 QemuConsole *con;
76
77 int invalidate;
78 uint32_t fb_offset;
79 uint32_t fb_mask;
80
81 uint32_t regs[R_MAX];
82};
83typedef struct MilkymistVgafbState MilkymistVgafbState;
84
85static int vgafb_enabled(MilkymistVgafbState *s)
86{
87 return !(s->regs[R_CTRL] & CTRL_RESET);
88}
89
90static void vgafb_update_display(void *opaque)
91{
92 MilkymistVgafbState *s = opaque;
93 SysBusDevice *sbd;
94 DisplaySurface *surface = qemu_console_surface(s->con);
95 int src_width;
96 int first = 0;
97 int last = 0;
98 drawfn fn;
99
100 if (!vgafb_enabled(s)) {
101 return;
102 }
103
104 sbd = SYS_BUS_DEVICE(s);
105 int dest_width = s->regs[R_HRES];
106
107 switch (surface_bits_per_pixel(surface)) {
108 case 0:
109 return;
110 case 8:
111 fn = draw_line_8;
112 break;
113 case 15:
114 fn = draw_line_15;
115 dest_width *= 2;
116 break;
117 case 16:
118 fn = draw_line_16;
119 dest_width *= 2;
120 break;
121 case 24:
122 fn = draw_line_24;
123 dest_width *= 3;
124 break;
125 case 32:
126 fn = draw_line_32;
127 dest_width *= 4;
128 break;
129 default:
130 hw_error("milkymist_vgafb: bad color depth\n");
131 break;
132 }
133
134 src_width = s->regs[R_HRES] * 2;
135 if (s->invalidate) {
136 framebuffer_update_memory_section(&s->fbsection,
137 sysbus_address_space(sbd),
138 s->regs[R_BASEADDRESS] + s->fb_offset,
139 s->regs[R_VRES], src_width);
140 }
141
142 framebuffer_update_display(surface, &s->fbsection,
143 s->regs[R_HRES],
144 s->regs[R_VRES],
145 src_width,
146 dest_width,
147 0,
148 s->invalidate,
149 fn,
150 NULL,
151 &first, &last);
152
153 if (first >= 0) {
154 dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
155 }
156 s->invalidate = 0;
157}
158
159static void vgafb_invalidate_display(void *opaque)
160{
161 MilkymistVgafbState *s = opaque;
162 s->invalidate = 1;
163}
164
165static void vgafb_resize(MilkymistVgafbState *s)
166{
167 if (!vgafb_enabled(s)) {
168 return;
169 }
170
171 qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
172 s->invalidate = 1;
173}
174
175static uint64_t vgafb_read(void *opaque, hwaddr addr,
176 unsigned size)
177{
178 MilkymistVgafbState *s = opaque;
179 uint32_t r = 0;
180
181 addr >>= 2;
182 switch (addr) {
183 case R_CTRL:
184 case R_HRES:
185 case R_HSYNC_START:
186 case R_HSYNC_END:
187 case R_HSCAN:
188 case R_VRES:
189 case R_VSYNC_START:
190 case R_VSYNC_END:
191 case R_VSCAN:
192 case R_BASEADDRESS:
193 case R_BURST_COUNT:
194 case R_DDC:
195 case R_SOURCE_CLOCK:
196 r = s->regs[addr];
197 break;
198 case R_BASEADDRESS_ACT:
199 r = s->regs[R_BASEADDRESS];
200 break;
201
202 default:
203 error_report("milkymist_vgafb: read access to unknown register 0x"
204 TARGET_FMT_plx, addr << 2);
205 break;
206 }
207
208 trace_milkymist_vgafb_memory_read(addr << 2, r);
209
210 return r;
211}
212
213static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
214 unsigned size)
215{
216 MilkymistVgafbState *s = opaque;
217
218 trace_milkymist_vgafb_memory_write(addr, value);
219
220 addr >>= 2;
221 switch (addr) {
222 case R_CTRL:
223 s->regs[addr] = value;
224 vgafb_resize(s);
225 break;
226 case R_HSYNC_START:
227 case R_HSYNC_END:
228 case R_HSCAN:
229 case R_VSYNC_START:
230 case R_VSYNC_END:
231 case R_VSCAN:
232 case R_BURST_COUNT:
233 case R_DDC:
234 case R_SOURCE_CLOCK:
235 s->regs[addr] = value;
236 break;
237 case R_BASEADDRESS:
238 if (value & 0x1f) {
239 error_report("milkymist_vgafb: framebuffer base address have to "
240 "be 32 byte aligned");
241 break;
242 }
243 s->regs[addr] = value & s->fb_mask;
244 s->invalidate = 1;
245 break;
246 case R_HRES:
247 case R_VRES:
248 s->regs[addr] = value;
249 vgafb_resize(s);
250 break;
251 case R_BASEADDRESS_ACT:
252 error_report("milkymist_vgafb: write to read-only register 0x"
253 TARGET_FMT_plx, addr << 2);
254 break;
255
256 default:
257 error_report("milkymist_vgafb: write access to unknown register 0x"
258 TARGET_FMT_plx, addr << 2);
259 break;
260 }
261}
262
263static const MemoryRegionOps vgafb_mmio_ops = {
264 .read = vgafb_read,
265 .write = vgafb_write,
266 .valid = {
267 .min_access_size = 4,
268 .max_access_size = 4,
269 },
270 .endianness = DEVICE_NATIVE_ENDIAN,
271};
272
273static void milkymist_vgafb_reset(DeviceState *d)
274{
275 MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
276 int i;
277
278 for (i = 0; i < R_MAX; i++) {
279 s->regs[i] = 0;
280 }
281
282
283 s->regs[R_CTRL] = CTRL_RESET;
284 s->regs[R_HRES] = 640;
285 s->regs[R_VRES] = 480;
286 s->regs[R_BASEADDRESS] = 0;
287}
288
289static const GraphicHwOps vgafb_ops = {
290 .invalidate = vgafb_invalidate_display,
291 .gfx_update = vgafb_update_display,
292};
293
294static int milkymist_vgafb_init(SysBusDevice *dev)
295{
296 MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);
297
298 memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
299 "milkymist-vgafb", R_MAX * 4);
300 sysbus_init_mmio(dev, &s->regs_region);
301
302 s->con = graphic_console_init(DEVICE(dev), 0, &vgafb_ops, s);
303
304 return 0;
305}
306
307static int vgafb_post_load(void *opaque, int version_id)
308{
309 vgafb_invalidate_display(opaque);
310 return 0;
311}
312
313static const VMStateDescription vmstate_milkymist_vgafb = {
314 .name = "milkymist-vgafb",
315 .version_id = 1,
316 .minimum_version_id = 1,
317 .post_load = vgafb_post_load,
318 .fields = (VMStateField[]) {
319 VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
320 VMSTATE_END_OF_LIST()
321 }
322};
323
324static Property milkymist_vgafb_properties[] = {
325 DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
326 DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
327 DEFINE_PROP_END_OF_LIST(),
328};
329
330static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
331{
332 DeviceClass *dc = DEVICE_CLASS(klass);
333 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
334
335 k->init = milkymist_vgafb_init;
336 dc->reset = milkymist_vgafb_reset;
337 dc->vmsd = &vmstate_milkymist_vgafb;
338 dc->props = milkymist_vgafb_properties;
339}
340
341static const TypeInfo milkymist_vgafb_info = {
342 .name = TYPE_MILKYMIST_VGAFB,
343 .parent = TYPE_SYS_BUS_DEVICE,
344 .instance_size = sizeof(MilkymistVgafbState),
345 .class_init = milkymist_vgafb_class_init,
346};
347
348static void milkymist_vgafb_register_types(void)
349{
350 type_register_static(&milkymist_vgafb_info);
351}
352
353type_init(milkymist_vgafb_register_types)
354
