LXR qemu/include/hw/i386/topology.h

   1/*
   2 *  x86 CPU topology data structures and functions
   3 *
   4 *  Copyright (c) 2012 Red Hat Inc.
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24#ifndef HW_I386_TOPOLOGY_H
  25#define HW_I386_TOPOLOGY_H
  26
  27/* This file implements the APIC-ID-based CPU topology enumeration logic,
  28 * documented at the following document:
  29 *   Intel® 64 Architecture Processor Topology Enumeration
  30 *   http://software.intel.com/en-us/articles/intel-64-architecture-processor-topology-enumeration/
  31 *
  32 * This code should be compatible with AMD's "Extended Method" described at:
  33 *   AMD CPUID Specification (Publication #25481)
  34 *   Section 3: Multiple Core Calcuation
  35 * as long as:
  36 *  nr_threads is set to 1;
  37 *  OFFSET_IDX is assumed to be 0;
  38 *  CPUID Fn8000_0008_ECX[ApicIdCoreIdSize[3:0]] is set to apicid_core_width().
  39 */
  40
  41#include <stdint.h>
  42#include <string.h>
  43
  44#include "qemu/bitops.h"
  45
  46/* APIC IDs can be 32-bit, but beware: APIC IDs > 255 require x2APIC support
  47 */
  48typedef uint32_t apic_id_t;
  49
  50typedef struct X86CPUTopoInfo {
  51    unsigned pkg_id;
  52    unsigned core_id;
  53    unsigned smt_id;
  54} X86CPUTopoInfo;
  55
  56/* Return the bit width needed for 'count' IDs
  57 */
  58static unsigned apicid_bitwidth_for_count(unsigned count)
  59{
  60    g_assert(count >= 1);
  61    count -= 1;
  62    return count ? 32 - clz32(count) : 0;
  63}
  64
  65/* Bit width of the SMT_ID (thread ID) field on the APIC ID
  66 */
  67static inline unsigned apicid_smt_width(unsigned nr_cores, unsigned nr_threads)
  68{
  69    return apicid_bitwidth_for_count(nr_threads);
  70}
  71
  72/* Bit width of the Core_ID field
  73 */
  74static inline unsigned apicid_core_width(unsigned nr_cores, unsigned nr_threads)
  75{
  76    return apicid_bitwidth_for_count(nr_cores);
  77}
  78
  79/* Bit offset of the Core_ID field
  80 */
  81static inline unsigned apicid_core_offset(unsigned nr_cores,
  82                                          unsigned nr_threads)
  83{
  84    return apicid_smt_width(nr_cores, nr_threads);
  85}
  86
  87/* Bit offset of the Pkg_ID (socket ID) field
  88 */
  89static inline unsigned apicid_pkg_offset(unsigned nr_cores, unsigned nr_threads)
  90{
  91    return apicid_core_offset(nr_cores, nr_threads) +
  92           apicid_core_width(nr_cores, nr_threads);
  93}
  94
  95/* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
  96 *
  97 * The caller must make sure core_id < nr_cores and smt_id < nr_threads.
  98 */
  99static inline apic_id_t apicid_from_topo_ids(unsigned nr_cores,
 100                                             unsigned nr_threads,
 101                                             const X86CPUTopoInfo *topo)
 102{
 103    return (topo->pkg_id  << apicid_pkg_offset(nr_cores, nr_threads)) |
 104           (topo->core_id << apicid_core_offset(nr_cores, nr_threads)) |
 105           topo->smt_id;
 106}
 107
 108/* Calculate thread/core/package IDs for a specific topology,
 109 * based on (contiguous) CPU index
 110 */
 111static inline void x86_topo_ids_from_idx(unsigned nr_cores,
 112                                         unsigned nr_threads,
 113                                         unsigned cpu_index,
 114                                         X86CPUTopoInfo *topo)
 115{
 116    unsigned core_index = cpu_index / nr_threads;
 117    topo->smt_id = cpu_index % nr_threads;
 118    topo->core_id = core_index % nr_cores;
 119    topo->pkg_id = core_index / nr_cores;
 120}
 121
 122/* Make APIC ID for the CPU 'cpu_index'
 123 *
 124 * 'cpu_index' is a sequential, contiguous ID for the CPU.
 125 */
 126static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_cores,
 127                                                unsigned nr_threads,
 128                                                unsigned cpu_index)
 129{
 130    X86CPUTopoInfo topo;
 131    x86_topo_ids_from_idx(nr_cores, nr_threads, cpu_index, &topo);
 132    return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
 133}
 134
 135#endif /* HW_I386_TOPOLOGY_H */
 136