1#include <assert.h>
2#include "cpu.h"
3#include "exec/helper-proto.h"
4#include "qemu/host-utils.h"
5
6#include "hw/lm32/lm32_pic.h"
7#include "hw/char/lm32_juart.h"
8
9#include "exec/cpu_ldst.h"
10
11#ifndef CONFIG_USER_ONLY
12#include "sysemu/sysemu.h"
13#endif
14
15#if !defined(CONFIG_USER_ONLY)
16void raise_exception(CPULM32State *env, int index)
17{
18 CPUState *cs = CPU(lm32_env_get_cpu(env));
19
20 cs->exception_index = index;
21 cpu_loop_exit(cs);
22}
23
24void HELPER(raise_exception)(CPULM32State *env, uint32_t index)
25{
26 raise_exception(env, index);
27}
28
29void HELPER(hlt)(CPULM32State *env)
30{
31 CPUState *cs = CPU(lm32_env_get_cpu(env));
32
33 cs->halted = 1;
34 cs->exception_index = EXCP_HLT;
35 cpu_loop_exit(cs);
36}
37
38void HELPER(ill)(CPULM32State *env)
39{
40#ifndef CONFIG_USER_ONLY
41 CPUState *cs = CPU(lm32_env_get_cpu(env));
42 fprintf(stderr, "VM paused due to illegal instruction. "
43 "Connect a debugger or switch to the monitor console "
44 "to find out more.\n");
45 vm_stop(RUN_STATE_PAUSED);
46 cs->halted = 1;
47 raise_exception(env, EXCP_HALTED);
48#endif
49}
50
51void HELPER(wcsr_bp)(CPULM32State *env, uint32_t bp, uint32_t idx)
52{
53 uint32_t addr = bp & ~1;
54
55 assert(idx < 4);
56
57 env->bp[idx] = bp;
58 lm32_breakpoint_remove(env, idx);
59 if (bp & 1) {
60 lm32_breakpoint_insert(env, idx, addr);
61 }
62}
63
64void HELPER(wcsr_wp)(CPULM32State *env, uint32_t wp, uint32_t idx)
65{
66 lm32_wp_t wp_type;
67
68 assert(idx < 4);
69
70 env->wp[idx] = wp;
71
72 wp_type = lm32_wp_type(env->dc, idx);
73 lm32_watchpoint_remove(env, idx);
74 if (wp_type != LM32_WP_DISABLED) {
75 lm32_watchpoint_insert(env, idx, wp, wp_type);
76 }
77}
78
79void HELPER(wcsr_dc)(CPULM32State *env, uint32_t dc)
80{
81 uint32_t old_dc;
82 int i;
83 lm32_wp_t old_type;
84 lm32_wp_t new_type;
85
86 old_dc = env->dc;
87 env->dc = dc;
88
89 for (i = 0; i < 4; i++) {
90 old_type = lm32_wp_type(old_dc, i);
91 new_type = lm32_wp_type(dc, i);
92
93 if (old_type != new_type) {
94 lm32_watchpoint_remove(env, i);
95 if (new_type != LM32_WP_DISABLED) {
96 lm32_watchpoint_insert(env, i, env->wp[i], new_type);
97 }
98 }
99 }
100}
101
102void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
103{
104 lm32_pic_set_im(env->pic_state, im);
105}
106
107void HELPER(wcsr_ip)(CPULM32State *env, uint32_t im)
108{
109 lm32_pic_set_ip(env->pic_state, im);
110}
111
112void HELPER(wcsr_jtx)(CPULM32State *env, uint32_t jtx)
113{
114 lm32_juart_set_jtx(env->juart_state, jtx);
115}
116
117void HELPER(wcsr_jrx)(CPULM32State *env, uint32_t jrx)
118{
119 lm32_juart_set_jrx(env->juart_state, jrx);
120}
121
122uint32_t HELPER(rcsr_im)(CPULM32State *env)
123{
124 return lm32_pic_get_im(env->pic_state);
125}
126
127uint32_t HELPER(rcsr_ip)(CPULM32State *env)
128{
129 return lm32_pic_get_ip(env->pic_state);
130}
131
132uint32_t HELPER(rcsr_jtx)(CPULM32State *env)
133{
134 return lm32_juart_get_jtx(env->juart_state);
135}
136
137uint32_t HELPER(rcsr_jrx)(CPULM32State *env)
138{
139 return lm32_juart_get_jrx(env->juart_state);
140}
141
142
143
144
145
146void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
147 uintptr_t retaddr)
148{
149 int ret;
150
151 ret = lm32_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
152 if (unlikely(ret)) {
153 if (retaddr) {
154
155 cpu_restore_state(cs, retaddr);
156 }
157 cpu_loop_exit(cs);
158 }
159}
160#endif
161
162