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11#include <errno.h>
12#include <fcntl.h>
13#include <glib.h>
14#include <glib/gstdio.h>
15#include <string.h>
16#include <sys/mman.h>
17#include <unistd.h>
18#include "contrib/ivshmem-server/ivshmem-server.h"
19#include "libqos/pci-pc.h"
20#include "libqtest.h"
21#include "qemu/osdep.h"
22#include "qemu-common.h"
23
24#define TMPSHMSIZE (1 << 20)
25static char *tmpshm;
26static void *tmpshmem;
27static char *tmpdir;
28static char *tmpserver;
29
30static void save_fn(QPCIDevice *dev, int devfn, void *data)
31{
32 QPCIDevice **pdev = (QPCIDevice **) data;
33
34 *pdev = dev;
35}
36
37static QPCIDevice *get_device(void)
38{
39 QPCIDevice *dev;
40 QPCIBus *pcibus;
41
42 pcibus = qpci_init_pc();
43 dev = NULL;
44 qpci_device_foreach(pcibus, 0x1af4, 0x1110, save_fn, &dev);
45 g_assert(dev != NULL);
46
47 return dev;
48}
49
50typedef struct _IVState {
51 QTestState *qtest;
52 void *reg_base, *mem_base;
53 QPCIDevice *dev;
54} IVState;
55
56enum Reg {
57 INTRMASK = 0,
58 INTRSTATUS = 4,
59 IVPOSITION = 8,
60 DOORBELL = 12,
61};
62
63static const char* reg2str(enum Reg reg) {
64 switch (reg) {
65 case INTRMASK:
66 return "IntrMask";
67 case INTRSTATUS:
68 return "IntrStatus";
69 case IVPOSITION:
70 return "IVPosition";
71 case DOORBELL:
72 return "DoorBell";
73 default:
74 return NULL;
75 }
76}
77
78static inline unsigned in_reg(IVState *s, enum Reg reg)
79{
80 const char *name = reg2str(reg);
81 QTestState *qtest = global_qtest;
82 unsigned res;
83
84 global_qtest = s->qtest;
85 res = qpci_io_readl(s->dev, s->reg_base + reg);
86 g_test_message("*%s -> %x\n", name, res);
87 global_qtest = qtest;
88
89 return res;
90}
91
92static inline void out_reg(IVState *s, enum Reg reg, unsigned v)
93{
94 const char *name = reg2str(reg);
95 QTestState *qtest = global_qtest;
96
97 global_qtest = s->qtest;
98 g_test_message("%x -> *%s\n", v, name);
99 qpci_io_writel(s->dev, s->reg_base + reg, v);
100 global_qtest = qtest;
101}
102
103static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
104{
105 uint64_t barsize;
106
107 s->qtest = qtest_start(cmd);
108
109 s->dev = get_device();
110
111
112 s->mem_base = qpci_iomap(s->dev, 2, &barsize);
113 g_assert_nonnull(s->mem_base);
114 g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
115
116 if (msix) {
117 qpci_msix_enable(s->dev);
118 }
119
120 s->reg_base = qpci_iomap(s->dev, 0, &barsize);
121 g_assert_nonnull(s->reg_base);
122 g_assert_cmpuint(barsize, ==, 256);
123
124 qpci_device_enable(s->dev);
125}
126
127static void setup_vm(IVState *s)
128{
129 char *cmd = g_strdup_printf("-device ivshmem,shm=%s,size=1M", tmpshm);
130
131 setup_vm_cmd(s, cmd, false);
132
133 g_free(cmd);
134}
135
136static void test_ivshmem_single(void)
137{
138 IVState state, *s;
139 uint32_t data[1024];
140 int i;
141
142 setup_vm(&state);
143 s = &state;
144
145
146 out_reg(s, INTRMASK, 0);
147 in_reg(s, INTRSTATUS);
148 in_reg(s, IVPOSITION);
149
150 out_reg(s, INTRMASK, 0xffffffff);
151 g_assert_cmpuint(in_reg(s, INTRMASK), ==, 0xffffffff);
152 out_reg(s, INTRSTATUS, 1);
153
154 g_assert_cmpuint(in_reg(s, INTRSTATUS), ==, 1);
155
156
157 out_reg(s, IVPOSITION, 1);
158 out_reg(s, DOORBELL, 8 << 16);
159
160 for (i = 0; i < G_N_ELEMENTS(data); i++) {
161 data[i] = i;
162 }
163 qtest_memwrite(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
164
165 for (i = 0; i < G_N_ELEMENTS(data); i++) {
166 g_assert_cmpuint(((uint32_t *)tmpshmem)[i], ==, i);
167 }
168
169 memset(data, 0, sizeof(data));
170
171 qtest_memread(s->qtest, (uintptr_t)s->mem_base, data, sizeof(data));
172 for (i = 0; i < G_N_ELEMENTS(data); i++) {
173 g_assert_cmpuint(data[i], ==, i);
174 }
175
176 qtest_quit(s->qtest);
177}
178
179static void test_ivshmem_pair(void)
180{
181 IVState state1, state2, *s1, *s2;
182 char *data;
183 int i;
184
185 setup_vm(&state1);
186 s1 = &state1;
187 setup_vm(&state2);
188 s2 = &state2;
189
190 data = g_malloc0(TMPSHMSIZE);
191
192
193 memset(tmpshmem, 0x42, TMPSHMSIZE);
194 qtest_memread(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
195 for (i = 0; i < TMPSHMSIZE; i++) {
196 g_assert_cmpuint(data[i], ==, 0x42);
197 }
198 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
199 for (i = 0; i < TMPSHMSIZE; i++) {
200 g_assert_cmpuint(data[i], ==, 0x42);
201 }
202
203
204 memset(data, 0x43, TMPSHMSIZE);
205 qtest_memwrite(s1->qtest, (uintptr_t)s1->mem_base, data, TMPSHMSIZE);
206 memset(data, 0, TMPSHMSIZE);
207 qtest_memread(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
208 for (i = 0; i < TMPSHMSIZE; i++) {
209 g_assert_cmpuint(data[i], ==, 0x43);
210 }
211
212
213 memset(data, 0x44, TMPSHMSIZE);
214 qtest_memwrite(s2->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
215 memset(data, 0, TMPSHMSIZE);
216 qtest_memread(s1->qtest, (uintptr_t)s2->mem_base, data, TMPSHMSIZE);
217 for (i = 0; i < TMPSHMSIZE; i++) {
218 g_assert_cmpuint(data[i], ==, 0x44);
219 }
220
221 qtest_quit(s1->qtest);
222 qtest_quit(s2->qtest);
223 g_free(data);
224}
225
226typedef struct ServerThread {
227 GThread *thread;
228 IvshmemServer *server;
229 int pipe[2];
230} ServerThread;
231
232static void *server_thread(void *data)
233{
234 ServerThread *t = data;
235 IvshmemServer *server = t->server;
236
237 while (true) {
238 fd_set fds;
239 int maxfd, ret;
240
241 FD_ZERO(&fds);
242 FD_SET(t->pipe[0], &fds);
243 maxfd = t->pipe[0] + 1;
244
245 ivshmem_server_get_fds(server, &fds, &maxfd);
246
247 ret = select(maxfd, &fds, NULL, NULL, NULL);
248
249 if (ret < 0) {
250 if (errno == EINTR) {
251 continue;
252 }
253
254 g_critical("select error: %s\n", strerror(errno));
255 break;
256 }
257 if (ret == 0) {
258 continue;
259 }
260
261 if (FD_ISSET(t->pipe[0], &fds)) {
262 break;
263 }
264
265 if (ivshmem_server_handle_fds(server, &fds, maxfd) < 0) {
266 g_critical("ivshmem_server_handle_fds() failed\n");
267 break;
268 }
269 }
270
271 return NULL;
272}
273
274static void setup_vm_with_server(IVState *s, int nvectors)
275{
276 char *cmd = g_strdup_printf("-chardev socket,id=chr0,path=%s,nowait "
277 "-device ivshmem,size=1M,chardev=chr0,vectors=%d",
278 tmpserver, nvectors);
279
280 setup_vm_cmd(s, cmd, true);
281
282 g_free(cmd);
283}
284
285static void test_ivshmem_server(void)
286{
287 IVState state1, state2, *s1, *s2;
288 ServerThread thread;
289 IvshmemServer server;
290 int ret, vm1, vm2;
291 int nvectors = 2;
292 guint64 end_time = g_get_monotonic_time() + 5 * G_TIME_SPAN_SECOND;
293
294 memset(tmpshmem, 0x42, TMPSHMSIZE);
295 ret = ivshmem_server_init(&server, tmpserver, tmpshm,
296 TMPSHMSIZE, nvectors,
297 g_test_verbose());
298 g_assert_cmpint(ret, ==, 0);
299
300 ret = ivshmem_server_start(&server);
301 g_assert_cmpint(ret, ==, 0);
302
303 setup_vm_with_server(&state1, nvectors);
304 s1 = &state1;
305 setup_vm_with_server(&state2, nvectors);
306 s2 = &state2;
307
308 g_assert_cmpuint(in_reg(s1, IVPOSITION), ==, 0xffffffff);
309 g_assert_cmpuint(in_reg(s2, IVPOSITION), ==, 0xffffffff);
310
311 g_assert_cmpuint(qtest_readb(s1->qtest, (uintptr_t)s1->mem_base), ==, 0x00);
312
313 thread.server = &server;
314 ret = pipe(thread.pipe);
315 g_assert_cmpint(ret, ==, 0);
316 thread.thread = g_thread_new("ivshmem-server", server_thread, &thread);
317 g_assert(thread.thread != NULL);
318
319
320 while (g_get_monotonic_time() < end_time) {
321 g_usleep(1000);
322
323 if (qtest_readb(s1->qtest, (uintptr_t)s1->mem_base) == 0x42 &&
324 qtest_readb(s2->qtest, (uintptr_t)s2->mem_base) == 0x42) {
325 break;
326 }
327 }
328
329
330 vm1 = in_reg(s1, IVPOSITION);
331 vm2 = in_reg(s2, IVPOSITION);
332 g_assert_cmpuint(vm1, !=, vm2);
333
334 global_qtest = s1->qtest;
335 ret = qpci_msix_table_size(s1->dev);
336 g_assert_cmpuint(ret, ==, nvectors);
337
338
339 ret = qpci_msix_pending(s1->dev, 0);
340 g_assert_cmpuint(ret, ==, 0);
341 out_reg(s2, DOORBELL, vm1 << 16);
342 do {
343 g_usleep(10000);
344 ret = qpci_msix_pending(s1->dev, 0);
345 } while (ret == 0 && g_get_monotonic_time() < end_time);
346 g_assert_cmpuint(ret, !=, 0);
347
348
349 global_qtest = s2->qtest;
350 ret = qpci_msix_pending(s2->dev, 0);
351 g_assert_cmpuint(ret, ==, 0);
352 out_reg(s1, DOORBELL, vm2 << 16);
353 do {
354 g_usleep(10000);
355 ret = qpci_msix_pending(s2->dev, 0);
356 } while (ret == 0 && g_get_monotonic_time() < end_time);
357 g_assert_cmpuint(ret, !=, 0);
358
359 qtest_quit(s2->qtest);
360 qtest_quit(s1->qtest);
361
362 if (qemu_write_full(thread.pipe[1], "q", 1) != 1) {
363 g_error("qemu_write_full: %s", g_strerror(errno));
364 }
365
366 g_thread_join(thread.thread);
367
368 ivshmem_server_close(&server);
369 close(thread.pipe[1]);
370 close(thread.pipe[0]);
371}
372
373#define PCI_SLOT_HP 0x06
374
375static void test_ivshmem_hotplug(void)
376{
377 gchar *opts;
378
379 qtest_start("");
380
381 opts = g_strdup_printf("'shm': '%s', 'size': '1M'", tmpshm);
382
383 qpci_plug_device_test("ivshmem", "iv1", PCI_SLOT_HP, opts);
384 qpci_unplug_acpi_device_test("iv1", PCI_SLOT_HP);
385
386 qtest_end();
387 g_free(opts);
388}
389
390static void test_ivshmem_memdev(void)
391{
392 IVState state;
393
394
395 setup_vm_cmd(&state, "-object memory-backend-ram,size=1M,id=mb1"
396 " -device ivshmem,x-memdev=mb1", false);
397
398 qtest_quit(state.qtest);
399}
400
401static void cleanup(void)
402{
403 if (tmpshmem) {
404 munmap(tmpshmem, TMPSHMSIZE);
405 tmpshmem = NULL;
406 }
407
408 if (tmpshm) {
409 shm_unlink(tmpshm);
410 g_free(tmpshm);
411 tmpshm = NULL;
412 }
413
414 if (tmpserver) {
415 g_unlink(tmpserver);
416 g_free(tmpserver);
417 tmpserver = NULL;
418 }
419
420 if (tmpdir) {
421 g_rmdir(tmpdir);
422 tmpdir = NULL;
423 }
424}
425
426static void abrt_handler(void *data)
427{
428 cleanup();
429}
430
431static gchar *mktempshm(int size, int *fd)
432{
433 while (true) {
434 gchar *name;
435
436 name = g_strdup_printf("/qtest-%u-%u", getpid(), g_random_int());
437 *fd = shm_open(name, O_CREAT|O_RDWR|O_EXCL,
438 S_IRWXU|S_IRWXG|S_IRWXO);
439 if (*fd > 0) {
440 g_assert(ftruncate(*fd, size) == 0);
441 return name;
442 }
443
444 g_free(name);
445
446 if (errno != EEXIST) {
447 perror("shm_open");
448 return NULL;
449 }
450 }
451}
452
453int main(int argc, char **argv)
454{
455 int ret, fd;
456 gchar dir[] = "/tmp/ivshmem-test.XXXXXX";
457
458#if !GLIB_CHECK_VERSION(2, 31, 0)
459 if (!g_thread_supported()) {
460 g_thread_init(NULL);
461 }
462#endif
463
464 g_test_init(&argc, &argv, NULL);
465
466 qtest_add_abrt_handler(abrt_handler, NULL);
467
468 tmpshm = mktempshm(TMPSHMSIZE, &fd);
469 if (!tmpshm) {
470 return 0;
471 }
472 tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
473 g_assert(tmpshmem != MAP_FAILED);
474
475 if (mkdtemp(dir) == NULL) {
476 g_error("mkdtemp: %s", g_strerror(errno));
477 }
478 tmpdir = dir;
479 tmpserver = g_strconcat(tmpdir, "/server", NULL);
480
481 qtest_add_func("/ivshmem/single", test_ivshmem_single);
482 qtest_add_func("/ivshmem/hotplug", test_ivshmem_hotplug);
483 qtest_add_func("/ivshmem/memdev", test_ivshmem_memdev);
484 if (g_test_slow()) {
485 qtest_add_func("/ivshmem/pair", test_ivshmem_pair);
486 qtest_add_func("/ivshmem/server", test_ivshmem_server);
487 }
488
489 ret = g_test_run();
490
491 cleanup();
492
493 return ret;
494}
495
