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20#ifndef CPU_M68K_H
21#define CPU_M68K_H
22
23#define TARGET_LONG_BITS 32
24
25#define CPUArchState struct CPUM68KState
26
27#include "config.h"
28#include "qemu-common.h"
29#include "exec/cpu-defs.h"
30
31#include "fpu/softfloat.h"
32
33#define MAX_QREGS 32
34
35#define EXCP_ACCESS 2
36#define EXCP_ADDRESS 3
37#define EXCP_ILLEGAL 4
38#define EXCP_DIV0 5
39#define EXCP_PRIVILEGE 8
40#define EXCP_TRACE 9
41#define EXCP_LINEA 10
42#define EXCP_LINEF 11
43#define EXCP_DEBUGNBP 12
44#define EXCP_DEBEGBP 13
45#define EXCP_FORMAT 14
46#define EXCP_UNINITIALIZED 15
47#define EXCP_TRAP0 32
48#define EXCP_TRAP15 47
49#define EXCP_UNSUPPORTED 61
50#define EXCP_ICE 13
51
52#define EXCP_RTE 0x100
53#define EXCP_HALT_INSN 0x101
54
55#define NB_MMU_MODES 2
56
57typedef struct CPUM68KState {
58 uint32_t dregs[8];
59 uint32_t aregs[8];
60 uint32_t pc;
61 uint32_t sr;
62
63
64 int current_sp;
65 uint32_t sp[2];
66
67
68 uint32_t cc_op;
69 uint32_t cc_dest;
70 uint32_t cc_src;
71 uint32_t cc_x;
72
73 float64 fregs[8];
74 float64 fp_result;
75 uint32_t fpcr;
76 uint32_t fpsr;
77 float_status fp_status;
78
79 uint64_t mactmp;
80
81
82
83 uint64_t macc[4];
84 uint32_t macsr;
85 uint32_t mac_mask;
86
87
88 uint32_t div1;
89 uint32_t div2;
90
91
92 struct {
93 uint32_t ar;
94 } mmu;
95
96
97 uint32_t vbr;
98 uint32_t mbar;
99 uint32_t rambar0;
100 uint32_t cacr;
101
102 int pending_vector;
103 int pending_level;
104
105 uint32_t qregs[MAX_QREGS];
106
107 CPU_COMMON
108
109
110 uint32_t features;
111} CPUM68KState;
112
113#include "cpu-qom.h"
114
115void m68k_tcg_init(void);
116void m68k_cpu_init_gdb(M68kCPU *cpu);
117M68kCPU *cpu_m68k_init(const char *cpu_model);
118int cpu_m68k_exec(CPUState *cpu);
119
120
121
122int cpu_m68k_signal_handler(int host_signum, void *pinfo,
123 void *puc);
124void cpu_m68k_flush_flags(CPUM68KState *, int);
125
126enum {
127 CC_OP_DYNAMIC,
128 CC_OP_FLAGS,
129 CC_OP_LOGIC,
130 CC_OP_ADD,
131 CC_OP_SUB,
132 CC_OP_CMPB,
133 CC_OP_CMPW,
134 CC_OP_ADDX,
135 CC_OP_SUBX,
136 CC_OP_SHIFT,
137};
138
139#define CCF_C 0x01
140#define CCF_V 0x02
141#define CCF_Z 0x04
142#define CCF_N 0x08
143#define CCF_X 0x10
144
145#define SR_I_SHIFT 8
146#define SR_I 0x0700
147#define SR_M 0x1000
148#define SR_S 0x2000
149#define SR_T 0x8000
150
151#define M68K_SSP 0
152#define M68K_USP 1
153
154
155#define M68K_CACR_EUSP 0x10
156
157#define MACSR_PAV0 0x100
158#define MACSR_OMC 0x080
159#define MACSR_SU 0x040
160#define MACSR_FI 0x020
161#define MACSR_RT 0x010
162#define MACSR_N 0x008
163#define MACSR_Z 0x004
164#define MACSR_V 0x002
165#define MACSR_EV 0x001
166
167void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector);
168void m68k_set_macsr(CPUM68KState *env, uint32_t val);
169void m68k_switch_sp(CPUM68KState *env);
170
171#define M68K_FPCR_PREC (1 << 6)
172
173void do_m68k_semihosting(CPUM68KState *env, int nr);
174
175
176
177
178
179enum m68k_features {
180 M68K_FEATURE_CF_ISA_A,
181 M68K_FEATURE_CF_ISA_B,
182 M68K_FEATURE_CF_ISA_APLUSC,
183 M68K_FEATURE_BRAL,
184 M68K_FEATURE_CF_FPU,
185 M68K_FEATURE_CF_MAC,
186 M68K_FEATURE_CF_EMAC,
187 M68K_FEATURE_CF_EMAC_B,
188 M68K_FEATURE_USP,
189 M68K_FEATURE_EXT_FULL,
190 M68K_FEATURE_WORD_INDEX
191};
192
193static inline int m68k_feature(CPUM68KState *env, int feature)
194{
195 return (env->features & (1u << feature)) != 0;
196}
197
198void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
199
200void register_m68k_insns (CPUM68KState *env);
201
202#ifdef CONFIG_USER_ONLY
203
204#define TARGET_PAGE_BITS 13
205#else
206
207#define TARGET_PAGE_BITS 10
208#endif
209
210#define TARGET_PHYS_ADDR_SPACE_BITS 32
211#define TARGET_VIRT_ADDR_SPACE_BITS 32
212
213#define cpu_init(cpu_model) CPU(cpu_m68k_init(cpu_model))
214
215#define cpu_exec cpu_m68k_exec
216#define cpu_signal_handler cpu_m68k_signal_handler
217#define cpu_list m68k_cpu_list
218
219
220#define MMU_MODE0_SUFFIX _kernel
221#define MMU_MODE1_SUFFIX _user
222#define MMU_USER_IDX 1
223static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
224{
225 return (env->sr & SR_S) == 0 ? 1 : 0;
226}
227
228int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
229 int mmu_idx);
230
231#include "exec/cpu-all.h"
232
233static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
234 target_ulong *cs_base, int *flags)
235{
236 *pc = env->pc;
237 *cs_base = 0;
238 *flags = (env->fpcr & M68K_FPCR_PREC)
239 | (env->sr & SR_S)
240 | ((env->macsr >> 4) & 0xf);
241}
242
243#include "exec/exec-all.h"
244
245#endif
246