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20#include "qemu/osdep.h"
21#include "cpu.h"
22#include "exec/helper-proto.h"
23#include "exec/cpu_ldst.h"
24
25
26void cpu_sync_bndcs_hflags(CPUX86State *env)
27{
28 uint32_t hflags = env->hflags;
29 uint32_t hflags2 = env->hflags2;
30 uint32_t bndcsr;
31
32 if ((hflags & HF_CPL_MASK) == 3) {
33 bndcsr = env->bndcs_regs.cfgu;
34 } else {
35 bndcsr = env->msr_bndcfgs;
36 }
37
38 if ((env->cr[4] & CR4_OSXSAVE_MASK)
39 && (env->xcr0 & XSTATE_BNDCSR_MASK)
40 && (bndcsr & BNDCFG_ENABLE)) {
41 hflags |= HF_MPX_EN_MASK;
42 } else {
43 hflags &= ~HF_MPX_EN_MASK;
44 }
45
46 if (bndcsr & BNDCFG_BNDPRESERVE) {
47 hflags2 |= HF2_MPX_PR_MASK;
48 } else {
49 hflags2 &= ~HF2_MPX_PR_MASK;
50 }
51
52 env->hflags = hflags;
53 env->hflags2 = hflags2;
54}
55
56void helper_bndck(CPUX86State *env, uint32_t fail)
57{
58 if (unlikely(fail)) {
59 env->bndcs_regs.sts = 1;
60 raise_exception_ra(env, EXCP05_BOUND, GETPC());
61 }
62}
63
64static uint64_t lookup_bte64(CPUX86State *env, uint64_t base, uintptr_t ra)
65{
66 uint64_t bndcsr, bde, bt;
67
68 if ((env->hflags & HF_CPL_MASK) == 3) {
69 bndcsr = env->bndcs_regs.cfgu;
70 } else {
71 bndcsr = env->msr_bndcfgs;
72 }
73
74 bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12);
75 bt = cpu_ldq_data_ra(env, bde, ra);
76 if ((bt & 1) == 0) {
77 env->bndcs_regs.sts = bde | 2;
78 raise_exception_ra(env, EXCP05_BOUND, ra);
79 }
80
81 return (extract64(base, 3, 17) << 5) + (bt & ~7);
82}
83
84static uint32_t lookup_bte32(CPUX86State *env, uint32_t base, uintptr_t ra)
85{
86 uint32_t bndcsr, bde, bt;
87
88 if ((env->hflags & HF_CPL_MASK) == 3) {
89 bndcsr = env->bndcs_regs.cfgu;
90 } else {
91 bndcsr = env->msr_bndcfgs;
92 }
93
94 bde = (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK);
95 bt = cpu_ldl_data_ra(env, bde, ra);
96 if ((bt & 1) == 0) {
97 env->bndcs_regs.sts = bde | 2;
98 raise_exception_ra(env, EXCP05_BOUND, ra);
99 }
100
101 return (extract32(base, 2, 10) << 4) + (bt & ~3);
102}
103
104uint64_t helper_bndldx64(CPUX86State *env, target_ulong base, target_ulong ptr)
105{
106 uintptr_t ra = GETPC();
107 uint64_t bte, lb, ub, pt;
108
109 bte = lookup_bte64(env, base, ra);
110 lb = cpu_ldq_data_ra(env, bte, ra);
111 ub = cpu_ldq_data_ra(env, bte + 8, ra);
112 pt = cpu_ldq_data_ra(env, bte + 16, ra);
113
114 if (pt != ptr) {
115 lb = ub = 0;
116 }
117 env->mmx_t0.MMX_Q(0) = ub;
118 return lb;
119}
120
121uint64_t helper_bndldx32(CPUX86State *env, target_ulong base, target_ulong ptr)
122{
123 uintptr_t ra = GETPC();
124 uint32_t bte, lb, ub, pt;
125
126 bte = lookup_bte32(env, base, ra);
127 lb = cpu_ldl_data_ra(env, bte, ra);
128 ub = cpu_ldl_data_ra(env, bte + 4, ra);
129 pt = cpu_ldl_data_ra(env, bte + 8, ra);
130
131 if (pt != ptr) {
132 lb = ub = 0;
133 }
134 return ((uint64_t)ub << 32) | lb;
135}
136
137void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr,
138 uint64_t lb, uint64_t ub)
139{
140 uintptr_t ra = GETPC();
141 uint64_t bte;
142
143 bte = lookup_bte64(env, base, ra);
144 cpu_stq_data_ra(env, bte, lb, ra);
145 cpu_stq_data_ra(env, bte + 8, ub, ra);
146 cpu_stq_data_ra(env, bte + 16, ptr, ra);
147}
148
149void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr,
150 uint64_t lb, uint64_t ub)
151{
152 uintptr_t ra = GETPC();
153 uint32_t bte;
154
155 bte = lookup_bte32(env, base, ra);
156 cpu_stl_data_ra(env, bte, lb, ra);
157 cpu_stl_data_ra(env, bte + 4, ub, ra);
158 cpu_stl_data_ra(env, bte + 8, ptr, ra);
159}
160
161void helper_bnd_jmp(CPUX86State *env)
162{
163 if (!(env->hflags2 & HF2_MPX_PR_MASK)) {
164 memset(env->bnd_regs, 0, sizeof(env->bnd_regs));
165 env->hflags &= ~HF_MPX_IU_MASK;
166 }
167}
168