LXR qemu/tests/tcg/mips/mips64-dsp/dpaq_s_w

   1#include"io.h"
   2int main(void)
   3{
   4    long long rt, rs;
   5    long long achi, acli;
   6    long long acho, aclo;
   7    long long resh, resl;
   8
   9    achi = 0x1;
  10    acli = 0x1;
  11    rs = 0x0001000100010001;
  12    rt = 0x0002000200020002;
  13    resh = 0x1;
  14    resl = 0x11;
  15
  16    __asm
  17        ("mthi %2, $ac1\t\n"
  18         "mtlo %3, $ac1\t\n"
  19         "dpaq_s.w.qh $ac1, %4, %5\t\n"
  20         "mfhi %0, $ac1\t\n"
  21         "mflo %1, $ac1\t\n"
  22         : "=r"(acho), "=r"(aclo)
  23         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  24        );
  25    if ((acho != resh) || (aclo != resl)) {
  26        printf("1 dpaq_s.w.qh error\n");
  27
  28        return -1;
  29    }
  30
  31    achi = 0xffffffff;
  32    acli = 0xaaaaaaaa;
  33
  34    rs = 0x1111222233334444;
  35    rt = 0xffffeeeeddddcccc;
  36
  37    resh = 0x00;
  38    resl = 0xffffffffd27ad82e;
  39
  40    __asm
  41        ("mthi %2, $ac1\t\n"
  42         "mtlo %3, $ac1\t\n"
  43         "dpaq_s.w.qh $ac1, %4, %5\t\n"
  44         "mfhi %0, $ac1\t\n"
  45         "mflo %1, $ac1\t\n"
  46         : "=r"(acho), "=r"(aclo)
  47         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  48        );
  49
  50    if ((acho != resh) || (aclo != resl)) {
  51        printf("2 dpaq_s.w.qh error\n");
  52
  53        return -1;
  54    }
  55
  56    return 0;
  57}
  58