qemu/hw/display/pl110.c
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   1/*
   2 * Arm PrimeCell PL110 Color LCD Controller
   3 *
   4 * Copyright (c) 2005-2009 CodeSourcery.
   5 * Written by Paul Brook
   6 *
   7 * This code is licensed under the GNU LGPL
   8 */
   9
  10#include "qemu/osdep.h"
  11#include "hw/sysbus.h"
  12#include "ui/console.h"
  13#include "framebuffer.h"
  14#include "ui/pixel_ops.h"
  15
  16#define PL110_CR_EN   0x001
  17#define PL110_CR_BGR  0x100
  18#define PL110_CR_BEBO 0x200
  19#define PL110_CR_BEPO 0x400
  20#define PL110_CR_PWR  0x800
  21
  22enum pl110_bppmode
  23{
  24    BPP_1,
  25    BPP_2,
  26    BPP_4,
  27    BPP_8,
  28    BPP_16,
  29    BPP_32,
  30    BPP_16_565, /* PL111 only */
  31    BPP_12      /* PL111 only */
  32};
  33
  34
  35/* The Versatile/PB uses a slightly modified PL110 controller.  */
  36enum pl110_version
  37{
  38    PL110,
  39    PL110_VERSATILE,
  40    PL111
  41};
  42
  43#define TYPE_PL110 "pl110"
  44#define PL110(obj) OBJECT_CHECK(PL110State, (obj), TYPE_PL110)
  45
  46typedef struct PL110State {
  47    SysBusDevice parent_obj;
  48
  49    MemoryRegion iomem;
  50    MemoryRegionSection fbsection;
  51    QemuConsole *con;
  52
  53    int version;
  54    uint32_t timing[4];
  55    uint32_t cr;
  56    uint32_t upbase;
  57    uint32_t lpbase;
  58    uint32_t int_status;
  59    uint32_t int_mask;
  60    int cols;
  61    int rows;
  62    enum pl110_bppmode bpp;
  63    int invalidate;
  64    uint32_t mux_ctrl;
  65    uint32_t palette[256];
  66    uint32_t raw_palette[128];
  67    qemu_irq irq;
  68} PL110State;
  69
  70static int vmstate_pl110_post_load(void *opaque, int version_id);
  71
  72static const VMStateDescription vmstate_pl110 = {
  73    .name = "pl110",
  74    .version_id = 2,
  75    .minimum_version_id = 1,
  76    .post_load = vmstate_pl110_post_load,
  77    .fields = (VMStateField[]) {
  78        VMSTATE_INT32(version, PL110State),
  79        VMSTATE_UINT32_ARRAY(timing, PL110State, 4),
  80        VMSTATE_UINT32(cr, PL110State),
  81        VMSTATE_UINT32(upbase, PL110State),
  82        VMSTATE_UINT32(lpbase, PL110State),
  83        VMSTATE_UINT32(int_status, PL110State),
  84        VMSTATE_UINT32(int_mask, PL110State),
  85        VMSTATE_INT32(cols, PL110State),
  86        VMSTATE_INT32(rows, PL110State),
  87        VMSTATE_UINT32(bpp, PL110State),
  88        VMSTATE_INT32(invalidate, PL110State),
  89        VMSTATE_UINT32_ARRAY(palette, PL110State, 256),
  90        VMSTATE_UINT32_ARRAY(raw_palette, PL110State, 128),
  91        VMSTATE_UINT32_V(mux_ctrl, PL110State, 2),
  92        VMSTATE_END_OF_LIST()
  93    }
  94};
  95
  96static const unsigned char pl110_id[] =
  97{ 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
  98
  99static const unsigned char pl111_id[] = {
 100    0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
 101};
 102
 103
 104/* Indexed by pl110_version */
 105static const unsigned char *idregs[] = {
 106    pl110_id,
 107    /* The ARM documentation (DDI0224C) says the CLCDC on the Versatile board
 108     * has a different ID (0x93, 0x10, 0x04, 0x00, ...). However the hardware
 109     * itself has the same ID values as a stock PL110, and guests (in
 110     * particular Linux) rely on this. We emulate what the hardware does,
 111     * rather than what the docs claim it ought to do.
 112     */
 113    pl110_id,
 114    pl111_id
 115};
 116
 117#define BITS 8
 118#include "pl110_template.h"
 119#define BITS 15
 120#include "pl110_template.h"
 121#define BITS 16
 122#include "pl110_template.h"
 123#define BITS 24
 124#include "pl110_template.h"
 125#define BITS 32
 126#include "pl110_template.h"
 127
 128static int pl110_enabled(PL110State *s)
 129{
 130  return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
 131}
 132
 133static void pl110_update_display(void *opaque)
 134{
 135    PL110State *s = (PL110State *)opaque;
 136    SysBusDevice *sbd;
 137    DisplaySurface *surface = qemu_console_surface(s->con);
 138    drawfn* fntable;
 139    drawfn fn;
 140    int dest_width;
 141    int src_width;
 142    int bpp_offset;
 143    int first;
 144    int last;
 145
 146    if (!pl110_enabled(s)) {
 147        return;
 148    }
 149
 150    sbd = SYS_BUS_DEVICE(s);
 151
 152    switch (surface_bits_per_pixel(surface)) {
 153    case 0:
 154        return;
 155    case 8:
 156        fntable = pl110_draw_fn_8;
 157        dest_width = 1;
 158        break;
 159    case 15:
 160        fntable = pl110_draw_fn_15;
 161        dest_width = 2;
 162        break;
 163    case 16:
 164        fntable = pl110_draw_fn_16;
 165        dest_width = 2;
 166        break;
 167    case 24:
 168        fntable = pl110_draw_fn_24;
 169        dest_width = 3;
 170        break;
 171    case 32:
 172        fntable = pl110_draw_fn_32;
 173        dest_width = 4;
 174        break;
 175    default:
 176        fprintf(stderr, "pl110: Bad color depth\n");
 177        exit(1);
 178    }
 179    if (s->cr & PL110_CR_BGR)
 180        bpp_offset = 0;
 181    else
 182        bpp_offset = 24;
 183
 184    if ((s->version != PL111) && (s->bpp == BPP_16)) {
 185        /* The PL110's native 16 bit mode is 5551; however
 186         * most boards with a PL110 implement an external
 187         * mux which allows bits to be reshuffled to give
 188         * 565 format. The mux is typically controlled by
 189         * an external system register.
 190         * This is controlled by a GPIO input pin
 191         * so boards can wire it up to their register.
 192         *
 193         * The PL111 straightforwardly implements both
 194         * 5551 and 565 under control of the bpp field
 195         * in the LCDControl register.
 196         */
 197        switch (s->mux_ctrl) {
 198        case 3: /* 565 BGR */
 199            bpp_offset = (BPP_16_565 - BPP_16);
 200            break;
 201        case 1: /* 5551 */
 202            break;
 203        case 0: /* 888; also if we have loaded vmstate from an old version */
 204        case 2: /* 565 RGB */
 205        default:
 206            /* treat as 565 but honour BGR bit */
 207            bpp_offset += (BPP_16_565 - BPP_16);
 208            break;
 209        }
 210    }
 211
 212    if (s->cr & PL110_CR_BEBO)
 213        fn = fntable[s->bpp + 8 + bpp_offset];
 214    else if (s->cr & PL110_CR_BEPO)
 215        fn = fntable[s->bpp + 16 + bpp_offset];
 216    else
 217        fn = fntable[s->bpp + bpp_offset];
 218
 219    src_width = s->cols;
 220    switch (s->bpp) {
 221    case BPP_1:
 222        src_width >>= 3;
 223        break;
 224    case BPP_2:
 225        src_width >>= 2;
 226        break;
 227    case BPP_4:
 228        src_width >>= 1;
 229        break;
 230    case BPP_8:
 231        break;
 232    case BPP_16:
 233    case BPP_16_565:
 234    case BPP_12:
 235        src_width <<= 1;
 236        break;
 237    case BPP_32:
 238        src_width <<= 2;
 239        break;
 240    }
 241    dest_width *= s->cols;
 242    first = 0;
 243    if (s->invalidate) {
 244        framebuffer_update_memory_section(&s->fbsection,
 245                                          sysbus_address_space(sbd),
 246                                          s->upbase,
 247                                          s->rows, src_width);
 248    }
 249
 250    framebuffer_update_display(surface, &s->fbsection,
 251                               s->cols, s->rows,
 252                               src_width, dest_width, 0,
 253                               s->invalidate,
 254                               fn, s->palette,
 255                               &first, &last);
 256
 257    if (first >= 0) {
 258        dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1);
 259    }
 260    s->invalidate = 0;
 261}
 262
 263static void pl110_invalidate_display(void * opaque)
 264{
 265    PL110State *s = (PL110State *)opaque;
 266    s->invalidate = 1;
 267    if (pl110_enabled(s)) {
 268        qemu_console_resize(s->con, s->cols, s->rows);
 269    }
 270}
 271
 272static void pl110_update_palette(PL110State *s, int n)
 273{
 274    DisplaySurface *surface = qemu_console_surface(s->con);
 275    int i;
 276    uint32_t raw;
 277    unsigned int r, g, b;
 278
 279    raw = s->raw_palette[n];
 280    n <<= 1;
 281    for (i = 0; i < 2; i++) {
 282        r = (raw & 0x1f) << 3;
 283        raw >>= 5;
 284        g = (raw & 0x1f) << 3;
 285        raw >>= 5;
 286        b = (raw & 0x1f) << 3;
 287        /* The I bit is ignored.  */
 288        raw >>= 6;
 289        switch (surface_bits_per_pixel(surface)) {
 290        case 8:
 291            s->palette[n] = rgb_to_pixel8(r, g, b);
 292            break;
 293        case 15:
 294            s->palette[n] = rgb_to_pixel15(r, g, b);
 295            break;
 296        case 16:
 297            s->palette[n] = rgb_to_pixel16(r, g, b);
 298            break;
 299        case 24:
 300        case 32:
 301            s->palette[n] = rgb_to_pixel32(r, g, b);
 302            break;
 303        }
 304        n++;
 305    }
 306}
 307
 308static void pl110_resize(PL110State *s, int width, int height)
 309{
 310    if (width != s->cols || height != s->rows) {
 311        if (pl110_enabled(s)) {
 312            qemu_console_resize(s->con, width, height);
 313        }
 314    }
 315    s->cols = width;
 316    s->rows = height;
 317}
 318
 319/* Update interrupts.  */
 320static void pl110_update(PL110State *s)
 321{
 322  /* TODO: Implement interrupts.  */
 323}
 324
 325static uint64_t pl110_read(void *opaque, hwaddr offset,
 326                           unsigned size)
 327{
 328    PL110State *s = (PL110State *)opaque;
 329
 330    if (offset >= 0xfe0 && offset < 0x1000) {
 331        return idregs[s->version][(offset - 0xfe0) >> 2];
 332    }
 333    if (offset >= 0x200 && offset < 0x400) {
 334        return s->raw_palette[(offset - 0x200) >> 2];
 335    }
 336    switch (offset >> 2) {
 337    case 0: /* LCDTiming0 */
 338        return s->timing[0];
 339    case 1: /* LCDTiming1 */
 340        return s->timing[1];
 341    case 2: /* LCDTiming2 */
 342        return s->timing[2];
 343    case 3: /* LCDTiming3 */
 344        return s->timing[3];
 345    case 4: /* LCDUPBASE */
 346        return s->upbase;
 347    case 5: /* LCDLPBASE */
 348        return s->lpbase;
 349    case 6: /* LCDIMSC */
 350        if (s->version != PL110) {
 351            return s->cr;
 352        }
 353        return s->int_mask;
 354    case 7: /* LCDControl */
 355        if (s->version != PL110) {
 356            return s->int_mask;
 357        }
 358        return s->cr;
 359    case 8: /* LCDRIS */
 360        return s->int_status;
 361    case 9: /* LCDMIS */
 362        return s->int_status & s->int_mask;
 363    case 11: /* LCDUPCURR */
 364        /* TODO: Implement vertical refresh.  */
 365        return s->upbase;
 366    case 12: /* LCDLPCURR */
 367        return s->lpbase;
 368    default:
 369        qemu_log_mask(LOG_GUEST_ERROR,
 370                      "pl110_read: Bad offset %x\n", (int)offset);
 371        return 0;
 372    }
 373}
 374
 375static void pl110_write(void *opaque, hwaddr offset,
 376                        uint64_t val, unsigned size)
 377{
 378    PL110State *s = (PL110State *)opaque;
 379    int n;
 380
 381    /* For simplicity invalidate the display whenever a control register
 382       is written to.  */
 383    s->invalidate = 1;
 384    if (offset >= 0x200 && offset < 0x400) {
 385        /* Palette.  */
 386        n = (offset - 0x200) >> 2;
 387        s->raw_palette[(offset - 0x200) >> 2] = val;
 388        pl110_update_palette(s, n);
 389        return;
 390    }
 391    switch (offset >> 2) {
 392    case 0: /* LCDTiming0 */
 393        s->timing[0] = val;
 394        n = ((val & 0xfc) + 4) * 4;
 395        pl110_resize(s, n, s->rows);
 396        break;
 397    case 1: /* LCDTiming1 */
 398        s->timing[1] = val;
 399        n = (val & 0x3ff) + 1;
 400        pl110_resize(s, s->cols, n);
 401        break;
 402    case 2: /* LCDTiming2 */
 403        s->timing[2] = val;
 404        break;
 405    case 3: /* LCDTiming3 */
 406        s->timing[3] = val;
 407        break;
 408    case 4: /* LCDUPBASE */
 409        s->upbase = val;
 410        break;
 411    case 5: /* LCDLPBASE */
 412        s->lpbase = val;
 413        break;
 414    case 6: /* LCDIMSC */
 415        if (s->version != PL110) {
 416            goto control;
 417        }
 418    imsc:
 419        s->int_mask = val;
 420        pl110_update(s);
 421        break;
 422    case 7: /* LCDControl */
 423        if (s->version != PL110) {
 424            goto imsc;
 425        }
 426    control:
 427        s->cr = val;
 428        s->bpp = (val >> 1) & 7;
 429        if (pl110_enabled(s)) {
 430            qemu_console_resize(s->con, s->cols, s->rows);
 431        }
 432        break;
 433    case 10: /* LCDICR */
 434        s->int_status &= ~val;
 435        pl110_update(s);
 436        break;
 437    default:
 438        qemu_log_mask(LOG_GUEST_ERROR,
 439                      "pl110_write: Bad offset %x\n", (int)offset);
 440    }
 441}
 442
 443static const MemoryRegionOps pl110_ops = {
 444    .read = pl110_read,
 445    .write = pl110_write,
 446    .endianness = DEVICE_NATIVE_ENDIAN,
 447};
 448
 449static void pl110_mux_ctrl_set(void *opaque, int line, int level)
 450{
 451    PL110State *s = (PL110State *)opaque;
 452    s->mux_ctrl = level;
 453}
 454
 455static int vmstate_pl110_post_load(void *opaque, int version_id)
 456{
 457    PL110State *s = opaque;
 458    /* Make sure we redraw, and at the right size */
 459    pl110_invalidate_display(s);
 460    return 0;
 461}
 462
 463static const GraphicHwOps pl110_gfx_ops = {
 464    .invalidate  = pl110_invalidate_display,
 465    .gfx_update  = pl110_update_display,
 466};
 467
 468static int pl110_initfn(SysBusDevice *sbd)
 469{
 470    DeviceState *dev = DEVICE(sbd);
 471    PL110State *s = PL110(dev);
 472
 473    memory_region_init_io(&s->iomem, OBJECT(s), &pl110_ops, s, "pl110", 0x1000);
 474    sysbus_init_mmio(sbd, &s->iomem);
 475    sysbus_init_irq(sbd, &s->irq);
 476    qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1);
 477    s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s);
 478    return 0;
 479}
 480
 481static void pl110_init(Object *obj)
 482{
 483    PL110State *s = PL110(obj);
 484
 485    s->version = PL110;
 486}
 487
 488static void pl110_versatile_init(Object *obj)
 489{
 490    PL110State *s = PL110(obj);
 491
 492    s->version = PL110_VERSATILE;
 493}
 494
 495static void pl111_init(Object *obj)
 496{
 497    PL110State *s = PL110(obj);
 498
 499    s->version = PL111;
 500}
 501
 502static void pl110_class_init(ObjectClass *klass, void *data)
 503{
 504    DeviceClass *dc = DEVICE_CLASS(klass);
 505    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 506
 507    k->init = pl110_initfn;
 508    set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
 509    dc->vmsd = &vmstate_pl110;
 510}
 511
 512static const TypeInfo pl110_info = {
 513    .name          = TYPE_PL110,
 514    .parent        = TYPE_SYS_BUS_DEVICE,
 515    .instance_size = sizeof(PL110State),
 516    .instance_init = pl110_init,
 517    .class_init    = pl110_class_init,
 518};
 519
 520static const TypeInfo pl110_versatile_info = {
 521    .name          = "pl110_versatile",
 522    .parent        = TYPE_PL110,
 523    .instance_init = pl110_versatile_init,
 524};
 525
 526static const TypeInfo pl111_info = {
 527    .name          = "pl111",
 528    .parent        = TYPE_PL110,
 529    .instance_init = pl111_init,
 530};
 531
 532static void pl110_register_types(void)
 533{
 534    type_register_static(&pl110_info);
 535    type_register_static(&pl110_versatile_info);
 536    type_register_static(&pl111_info);
 537}
 538
 539type_init(pl110_register_types)
 540