1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#include "qemu/osdep.h"
21
22#include "cpu.h"
23#include "mmu.h"
24#include "exec/exec-all.h"
25#include "exec/cpu_ldst.h"
26#include "qemu/host-utils.h"
27#include "exec/helper-proto.h"
28
29
30
31
32void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
33 uintptr_t retaddr)
34{
35 int ret;
36
37 ret = moxie_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
38 if (unlikely(ret)) {
39 if (retaddr) {
40 cpu_restore_state(cs, retaddr);
41 }
42 }
43 cpu_loop_exit(cs);
44}
45
46void helper_raise_exception(CPUMoxieState *env, int ex)
47{
48 CPUState *cs = CPU(moxie_env_get_cpu(env));
49
50 cs->exception_index = ex;
51
52 env->sregs[2] = ex;
53
54 cpu_restore_state(cs, GETPC());
55 env->sregs[5] = env->pc;
56
57 env->pc = env->sregs[1];
58 cpu_loop_exit(cs);
59}
60
61uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
62{
63 if (unlikely(b == 0)) {
64 helper_raise_exception(env, MOXIE_EX_DIV0);
65 return 0;
66 }
67 if (unlikely(a == INT_MIN && b == -1)) {
68 return INT_MIN;
69 }
70
71 return (int32_t)a / (int32_t)b;
72}
73
74uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
75{
76 if (unlikely(b == 0)) {
77 helper_raise_exception(env, MOXIE_EX_DIV0);
78 return 0;
79 }
80 return a / b;
81}
82
83void helper_debug(CPUMoxieState *env)
84{
85 CPUState *cs = CPU(moxie_env_get_cpu(env));
86
87 cs->exception_index = EXCP_DEBUG;
88 cpu_loop_exit(cs);
89}
90
91#if defined(CONFIG_USER_ONLY)
92
93void moxie_cpu_do_interrupt(CPUState *cs)
94{
95 CPUState *cs = CPU(moxie_env_get_cpu(env));
96
97 cs->exception_index = -1;
98}
99
100int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
101 int rw, int mmu_idx)
102{
103 MoxieCPU *cpu = MOXIE_CPU(cs);
104
105 cs->exception_index = 0xaa;
106 cpu->env.debug1 = address;
107 cpu_dump_state(cs, stderr, fprintf, 0);
108 return 1;
109}
110
111#else
112
113int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
114 int rw, int mmu_idx)
115{
116 MoxieCPU *cpu = MOXIE_CPU(cs);
117 CPUMoxieState *env = &cpu->env;
118 MoxieMMUResult res;
119 int prot, miss;
120 target_ulong phy;
121 int r = 1;
122
123 address &= TARGET_PAGE_MASK;
124 prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
125 miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
126 if (miss) {
127
128 phy = 0;
129 cs->exception_index = MOXIE_EX_MMU_MISS;
130 } else {
131 phy = res.phy;
132 r = 0;
133 }
134 tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
135 return r;
136}
137
138
139void moxie_cpu_do_interrupt(CPUState *cs)
140{
141 switch (cs->exception_index) {
142 case MOXIE_EX_BREAK:
143 break;
144 default:
145 break;
146 }
147}
148
149hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
150{
151 MoxieCPU *cpu = MOXIE_CPU(cs);
152 uint32_t phy = addr;
153 MoxieMMUResult res;
154 int miss;
155
156 miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
157 if (!miss) {
158 phy = res.phy;
159 }
160 return phy;
161}
162#endif
163