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28
29#include "qemu/osdep.h"
30#include "hw/acpi/acpi.h"
31#include "hw/acpi/aml-build.h"
32#include "hw/acpi/bios-linker-loader.h"
33#include "hw/nvram/fw_cfg.h"
34#include "hw/mem/nvdimm.h"
35
36static int nvdimm_plugged_device_list(Object *obj, void *opaque)
37{
38 GSList **list = opaque;
39
40 if (object_dynamic_cast(obj, TYPE_NVDIMM)) {
41 DeviceState *dev = DEVICE(obj);
42
43 if (dev->realized) {
44 *list = g_slist_append(*list, DEVICE(obj));
45 }
46 }
47
48 object_child_foreach(obj, nvdimm_plugged_device_list, opaque);
49 return 0;
50}
51
52
53
54
55
56
57
58
59static GSList *nvdimm_get_plugged_device_list(void)
60{
61 GSList *list = NULL;
62
63 object_child_foreach(qdev_get_machine(), nvdimm_plugged_device_list,
64 &list);
65 return list;
66}
67
68#define NVDIMM_UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
69 { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
70 (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, \
71 (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }
72
73
74
75
76
77static const uint8_t nvdimm_nfit_spa_uuid[] =
78 NVDIMM_UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33,
79 0x18, 0xb7, 0x8c, 0xdb);
80
81
82
83
84
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86
87
88
89
90
91struct NvdimmNfitHeader {
92 ACPI_TABLE_HEADER_DEF
93 uint32_t reserved;
94} QEMU_PACKED;
95typedef struct NvdimmNfitHeader NvdimmNfitHeader;
96
97
98
99
100
101
102
103
104
105
106
107
108struct NvdimmNfitSpa {
109 uint16_t type;
110 uint16_t length;
111 uint16_t spa_index;
112 uint16_t flags;
113 uint32_t reserved;
114 uint32_t proximity_domain;
115 uint8_t type_guid[16];
116 uint64_t spa_base;
117 uint64_t spa_length;
118 uint64_t mem_attr;
119} QEMU_PACKED;
120typedef struct NvdimmNfitSpa NvdimmNfitSpa;
121
122
123
124
125
126
127
128struct NvdimmNfitMemDev {
129 uint16_t type;
130 uint16_t length;
131 uint32_t nfit_handle;
132 uint16_t phys_id;
133 uint16_t region_id;
134 uint16_t spa_index;
135 uint16_t dcr_index;
136 uint64_t region_len;
137 uint64_t region_offset;
138 uint64_t region_dpa;
139 uint16_t interleave_index;
140 uint16_t interleave_ways;
141 uint16_t flags;
142 uint16_t reserved;
143} QEMU_PACKED;
144typedef struct NvdimmNfitMemDev NvdimmNfitMemDev;
145
146
147
148
149
150
151struct NvdimmNfitControlRegion {
152 uint16_t type;
153 uint16_t length;
154 uint16_t dcr_index;
155 uint16_t vendor_id;
156 uint16_t device_id;
157 uint16_t revision_id;
158 uint16_t sub_vendor_id;
159 uint16_t sub_device_id;
160 uint16_t sub_revision_id;
161 uint8_t reserved[6];
162 uint32_t serial_number;
163 uint16_t fic;
164 uint16_t num_bcw;
165 uint64_t bcw_size;
166 uint64_t cmd_offset;
167 uint64_t cmd_size;
168 uint64_t status_offset;
169 uint64_t status_size;
170 uint16_t flags;
171 uint8_t reserved2[6];
172} QEMU_PACKED;
173typedef struct NvdimmNfitControlRegion NvdimmNfitControlRegion;
174
175
176
177
178
179
180
181
182static uint32_t nvdimm_slot_to_sn(int slot)
183{
184 return 0x123456 + slot;
185}
186
187
188
189
190
191
192
193
194
195static uint32_t nvdimm_slot_to_handle(int slot)
196{
197 return slot + 1;
198}
199
200
201
202
203
204
205
206
207
208static uint16_t nvdimm_slot_to_spa_index(int slot)
209{
210 return (slot + 1) << 1;
211}
212
213
214static uint32_t nvdimm_slot_to_dcr_index(int slot)
215{
216 return nvdimm_slot_to_spa_index(slot) + 1;
217}
218
219static NVDIMMDevice *nvdimm_get_device_by_handle(uint32_t handle)
220{
221 NVDIMMDevice *nvdimm = NULL;
222 GSList *list, *device_list = nvdimm_get_plugged_device_list();
223
224 for (list = device_list; list; list = list->next) {
225 NVDIMMDevice *nvd = list->data;
226 int slot = object_property_get_int(OBJECT(nvd), PC_DIMM_SLOT_PROP,
227 NULL);
228
229 if (nvdimm_slot_to_handle(slot) == handle) {
230 nvdimm = nvd;
231 break;
232 }
233 }
234
235 g_slist_free(device_list);
236 return nvdimm;
237}
238
239
240static void
241nvdimm_build_structure_spa(GArray *structures, DeviceState *dev)
242{
243 NvdimmNfitSpa *nfit_spa;
244 uint64_t addr = object_property_get_int(OBJECT(dev), PC_DIMM_ADDR_PROP,
245 NULL);
246 uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP,
247 NULL);
248 uint32_t node = object_property_get_int(OBJECT(dev), PC_DIMM_NODE_PROP,
249 NULL);
250 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
251 NULL);
252
253 nfit_spa = acpi_data_push(structures, sizeof(*nfit_spa));
254
255 nfit_spa->type = cpu_to_le16(0
256);
257 nfit_spa->length = cpu_to_le16(sizeof(*nfit_spa));
258 nfit_spa->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot));
259
260
261
262
263
264 nfit_spa->flags = cpu_to_le16(1
265
266 |
267 2
268);
269
270
271 nfit_spa->proximity_domain = cpu_to_le32(node);
272
273 memcpy(nfit_spa->type_guid, nvdimm_nfit_spa_uuid,
274 sizeof(nvdimm_nfit_spa_uuid));
275
276 nfit_spa->spa_base = cpu_to_le64(addr);
277 nfit_spa->spa_length = cpu_to_le64(size);
278
279
280 nfit_spa->mem_attr = cpu_to_le64(0x8ULL |
281 0x8000ULL );
282}
283
284
285
286
287
288static void
289nvdimm_build_structure_memdev(GArray *structures, DeviceState *dev)
290{
291 NvdimmNfitMemDev *nfit_memdev;
292 uint64_t addr = object_property_get_int(OBJECT(dev), PC_DIMM_ADDR_PROP,
293 NULL);
294 uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP,
295 NULL);
296 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
297 NULL);
298 uint32_t handle = nvdimm_slot_to_handle(slot);
299
300 nfit_memdev = acpi_data_push(structures, sizeof(*nfit_memdev));
301
302 nfit_memdev->type = cpu_to_le16(1
303);
304 nfit_memdev->length = cpu_to_le16(sizeof(*nfit_memdev));
305 nfit_memdev->nfit_handle = cpu_to_le32(handle);
306
307
308
309
310
311 nfit_memdev->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot));
312
313 nfit_memdev->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot));
314
315
316 nfit_memdev->region_len = cpu_to_le64(size);
317 nfit_memdev->region_dpa = cpu_to_le64(addr);
318
319
320 nfit_memdev->interleave_ways = cpu_to_le16(1);
321}
322
323
324
325
326static void nvdimm_build_structure_dcr(GArray *structures, DeviceState *dev)
327{
328 NvdimmNfitControlRegion *nfit_dcr;
329 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
330 NULL);
331 uint32_t sn = nvdimm_slot_to_sn(slot);
332
333 nfit_dcr = acpi_data_push(structures, sizeof(*nfit_dcr));
334
335 nfit_dcr->type = cpu_to_le16(4 );
336 nfit_dcr->length = cpu_to_le16(sizeof(*nfit_dcr));
337 nfit_dcr->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot));
338
339
340 nfit_dcr->vendor_id = cpu_to_le16(0x8086);
341 nfit_dcr->device_id = cpu_to_le16(1);
342
343
344 nfit_dcr->revision_id = cpu_to_le16(1
345);
346 nfit_dcr->serial_number = cpu_to_le32(sn);
347 nfit_dcr->fic = cpu_to_le16(0x201
348
349);
350}
351
352static GArray *nvdimm_build_device_structure(GSList *device_list)
353{
354 GArray *structures = g_array_new(false, true , 1);
355
356 for (; device_list; device_list = device_list->next) {
357 DeviceState *dev = device_list->data;
358
359
360 nvdimm_build_structure_spa(structures, dev);
361
362
363
364
365
366 nvdimm_build_structure_memdev(structures, dev);
367
368
369 nvdimm_build_structure_dcr(structures, dev);
370 }
371
372 return structures;
373}
374
375static void nvdimm_build_nfit(GSList *device_list, GArray *table_offsets,
376 GArray *table_data, BIOSLinker *linker)
377{
378 GArray *structures = nvdimm_build_device_structure(device_list);
379 unsigned int header;
380
381 acpi_add_table(table_offsets, table_data);
382
383
384 header = table_data->len;
385 acpi_data_push(table_data, sizeof(NvdimmNfitHeader));
386
387 g_array_append_vals(table_data, structures->data, structures->len);
388
389 build_header(linker, table_data,
390 (void *)(table_data->data + header), "NFIT",
391 sizeof(NvdimmNfitHeader) + structures->len, 1, NULL, NULL);
392 g_array_free(structures, true);
393}
394
395struct NvdimmDsmIn {
396 uint32_t handle;
397 uint32_t revision;
398 uint32_t function;
399
400 union {
401 uint8_t arg3[4084];
402 };
403} QEMU_PACKED;
404typedef struct NvdimmDsmIn NvdimmDsmIn;
405QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmIn) != 4096);
406
407struct NvdimmDsmOut {
408
409 uint32_t len;
410 uint8_t data[4092];
411} QEMU_PACKED;
412typedef struct NvdimmDsmOut NvdimmDsmOut;
413QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmOut) != 4096);
414
415struct NvdimmDsmFunc0Out {
416
417 uint32_t len;
418 uint32_t supported_func;
419} QEMU_PACKED;
420typedef struct NvdimmDsmFunc0Out NvdimmDsmFunc0Out;
421
422struct NvdimmDsmFuncNoPayloadOut {
423
424 uint32_t len;
425 uint32_t func_ret_status;
426} QEMU_PACKED;
427typedef struct NvdimmDsmFuncNoPayloadOut NvdimmDsmFuncNoPayloadOut;
428
429struct NvdimmFuncGetLabelSizeOut {
430
431 uint32_t len;
432 uint32_t func_ret_status;
433 uint32_t label_size;
434
435
436
437
438 uint32_t max_xfer;
439} QEMU_PACKED;
440typedef struct NvdimmFuncGetLabelSizeOut NvdimmFuncGetLabelSizeOut;
441QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelSizeOut) > 4096);
442
443struct NvdimmFuncGetLabelDataIn {
444 uint32_t offset;
445 uint32_t length;
446} QEMU_PACKED;
447typedef struct NvdimmFuncGetLabelDataIn NvdimmFuncGetLabelDataIn;
448QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataIn) +
449 offsetof(NvdimmDsmIn, arg3) > 4096);
450
451struct NvdimmFuncGetLabelDataOut {
452
453 uint32_t len;
454 uint32_t func_ret_status;
455 uint8_t out_buf[0];
456} QEMU_PACKED;
457typedef struct NvdimmFuncGetLabelDataOut NvdimmFuncGetLabelDataOut;
458QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut) > 4096);
459
460struct NvdimmFuncSetLabelDataIn {
461 uint32_t offset;
462 uint32_t length;
463 uint8_t in_buf[0];
464} QEMU_PACKED;
465typedef struct NvdimmFuncSetLabelDataIn NvdimmFuncSetLabelDataIn;
466QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncSetLabelDataIn) +
467 offsetof(NvdimmDsmIn, arg3) > 4096);
468
469static void
470nvdimm_dsm_function0(uint32_t supported_func, hwaddr dsm_mem_addr)
471{
472 NvdimmDsmFunc0Out func0 = {
473 .len = cpu_to_le32(sizeof(func0)),
474 .supported_func = cpu_to_le32(supported_func),
475 };
476 cpu_physical_memory_write(dsm_mem_addr, &func0, sizeof(func0));
477}
478
479static void
480nvdimm_dsm_no_payload(uint32_t func_ret_status, hwaddr dsm_mem_addr)
481{
482 NvdimmDsmFuncNoPayloadOut out = {
483 .len = cpu_to_le32(sizeof(out)),
484 .func_ret_status = cpu_to_le32(func_ret_status),
485 };
486 cpu_physical_memory_write(dsm_mem_addr, &out, sizeof(out));
487}
488
489static void nvdimm_dsm_root(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
490{
491
492
493
494
495 if (!in->function) {
496 nvdimm_dsm_function0(0
497, dsm_mem_addr);
498 return;
499 }
500
501
502 nvdimm_dsm_no_payload(1 , dsm_mem_addr);
503}
504
505
506
507
508
509
510static uint32_t nvdimm_get_max_xfer_label_size(void)
511{
512 uint32_t max_get_size, max_set_size, dsm_memory_size = 4096;
513
514
515
516
517
518 max_get_size = dsm_memory_size - sizeof(NvdimmFuncGetLabelDataOut);
519
520
521
522
523
524 max_set_size = dsm_memory_size - offsetof(NvdimmDsmIn, arg3) -
525 sizeof(NvdimmFuncSetLabelDataIn);
526
527 return MIN(max_get_size, max_set_size);
528}
529
530
531
532
533
534
535
536static void nvdimm_dsm_label_size(NVDIMMDevice *nvdimm, hwaddr dsm_mem_addr)
537{
538 NvdimmFuncGetLabelSizeOut label_size_out = {
539 .len = cpu_to_le32(sizeof(label_size_out)),
540 };
541 uint32_t label_size, mxfer;
542
543 label_size = nvdimm->label_size;
544 mxfer = nvdimm_get_max_xfer_label_size();
545
546 nvdimm_debug("label_size %#x, max_xfer %#x.\n", label_size, mxfer);
547
548 label_size_out.func_ret_status = cpu_to_le32(0 );
549 label_size_out.label_size = cpu_to_le32(label_size);
550 label_size_out.max_xfer = cpu_to_le32(mxfer);
551
552 cpu_physical_memory_write(dsm_mem_addr, &label_size_out,
553 sizeof(label_size_out));
554}
555
556static uint32_t nvdimm_rw_label_data_check(NVDIMMDevice *nvdimm,
557 uint32_t offset, uint32_t length)
558{
559 uint32_t ret = 3 ;
560
561 if (offset + length < offset) {
562 nvdimm_debug("offset %#x + length %#x is overflow.\n", offset,
563 length);
564 return ret;
565 }
566
567 if (nvdimm->label_size < offset + length) {
568 nvdimm_debug("position %#x is beyond label data (len = %" PRIx64 ").\n",
569 offset + length, nvdimm->label_size);
570 return ret;
571 }
572
573 if (length > nvdimm_get_max_xfer_label_size()) {
574 nvdimm_debug("length (%#x) is larger than max_xfer (%#x).\n",
575 length, nvdimm_get_max_xfer_label_size());
576 return ret;
577 }
578
579 return 0 ;
580}
581
582
583
584
585static void nvdimm_dsm_get_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
586 hwaddr dsm_mem_addr)
587{
588 NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm);
589 NvdimmFuncGetLabelDataIn *get_label_data;
590 NvdimmFuncGetLabelDataOut *get_label_data_out;
591 uint32_t status;
592 int size;
593
594 get_label_data = (NvdimmFuncGetLabelDataIn *)in->arg3;
595 le32_to_cpus(&get_label_data->offset);
596 le32_to_cpus(&get_label_data->length);
597
598 nvdimm_debug("Read Label Data: offset %#x length %#x.\n",
599 get_label_data->offset, get_label_data->length);
600
601 status = nvdimm_rw_label_data_check(nvdimm, get_label_data->offset,
602 get_label_data->length);
603 if (status != 0 ) {
604 nvdimm_dsm_no_payload(status, dsm_mem_addr);
605 return;
606 }
607
608 size = sizeof(*get_label_data_out) + get_label_data->length;
609 assert(size <= 4096);
610 get_label_data_out = g_malloc(size);
611
612 get_label_data_out->len = cpu_to_le32(size);
613 get_label_data_out->func_ret_status = cpu_to_le32(0 );
614 nvc->read_label_data(nvdimm, get_label_data_out->out_buf,
615 get_label_data->length, get_label_data->offset);
616
617 cpu_physical_memory_write(dsm_mem_addr, get_label_data_out, size);
618 g_free(get_label_data_out);
619}
620
621
622
623
624static void nvdimm_dsm_set_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
625 hwaddr dsm_mem_addr)
626{
627 NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm);
628 NvdimmFuncSetLabelDataIn *set_label_data;
629 uint32_t status;
630
631 set_label_data = (NvdimmFuncSetLabelDataIn *)in->arg3;
632
633 le32_to_cpus(&set_label_data->offset);
634 le32_to_cpus(&set_label_data->length);
635
636 nvdimm_debug("Write Label Data: offset %#x length %#x.\n",
637 set_label_data->offset, set_label_data->length);
638
639 status = nvdimm_rw_label_data_check(nvdimm, set_label_data->offset,
640 set_label_data->length);
641 if (status != 0 ) {
642 nvdimm_dsm_no_payload(status, dsm_mem_addr);
643 return;
644 }
645
646 assert(sizeof(*in) + sizeof(*set_label_data) + set_label_data->length <=
647 4096);
648
649 nvc->write_label_data(nvdimm, set_label_data->in_buf,
650 set_label_data->length, set_label_data->offset);
651 nvdimm_dsm_no_payload(0 , dsm_mem_addr);
652}
653
654static void nvdimm_dsm_device(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
655{
656 NVDIMMDevice *nvdimm = nvdimm_get_device_by_handle(in->handle);
657
658
659 if (!in->function) {
660 uint32_t supported_func = 0;
661
662 if (nvdimm && nvdimm->label_size) {
663 supported_func |= 0x1
664
665 |
666 1 << 4 |
667 1 << 5 |
668 1 << 6 ;
669 }
670 nvdimm_dsm_function0(supported_func, dsm_mem_addr);
671 return;
672 }
673
674 if (!nvdimm) {
675 nvdimm_dsm_no_payload(2 ,
676 dsm_mem_addr);
677 return;
678 }
679
680
681 switch (in->function) {
682 case 4 :
683 if (nvdimm->label_size) {
684 nvdimm_dsm_label_size(nvdimm, dsm_mem_addr);
685 return;
686 }
687 break;
688 case 5 :
689 if (nvdimm->label_size) {
690 nvdimm_dsm_get_label_data(nvdimm, in, dsm_mem_addr);
691 return;
692 }
693 break;
694 case 0x6 :
695 if (nvdimm->label_size) {
696 nvdimm_dsm_set_label_data(nvdimm, in, dsm_mem_addr);
697 return;
698 }
699 break;
700 }
701
702 nvdimm_dsm_no_payload(1 , dsm_mem_addr);
703}
704
705static uint64_t
706nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size)
707{
708 nvdimm_debug("BUG: we never read _DSM IO Port.\n");
709 return 0;
710}
711
712static void
713nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
714{
715 NvdimmDsmIn *in;
716 hwaddr dsm_mem_addr = val;
717
718 nvdimm_debug("dsm memory address %#" HWADDR_PRIx ".\n", dsm_mem_addr);
719
720
721
722
723
724
725 in = g_new(NvdimmDsmIn, 1);
726 cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in));
727
728 le32_to_cpus(&in->revision);
729 le32_to_cpus(&in->function);
730 le32_to_cpus(&in->handle);
731
732 nvdimm_debug("Revision %#x Handler %#x Function %#x.\n", in->revision,
733 in->handle, in->function);
734
735 if (in->revision != 0x1 ) {
736 nvdimm_debug("Revision %#x is not supported, expect %#x.\n",
737 in->revision, 0x1);
738 nvdimm_dsm_no_payload(1 , dsm_mem_addr);
739 goto exit;
740 }
741
742
743 if (!in->handle) {
744 nvdimm_dsm_root(in, dsm_mem_addr);
745 goto exit;
746 }
747
748 nvdimm_dsm_device(in, dsm_mem_addr);
749
750exit:
751 g_free(in);
752}
753
754static const MemoryRegionOps nvdimm_dsm_ops = {
755 .read = nvdimm_dsm_read,
756 .write = nvdimm_dsm_write,
757 .endianness = DEVICE_LITTLE_ENDIAN,
758 .valid = {
759 .min_access_size = 4,
760 .max_access_size = 4,
761 },
762};
763
764void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
765 FWCfgState *fw_cfg, Object *owner)
766{
767 memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state,
768 "nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN);
769 memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr);
770
771 state->dsm_mem = g_array_new(false, true , 1);
772 acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn));
773 fw_cfg_add_file(fw_cfg, NVDIMM_DSM_MEM_FILE, state->dsm_mem->data,
774 state->dsm_mem->len);
775}
776
777#define NVDIMM_COMMON_DSM "NCAL"
778#define NVDIMM_ACPI_MEM_ADDR "MEMA"
779
780static void nvdimm_build_common_dsm(Aml *dev)
781{
782 Aml *method, *ifctx, *function, *handle, *uuid, *dsm_mem, *result_size;
783 Aml *elsectx, *unsupport, *unpatched, *expected_uuid, *uuid_invalid;
784 Aml *pckg, *pckg_index, *pckg_buf;
785 uint8_t byte_list[1];
786
787 method = aml_method(NVDIMM_COMMON_DSM, 5, AML_SERIALIZED);
788 uuid = aml_arg(0);
789 function = aml_arg(2);
790 handle = aml_arg(4);
791 dsm_mem = aml_name(NVDIMM_ACPI_MEM_ADDR);
792
793
794
795
796
797 unpatched = aml_equal(dsm_mem, aml_int(0x0));
798
799 expected_uuid = aml_local(0);
800
801 ifctx = aml_if(aml_equal(handle, aml_int(0x0)));
802 aml_append(ifctx, aml_store(
803 aml_touuid("2F10E7A4-9E91-11E4-89D3-123B93F75CBA")
804 , expected_uuid));
805 aml_append(method, ifctx);
806 elsectx = aml_else();
807 aml_append(elsectx, aml_store(
808 aml_touuid("4309AC30-0D11-11E4-9191-0800200C9A66")
809 , expected_uuid));
810 aml_append(method, elsectx);
811
812 uuid_invalid = aml_lnot(aml_equal(uuid, expected_uuid));
813
814 unsupport = aml_if(aml_or(unpatched, uuid_invalid, NULL));
815
816
817
818
819
820 ifctx = aml_if(aml_equal(function, aml_int(0)));
821 byte_list[0] = 0 ;
822 aml_append(ifctx, aml_return(aml_buffer(1, byte_list)));
823 aml_append(unsupport, ifctx);
824
825
826 byte_list[0] = 1 ;
827 aml_append(unsupport, aml_return(aml_buffer(1, byte_list)));
828 aml_append(method, unsupport);
829
830
831
832
833
834
835 aml_append(method, aml_store(handle, aml_name("HDLE")));
836 aml_append(method, aml_store(aml_arg(1), aml_name("REVS")));
837 aml_append(method, aml_store(aml_arg(2), aml_name("FUNC")));
838
839
840
841
842
843
844
845 pckg = aml_arg(3);
846 ifctx = aml_if(aml_and(aml_equal(aml_object_type(pckg),
847 aml_int(4 )) ,
848 aml_equal(aml_sizeof(pckg), aml_int(1)) ,
849 NULL));
850
851 pckg_index = aml_local(2);
852 pckg_buf = aml_local(3);
853 aml_append(ifctx, aml_store(aml_index(pckg, aml_int(0)), pckg_index));
854 aml_append(ifctx, aml_store(aml_derefof(pckg_index), pckg_buf));
855 aml_append(ifctx, aml_store(pckg_buf, aml_name("ARG3")));
856 aml_append(method, ifctx);
857
858
859
860
861
862 aml_append(method, aml_store(dsm_mem, aml_name("NTFI")));
863
864 result_size = aml_local(1);
865 aml_append(method, aml_store(aml_name("RLEN"), result_size));
866 aml_append(method, aml_store(aml_shiftleft(result_size, aml_int(3)),
867 result_size));
868 aml_append(method, aml_create_field(aml_name("ODAT"), aml_int(0),
869 result_size, "OBUF"));
870 aml_append(method, aml_concatenate(aml_buffer(0, NULL), aml_name("OBUF"),
871 aml_arg(6)));
872 aml_append(method, aml_return(aml_arg(6)));
873 aml_append(dev, method);
874}
875
876static void nvdimm_build_device_dsm(Aml *dev, uint32_t handle)
877{
878 Aml *method;
879
880 method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
881 aml_append(method, aml_return(aml_call5(NVDIMM_COMMON_DSM, aml_arg(0),
882 aml_arg(1), aml_arg(2), aml_arg(3),
883 aml_int(handle))));
884 aml_append(dev, method);
885}
886
887static void nvdimm_build_nvdimm_devices(GSList *device_list, Aml *root_dev)
888{
889 for (; device_list; device_list = device_list->next) {
890 DeviceState *dev = device_list->data;
891 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
892 NULL);
893 uint32_t handle = nvdimm_slot_to_handle(slot);
894 Aml *nvdimm_dev;
895
896 nvdimm_dev = aml_device("NV%02X", slot);
897
898
899
900
901
902
903
904
905
906 aml_append(nvdimm_dev, aml_name_decl("_ADR", aml_int(handle)));
907
908 nvdimm_build_device_dsm(nvdimm_dev, handle);
909 aml_append(root_dev, nvdimm_dev);
910 }
911}
912
913static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets,
914 GArray *table_data, BIOSLinker *linker,
915 GArray *dsm_dma_arrea)
916{
917 Aml *ssdt, *sb_scope, *dev, *field;
918 int mem_addr_offset, nvdimm_ssdt;
919
920 acpi_add_table(table_offsets, table_data);
921
922 ssdt = init_aml_allocator();
923 acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader));
924
925 sb_scope = aml_scope("\\_SB");
926
927 dev = aml_device("NVDR");
928
929
930
931
932
933
934
935
936
937
938
939
940 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012")));
941
942
943 aml_append(dev, aml_operation_region("NPIO", AML_SYSTEM_IO,
944 aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN));
945 aml_append(dev, aml_operation_region("NRAM", AML_SYSTEM_MEMORY,
946 aml_name(NVDIMM_ACPI_MEM_ADDR), sizeof(NvdimmDsmIn)));
947
948
949
950
951
952
953
954
955
956 field = aml_field("NPIO", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
957 aml_append(field, aml_named_field("NTFI",
958 sizeof(uint32_t) * BITS_PER_BYTE));
959 aml_append(dev, field);
960
961
962
963
964
965
966
967
968
969
970
971
972 field = aml_field("NRAM", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
973 aml_append(field, aml_named_field("HDLE",
974 sizeof(typeof_field(NvdimmDsmIn, handle)) * BITS_PER_BYTE));
975 aml_append(field, aml_named_field("REVS",
976 sizeof(typeof_field(NvdimmDsmIn, revision)) * BITS_PER_BYTE));
977 aml_append(field, aml_named_field("FUNC",
978 sizeof(typeof_field(NvdimmDsmIn, function)) * BITS_PER_BYTE));
979 aml_append(field, aml_named_field("ARG3",
980 (sizeof(NvdimmDsmIn) - offsetof(NvdimmDsmIn, arg3)) * BITS_PER_BYTE));
981 aml_append(dev, field);
982
983
984
985
986
987
988
989
990
991
992 field = aml_field("NRAM", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
993 aml_append(field, aml_named_field("RLEN",
994 sizeof(typeof_field(NvdimmDsmOut, len)) * BITS_PER_BYTE));
995 aml_append(field, aml_named_field("ODAT",
996 (sizeof(NvdimmDsmOut) - offsetof(NvdimmDsmOut, data)) * BITS_PER_BYTE));
997 aml_append(dev, field);
998
999 nvdimm_build_common_dsm(dev);
1000
1001
1002 nvdimm_build_device_dsm(dev, 0);
1003
1004 nvdimm_build_nvdimm_devices(device_list, dev);
1005
1006 aml_append(sb_scope, dev);
1007 aml_append(ssdt, sb_scope);
1008
1009 nvdimm_ssdt = table_data->len;
1010
1011
1012 g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len);
1013 mem_addr_offset = build_append_named_dword(table_data,
1014 NVDIMM_ACPI_MEM_ADDR);
1015
1016 bios_linker_loader_alloc(linker,
1017 NVDIMM_DSM_MEM_FILE, dsm_dma_arrea,
1018 sizeof(NvdimmDsmIn), false );
1019 bios_linker_loader_add_pointer(linker,
1020 ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t),
1021 NVDIMM_DSM_MEM_FILE, 0);
1022 build_header(linker, table_data,
1023 (void *)(table_data->data + nvdimm_ssdt),
1024 "SSDT", table_data->len - nvdimm_ssdt, 1, NULL, "NVDIMM");
1025 free_aml_allocator();
1026}
1027
1028void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
1029 BIOSLinker *linker, GArray *dsm_dma_arrea)
1030{
1031 GSList *device_list;
1032
1033
1034 device_list = nvdimm_get_plugged_device_list();
1035 if (!device_list) {
1036 return;
1037 }
1038 nvdimm_build_nfit(device_list, table_offsets, table_data, linker);
1039 nvdimm_build_ssdt(device_list, table_offsets, table_data, linker,
1040 dsm_dma_arrea);
1041 g_slist_free(device_list);
1042}
1043