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17#ifndef VMWARE_UTILS_H
18#define VMWARE_UTILS_H
19
20#include "qemu/range.h"
21#include "vmxnet_debug.h"
22
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27
28static inline void
29vmw_shmem_read(PCIDevice *d, hwaddr addr, void *buf, int len)
30{
31 VMW_SHPRN("SHMEM r: %" PRIx64 ", len: %d to %p", addr, len, buf);
32 pci_dma_read(d, addr, buf, len);
33}
34
35static inline void
36vmw_shmem_write(PCIDevice *d, hwaddr addr, void *buf, int len)
37{
38 VMW_SHPRN("SHMEM w: %" PRIx64 ", len: %d to %p", addr, len, buf);
39 pci_dma_write(d, addr, buf, len);
40}
41
42static inline void
43vmw_shmem_rw(PCIDevice *d, hwaddr addr, void *buf, int len, int is_write)
44{
45 VMW_SHPRN("SHMEM r/w: %" PRIx64 ", len: %d (to %p), is write: %d",
46 addr, len, buf, is_write);
47
48 if (is_write)
49 pci_dma_write(d, addr, buf, len);
50 else
51 pci_dma_read(d, addr, buf, len);
52}
53
54static inline void
55vmw_shmem_set(PCIDevice *d, hwaddr addr, uint8_t val, int len)
56{
57 int i;
58 VMW_SHPRN("SHMEM set: %" PRIx64 ", len: %d (value 0x%X)", addr, len, val);
59
60 for (i = 0; i < len; i++) {
61 pci_dma_write(d, addr + i, &val, 1);
62 }
63}
64
65static inline uint32_t
66vmw_shmem_ld8(PCIDevice *d, hwaddr addr)
67{
68 uint8_t res;
69 pci_dma_read(d, addr, &res, 1);
70 VMW_SHPRN("SHMEM load8: %" PRIx64 " (value 0x%X)", addr, res);
71 return res;
72}
73
74static inline void
75vmw_shmem_st8(PCIDevice *d, hwaddr addr, uint8_t value)
76{
77 VMW_SHPRN("SHMEM store8: %" PRIx64 " (value 0x%X)", addr, value);
78 pci_dma_write(d, addr, &value, 1);
79}
80
81static inline uint32_t
82vmw_shmem_ld16(PCIDevice *d, hwaddr addr)
83{
84 uint16_t res;
85 pci_dma_read(d, addr, &res, 2);
86 VMW_SHPRN("SHMEM load16: %" PRIx64 " (value 0x%X)", addr, res);
87 return res;
88}
89
90static inline void
91vmw_shmem_st16(PCIDevice *d, hwaddr addr, uint16_t value)
92{
93 VMW_SHPRN("SHMEM store16: %" PRIx64 " (value 0x%X)", addr, value);
94 pci_dma_write(d, addr, &value, 2);
95}
96
97static inline uint32_t
98vmw_shmem_ld32(PCIDevice *d, hwaddr addr)
99{
100 uint32_t res;
101 pci_dma_read(d, addr, &res, 4);
102 VMW_SHPRN("SHMEM load32: %" PRIx64 " (value 0x%X)", addr, res);
103 return res;
104}
105
106static inline void
107vmw_shmem_st32(PCIDevice *d, hwaddr addr, uint32_t value)
108{
109 VMW_SHPRN("SHMEM store32: %" PRIx64 " (value 0x%X)", addr, value);
110 pci_dma_write(d, addr, &value, 4);
111}
112
113static inline uint64_t
114vmw_shmem_ld64(PCIDevice *d, hwaddr addr)
115{
116 uint64_t res;
117 pci_dma_read(d, addr, &res, 8);
118 VMW_SHPRN("SHMEM load64: %" PRIx64 " (value %" PRIx64 ")", addr, res);
119 return res;
120}
121
122static inline void
123vmw_shmem_st64(PCIDevice *d, hwaddr addr, uint64_t value)
124{
125 VMW_SHPRN("SHMEM store64: %" PRIx64 " (value %" PRIx64 ")", addr, value);
126 pci_dma_write(d, addr, &value, 8);
127}
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135
136#define VMW_IS_MULTIREG_ADDR(addr, base, cnt, regsize) \
137 range_covers_byte(base, cnt * regsize, addr)
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143
144#define VMW_MULTIREG_IDX_BY_ADDR(addr, base, regsize) \
145 (((addr) - (base)) / (regsize))
146
147#endif
148