LXR qemu/target-alpha/mem

   1/*
   2 *  Helpers for loads and stores
   3 *
   4 *  Copyright (c) 2007 Jocelyn Mayer
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "exec/helper-proto.h"
  23#include "exec/exec-all.h"
  24#include "exec/cpu_ldst.h"
  25
  26/* Softmmu support */
  27#ifndef CONFIG_USER_ONLY
  28
  29uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
  30{
  31    CPUState *cs = CPU(alpha_env_get_cpu(env));
  32    return (int32_t)ldl_phys(cs->as, p);
  33}
  34
  35uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
  36{
  37    CPUState *cs = CPU(alpha_env_get_cpu(env));
  38    return ldq_phys(cs->as, p);
  39}
  40
  41uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
  42{
  43    CPUState *cs = CPU(alpha_env_get_cpu(env));
  44    env->lock_addr = p;
  45    return env->lock_value = (int32_t)ldl_phys(cs->as, p);
  46}
  47
  48uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
  49{
  50    CPUState *cs = CPU(alpha_env_get_cpu(env));
  51    env->lock_addr = p;
  52    return env->lock_value = ldq_phys(cs->as, p);
  53}
  54
  55void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  56{
  57    CPUState *cs = CPU(alpha_env_get_cpu(env));
  58    stl_phys(cs->as, p, v);
  59}
  60
  61void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  62{
  63    CPUState *cs = CPU(alpha_env_get_cpu(env));
  64    stq_phys(cs->as, p, v);
  65}
  66
  67uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  68{
  69    CPUState *cs = CPU(alpha_env_get_cpu(env));
  70    uint64_t ret = 0;
  71
  72    if (p == env->lock_addr) {
  73        int32_t old = ldl_phys(cs->as, p);
  74        if (old == (int32_t)env->lock_value) {
  75            stl_phys(cs->as, p, v);
  76            ret = 1;
  77        }
  78    }
  79    env->lock_addr = -1;
  80
  81    return ret;
  82}
  83
  84uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  85{
  86    CPUState *cs = CPU(alpha_env_get_cpu(env));
  87    uint64_t ret = 0;
  88
  89    if (p == env->lock_addr) {
  90        uint64_t old = ldq_phys(cs->as, p);
  91        if (old == env->lock_value) {
  92            stq_phys(cs->as, p, v);
  93            ret = 1;
  94        }
  95    }
  96    env->lock_addr = -1;
  97
  98    return ret;
  99}
 100
 101void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
 102                                   MMUAccessType access_type,
 103                                   int mmu_idx, uintptr_t retaddr)
 104{
 105    AlphaCPU *cpu = ALPHA_CPU(cs);
 106    CPUAlphaState *env = &cpu->env;
 107    uint64_t pc;
 108    uint32_t insn;
 109
 110    if (retaddr) {
 111        cpu_restore_state(cs, retaddr);
 112    }
 113
 114    pc = env->pc;
 115    insn = cpu_ldl_code(env, pc);
 116
 117    env->trap_arg0 = addr;
 118    env->trap_arg1 = insn >> 26;                /* opcode */
 119    env->trap_arg2 = (insn >> 21) & 31;         /* dest regno */
 120    cs->exception_index = EXCP_UNALIGN;
 121    env->error_code = 0;
 122    cpu_loop_exit(cs);
 123}
 124
 125void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
 126                                 bool is_write, bool is_exec, int unused,
 127                                 unsigned size)
 128{
 129    AlphaCPU *cpu = ALPHA_CPU(cs);
 130    CPUAlphaState *env = &cpu->env;
 131
 132    env->trap_arg0 = addr;
 133    env->trap_arg1 = is_write ? 1 : 0;
 134    cs->exception_index = EXCP_MCHK;
 135    env->error_code = 0;
 136
 137    /* ??? We should cpu_restore_state to the faulting insn, but this hook
 138       does not have access to the retaddr value from the original helper.
 139       It's all moot until the QEMU PALcode grows an MCHK handler.  */
 140
 141    cpu_loop_exit(cs);
 142}
 143
 144/* try to fill the TLB and return an exception if error. If retaddr is
 145   NULL, it means that the function was called in C code (i.e. not
 146   from generated code or from helper.c) */
 147/* XXX: fix it to restore all registers */
 148void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
 149              int mmu_idx, uintptr_t retaddr)
 150{
 151    int ret;
 152
 153    ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
 154    if (unlikely(ret != 0)) {
 155        if (retaddr) {
 156            cpu_restore_state(cs, retaddr);
 157        }
 158        /* Exception index and error code are already set */
 159        cpu_loop_exit(cs);
 160    }
 161}
 162#endif /* CONFIG_USER_ONLY */
 163