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10#ifndef DMA_H
11#define DMA_H
12
13#include "exec/memory.h"
14#include "exec/address-spaces.h"
15#include "hw/hw.h"
16#include "block/block.h"
17#include "block/accounting.h"
18
19typedef struct ScatterGatherEntry ScatterGatherEntry;
20
21typedef enum {
22 DMA_DIRECTION_TO_DEVICE = 0,
23 DMA_DIRECTION_FROM_DEVICE = 1,
24} DMADirection;
25
26struct QEMUSGList {
27 ScatterGatherEntry *sg;
28 int nsg;
29 int nalloc;
30 size_t size;
31 DeviceState *dev;
32 AddressSpace *as;
33};
34
35#ifndef CONFIG_USER_ONLY
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43
44typedef uint64_t dma_addr_t;
45
46#define DMA_ADDR_BITS 64
47#define DMA_ADDR_FMT "%" PRIx64
48
49static inline void dma_barrier(AddressSpace *as, DMADirection dir)
50{
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69 smp_mb();
70}
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74
75static inline bool dma_memory_valid(AddressSpace *as,
76 dma_addr_t addr, dma_addr_t len,
77 DMADirection dir)
78{
79 return address_space_access_valid(as, addr, len,
80 dir == DMA_DIRECTION_FROM_DEVICE);
81}
82
83static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr,
84 void *buf, dma_addr_t len,
85 DMADirection dir)
86{
87 return (bool)address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
88 buf, len, dir == DMA_DIRECTION_FROM_DEVICE);
89}
90
91static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr,
92 void *buf, dma_addr_t len)
93{
94 return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
95}
96
97static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr,
98 const void *buf, dma_addr_t len)
99{
100 return dma_memory_rw_relaxed(as, addr, (void *)buf, len,
101 DMA_DIRECTION_FROM_DEVICE);
102}
103
104static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr,
105 void *buf, dma_addr_t len,
106 DMADirection dir)
107{
108 dma_barrier(as, dir);
109
110 return dma_memory_rw_relaxed(as, addr, buf, len, dir);
111}
112
113static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr,
114 void *buf, dma_addr_t len)
115{
116 return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
117}
118
119static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr,
120 const void *buf, dma_addr_t len)
121{
122 return dma_memory_rw(as, addr, (void *)buf, len,
123 DMA_DIRECTION_FROM_DEVICE);
124}
125
126int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len);
127
128static inline void *dma_memory_map(AddressSpace *as,
129 dma_addr_t addr, dma_addr_t *len,
130 DMADirection dir)
131{
132 hwaddr xlen = *len;
133 void *p;
134
135 p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE);
136 *len = xlen;
137 return p;
138}
139
140static inline void dma_memory_unmap(AddressSpace *as,
141 void *buffer, dma_addr_t len,
142 DMADirection dir, dma_addr_t access_len)
143{
144 address_space_unmap(as, buffer, (hwaddr)len,
145 dir == DMA_DIRECTION_FROM_DEVICE, access_len);
146}
147
148#define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \
149 static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *as, \
150 dma_addr_t addr) \
151 { \
152 uint##_bits##_t val; \
153 dma_memory_read(as, addr, &val, (_bits) / 8); \
154 return _end##_bits##_to_cpu(val); \
155 } \
156 static inline void st##_sname##_##_end##_dma(AddressSpace *as, \
157 dma_addr_t addr, \
158 uint##_bits##_t val) \
159 { \
160 val = cpu_to_##_end##_bits(val); \
161 dma_memory_write(as, addr, &val, (_bits) / 8); \
162 }
163
164static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr)
165{
166 uint8_t val;
167
168 dma_memory_read(as, addr, &val, 1);
169 return val;
170}
171
172static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val)
173{
174 dma_memory_write(as, addr, &val, 1);
175}
176
177DEFINE_LDST_DMA(uw, w, 16, le);
178DEFINE_LDST_DMA(l, l, 32, le);
179DEFINE_LDST_DMA(q, q, 64, le);
180DEFINE_LDST_DMA(uw, w, 16, be);
181DEFINE_LDST_DMA(l, l, 32, be);
182DEFINE_LDST_DMA(q, q, 64, be);
183
184#undef DEFINE_LDST_DMA
185
186struct ScatterGatherEntry {
187 dma_addr_t base;
188 dma_addr_t len;
189};
190
191void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
192 AddressSpace *as);
193void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len);
194void qemu_sglist_destroy(QEMUSGList *qsg);
195#endif
196
197typedef BlockAIOCB *DMAIOFunc(int64_t offset, QEMUIOVector *iov,
198 BlockCompletionFunc *cb, void *cb_opaque,
199 void *opaque);
200
201BlockAIOCB *dma_blk_io(AioContext *ctx,
202 QEMUSGList *sg, uint64_t offset, uint32_t align,
203 DMAIOFunc *io_func, void *io_func_opaque,
204 BlockCompletionFunc *cb, void *opaque, DMADirection dir);
205BlockAIOCB *dma_blk_read(BlockBackend *blk,
206 QEMUSGList *sg, uint64_t offset, uint32_t align,
207 BlockCompletionFunc *cb, void *opaque);
208BlockAIOCB *dma_blk_write(BlockBackend *blk,
209 QEMUSGList *sg, uint64_t offset, uint32_t align,
210 BlockCompletionFunc *cb, void *opaque);
211uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg);
212uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg);
213
214void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
215 QEMUSGList *sg, enum BlockAcctType type);
216
217#endif
218