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26#include "qemu/osdep.h"
27#include "qapi/error.h"
28#include "hw/hw.h"
29#include "hw/i386/pc.h"
30#include "hw/ide.h"
31#include "hw/pci/pci.h"
32#include "hw/irq.h"
33#include "hw/xen/xen_common.h"
34#include "hw/xen/xen_backend.h"
35#include "trace.h"
36#include "exec/address-spaces.h"
37#include "sysemu/block-backend.h"
38#include "qemu/error-report.h"
39
40#include <xenguest.h>
41
42
43
44#ifdef DEBUG_PLATFORM
45#define DPRINTF(fmt, ...) do { \
46 fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
47} while (0)
48#else
49#define DPRINTF(fmt, ...) do { } while (0)
50#endif
51
52#define PFFLAG_ROM_LOCK 1
53
54typedef struct PCIXenPlatformState {
55
56 PCIDevice parent_obj;
57
58
59 MemoryRegion fixed_io;
60 MemoryRegion bar;
61 MemoryRegion mmio_bar;
62 uint8_t flags;
63 int drivers_blacklisted;
64 uint16_t driver_product_version;
65
66
67 char log_buffer[4096];
68 int log_buffer_off;
69} PCIXenPlatformState;
70
71#define TYPE_XEN_PLATFORM "xen-platform"
72#define XEN_PLATFORM(obj) \
73 OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
74
75#define XEN_PLATFORM_IOPORT 0x10
76
77
78static void log_writeb(PCIXenPlatformState *s, char val)
79{
80 if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
81
82 s->log_buffer[s->log_buffer_off] = 0;
83 trace_xen_platform_log(s->log_buffer);
84 s->log_buffer_off = 0;
85 } else {
86 s->log_buffer[s->log_buffer_off++] = val;
87 }
88}
89
90
91#define UNPLUG_ALL_IDE_DISKS 1
92#define UNPLUG_ALL_NICS 2
93#define UNPLUG_AUX_IDE_DISKS 4
94
95static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
96{
97
98 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
99 PCI_CLASS_NETWORK_ETHERNET
100 && strcmp(d->name, "xen-pci-passthrough") != 0) {
101 object_unparent(OBJECT(d));
102 }
103}
104
105static void pci_unplug_nics(PCIBus *bus)
106{
107 pci_for_each_device(bus, 0, unplug_nic, NULL);
108}
109
110static void unplug_disks(PCIBus *b, PCIDevice *d, void *o)
111{
112
113 if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
114 PCI_CLASS_STORAGE_IDE
115 && strcmp(d->name, "xen-pci-passthrough") != 0) {
116 pci_piix3_xen_ide_unplug(DEVICE(d));
117 } else if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
118 PCI_CLASS_STORAGE_SCSI
119 && strcmp(d->name, "xen-pci-passthrough") != 0) {
120 object_unparent(OBJECT(d));
121 }
122}
123
124static void pci_unplug_disks(PCIBus *bus)
125{
126 pci_for_each_device(bus, 0, unplug_disks, NULL);
127}
128
129static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
130{
131 PCIXenPlatformState *s = opaque;
132
133 switch (addr) {
134 case 0: {
135 PCIDevice *pci_dev = PCI_DEVICE(s);
136
137
138
139 if (val & UNPLUG_ALL_IDE_DISKS) {
140 DPRINTF("unplug disks\n");
141 pci_unplug_disks(pci_dev->bus);
142 }
143 if (val & UNPLUG_ALL_NICS) {
144 DPRINTF("unplug nics\n");
145 pci_unplug_nics(pci_dev->bus);
146 }
147 if (val & UNPLUG_AUX_IDE_DISKS) {
148 DPRINTF("unplug auxiliary disks not supported\n");
149 }
150 break;
151 }
152 case 2:
153 switch (val) {
154 case 1:
155 DPRINTF("Citrix Windows PV drivers loaded in guest\n");
156 break;
157 case 0:
158 DPRINTF("Guest claimed to be running PV product 0?\n");
159 break;
160 default:
161 DPRINTF("Unknown PV product %d loaded in guest\n", val);
162 break;
163 }
164 s->driver_product_version = val;
165 break;
166 }
167}
168
169static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
170 uint32_t val)
171{
172 switch (addr) {
173 case 0:
174
175 break;
176 }
177}
178
179static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
180{
181 PCIXenPlatformState *s = opaque;
182
183 switch (addr) {
184 case 0: {
185 hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
186 HVMMEM_ram_ro : HVMMEM_ram_rw;
187 if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
188 DPRINTF("unable to change ro/rw state of ROM memory area!\n");
189 } else {
190 s->flags = val & PFFLAG_ROM_LOCK;
191 DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
192 (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
193 }
194 break;
195 }
196 case 2:
197 log_writeb(s, val);
198 break;
199 }
200}
201
202static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
203{
204 PCIXenPlatformState *s = opaque;
205
206 switch (addr) {
207 case 0:
208 if (s->drivers_blacklisted) {
209
210
211 return 0xd249;
212 } else {
213
214 return 0x49d2;
215 }
216 default:
217 return 0xffff;
218 }
219}
220
221static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
222{
223 PCIXenPlatformState *s = opaque;
224
225 switch (addr) {
226 case 0:
227
228 return s->flags;
229 case 2:
230
231 return 1;
232 default:
233 return 0xff;
234 }
235}
236
237static void platform_fixed_ioport_reset(void *opaque)
238{
239 PCIXenPlatformState *s = opaque;
240
241 platform_fixed_ioport_writeb(s, 0, 0);
242}
243
244static uint64_t platform_fixed_ioport_read(void *opaque,
245 hwaddr addr,
246 unsigned size)
247{
248 switch (size) {
249 case 1:
250 return platform_fixed_ioport_readb(opaque, addr);
251 case 2:
252 return platform_fixed_ioport_readw(opaque, addr);
253 default:
254 return -1;
255 }
256}
257
258static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
259
260 uint64_t val, unsigned size)
261{
262 switch (size) {
263 case 1:
264 platform_fixed_ioport_writeb(opaque, addr, val);
265 break;
266 case 2:
267 platform_fixed_ioport_writew(opaque, addr, val);
268 break;
269 case 4:
270 platform_fixed_ioport_writel(opaque, addr, val);
271 break;
272 }
273}
274
275
276static const MemoryRegionOps platform_fixed_io_ops = {
277 .read = platform_fixed_ioport_read,
278 .write = platform_fixed_ioport_write,
279 .valid = {
280 .unaligned = true,
281 },
282 .impl = {
283 .min_access_size = 1,
284 .max_access_size = 4,
285 .unaligned = true,
286 },
287 .endianness = DEVICE_LITTLE_ENDIAN,
288};
289
290static void platform_fixed_ioport_init(PCIXenPlatformState* s)
291{
292 memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
293 "xen-fixed", 16);
294 memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
295 &s->fixed_io);
296}
297
298
299
300static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
301 unsigned int size)
302{
303 if (addr == 0) {
304 return platform_fixed_ioport_readb(opaque, 0);
305 } else {
306 return ~0u;
307 }
308}
309
310static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
311 uint64_t val, unsigned int size)
312{
313 PCIXenPlatformState *s = opaque;
314 PCIDevice *pci_dev = PCI_DEVICE(s);
315
316 switch (addr) {
317 case 0:
318 platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
319 break;
320 case 4:
321 if (val == 1) {
322
323
324
325
326
327
328
329
330 pci_unplug_disks(pci_dev->bus);
331 pci_unplug_nics(pci_dev->bus);
332 }
333 break;
334 case 8:
335 switch (val) {
336 case 1:
337 pci_unplug_disks(pci_dev->bus);
338 break;
339 case 2:
340 pci_unplug_nics(pci_dev->bus);
341 break;
342 default:
343 log_writeb(s, (uint32_t)val);
344 break;
345 }
346 break;
347 default:
348 break;
349 }
350}
351
352static const MemoryRegionOps xen_pci_io_ops = {
353 .read = xen_platform_ioport_readb,
354 .write = xen_platform_ioport_writeb,
355 .impl.min_access_size = 1,
356 .impl.max_access_size = 1,
357};
358
359static void platform_ioport_bar_setup(PCIXenPlatformState *d)
360{
361 memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
362 "xen-pci", 0x100);
363}
364
365static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
366 unsigned size)
367{
368 DPRINTF("Warning: attempted read from physical address "
369 "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
370
371 return 0;
372}
373
374static void platform_mmio_write(void *opaque, hwaddr addr,
375 uint64_t val, unsigned size)
376{
377 DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
378 "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
379 val, addr);
380}
381
382static const MemoryRegionOps platform_mmio_handler = {
383 .read = &platform_mmio_read,
384 .write = &platform_mmio_write,
385 .endianness = DEVICE_NATIVE_ENDIAN,
386};
387
388static void platform_mmio_setup(PCIXenPlatformState *d)
389{
390 memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
391 "xen-mmio", 0x1000000);
392}
393
394static int xen_platform_post_load(void *opaque, int version_id)
395{
396 PCIXenPlatformState *s = opaque;
397
398 platform_fixed_ioport_writeb(s, 0, s->flags);
399
400 return 0;
401}
402
403static const VMStateDescription vmstate_xen_platform = {
404 .name = "platform",
405 .version_id = 4,
406 .minimum_version_id = 4,
407 .post_load = xen_platform_post_load,
408 .fields = (VMStateField[]) {
409 VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
410 VMSTATE_UINT8(flags, PCIXenPlatformState),
411 VMSTATE_END_OF_LIST()
412 }
413};
414
415static void xen_platform_realize(PCIDevice *dev, Error **errp)
416{
417 PCIXenPlatformState *d = XEN_PLATFORM(dev);
418 uint8_t *pci_conf;
419
420
421 if (!xen_enabled()) {
422 error_setg(errp, "xen-platform device requires the Xen accelerator");
423 return;
424 }
425
426 pci_conf = dev->config;
427
428 pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
429
430 pci_config_set_prog_interface(pci_conf, 0);
431
432 pci_conf[PCI_INTERRUPT_PIN] = 1;
433
434 platform_ioport_bar_setup(d);
435 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
436
437
438 platform_mmio_setup(d);
439 pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
440 &d->mmio_bar);
441
442 platform_fixed_ioport_init(d);
443}
444
445static void platform_reset(DeviceState *dev)
446{
447 PCIXenPlatformState *s = XEN_PLATFORM(dev);
448
449 platform_fixed_ioport_reset(s);
450}
451
452static void xen_platform_class_init(ObjectClass *klass, void *data)
453{
454 DeviceClass *dc = DEVICE_CLASS(klass);
455 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
456
457 k->realize = xen_platform_realize;
458 k->vendor_id = PCI_VENDOR_ID_XEN;
459 k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
460 k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
461 k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
462 k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
463 k->revision = 1;
464 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
465 dc->desc = "XEN platform pci device";
466 dc->reset = platform_reset;
467 dc->vmsd = &vmstate_xen_platform;
468}
469
470static const TypeInfo xen_platform_info = {
471 .name = TYPE_XEN_PLATFORM,
472 .parent = TYPE_PCI_DEVICE,
473 .instance_size = sizeof(PCIXenPlatformState),
474 .class_init = xen_platform_class_init,
475};
476
477static void xen_platform_register_types(void)
478{
479 type_register_static(&xen_platform_info);
480}
481
482type_init(xen_platform_register_types)
483