LXR qemu/tests/tcg/mips/mips64-dspr2/dps_w

   1#include "io.h"
   2
   3int main(void)
   4{
   5    long long rs, rt;
   6    long long achi, acli;
   7    long long acho, aclo;
   8    long long resh, resl;
   9
  10    rs = 0x0000000100000001;
  11    rt = 0x0000000200000002;
  12    achi = 0x1;
  13    acli = 0x8;
  14
  15    resh = 0x1;
  16    resl = 0x4;
  17
  18    asm ("mthi %2, $ac1\t\n"
  19         "mtlo %3, $ac1\t\n"
  20         "dps.w.qh $ac1, %4, %5\t\n"
  21         "mfhi %0, $ac1\t\n"
  22         "mflo %1, $ac1\t\n"
  23         : "=r"(acho), "=r"(aclo)
  24         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  25        );
  26
  27    if ((acho != resh) || (aclo != resl)) {
  28        printf("1 dps.w.qh error\n");
  29        return -1;
  30    }
  31
  32    rs = 0xaaaabbbbccccdddd;
  33    rt = 0xaaaabbbbccccdddd;
  34
  35    achi = 0x88888888;
  36    achi = 0x55555555;
  37
  38    resh = 0xfffffffff7777777;
  39    resl = 0x0a38b181;
  40
  41    asm ("mthi %2, $ac1\t\n"
  42         "mtlo %3, $ac1\t\n"
  43         "dps.w.qh $ac1, %4, %5\t\n"
  44         "mfhi %0, $ac1\t\n"
  45         "mflo %1, $ac1\t\n"
  46         : "=r"(acho), "=r"(aclo)
  47         : "r"(achi), "r"(acli), "r"(rs), "r"(rt)
  48        );
  49
  50    if ((acho != resh) || (aclo != resl)) {
  51        printf("1 dps.w.qh error\n");
  52        return -1;
  53    }
  54    return 0;
  55}
  56