qemu/hw/intc/arm_gicv3_kvm.c
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   1/*
   2 * ARM Generic Interrupt Controller using KVM in-kernel support
   3 *
   4 * Copyright (c) 2015 Samsung Electronics Co., Ltd.
   5 * Written by Pavel Fedin
   6 * Based on vGICv2 code by Peter Maydell
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation, either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License along
  19 * with this program; if not, see <http://www.gnu.org/licenses/>.
  20 */
  21
  22#include "qemu/osdep.h"
  23#include "qapi/error.h"
  24#include "hw/intc/arm_gicv3_common.h"
  25#include "hw/sysbus.h"
  26#include "sysemu/kvm.h"
  27#include "kvm_arm.h"
  28#include "vgic_common.h"
  29#include "migration/migration.h"
  30
  31#ifdef DEBUG_GICV3_KVM
  32#define DPRINTF(fmt, ...) \
  33    do { fprintf(stderr, "kvm_gicv3: " fmt, ## __VA_ARGS__); } while (0)
  34#else
  35#define DPRINTF(fmt, ...) \
  36    do { } while (0)
  37#endif
  38
  39#define TYPE_KVM_ARM_GICV3 "kvm-arm-gicv3"
  40#define KVM_ARM_GICV3(obj) \
  41     OBJECT_CHECK(GICv3State, (obj), TYPE_KVM_ARM_GICV3)
  42#define KVM_ARM_GICV3_CLASS(klass) \
  43     OBJECT_CLASS_CHECK(KVMARMGICv3Class, (klass), TYPE_KVM_ARM_GICV3)
  44#define KVM_ARM_GICV3_GET_CLASS(obj) \
  45     OBJECT_GET_CLASS(KVMARMGICv3Class, (obj), TYPE_KVM_ARM_GICV3)
  46
  47typedef struct KVMARMGICv3Class {
  48    ARMGICv3CommonClass parent_class;
  49    DeviceRealize parent_realize;
  50    void (*parent_reset)(DeviceState *dev);
  51} KVMARMGICv3Class;
  52
  53static void kvm_arm_gicv3_set_irq(void *opaque, int irq, int level)
  54{
  55    GICv3State *s = (GICv3State *)opaque;
  56
  57    kvm_arm_gic_set_irq(s->num_irq, irq, level);
  58}
  59
  60static void kvm_arm_gicv3_put(GICv3State *s)
  61{
  62    /* TODO */
  63    DPRINTF("Cannot put kernel gic state, no kernel interface\n");
  64}
  65
  66static void kvm_arm_gicv3_get(GICv3State *s)
  67{
  68    /* TODO */
  69    DPRINTF("Cannot get kernel gic state, no kernel interface\n");
  70}
  71
  72static void kvm_arm_gicv3_reset(DeviceState *dev)
  73{
  74    GICv3State *s = ARM_GICV3_COMMON(dev);
  75    KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
  76
  77    DPRINTF("Reset\n");
  78
  79    kgc->parent_reset(dev);
  80    kvm_arm_gicv3_put(s);
  81}
  82
  83static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp)
  84{
  85    GICv3State *s = KVM_ARM_GICV3(dev);
  86    KVMARMGICv3Class *kgc = KVM_ARM_GICV3_GET_CLASS(s);
  87    Error *local_err = NULL;
  88    int i;
  89
  90    DPRINTF("kvm_arm_gicv3_realize\n");
  91
  92    kgc->parent_realize(dev, &local_err);
  93    if (local_err) {
  94        error_propagate(errp, local_err);
  95        return;
  96    }
  97
  98    if (s->security_extn) {
  99        error_setg(errp, "the in-kernel VGICv3 does not implement the "
 100                   "security extensions");
 101        return;
 102    }
 103
 104    gicv3_init_irqs_and_mmio(s, kvm_arm_gicv3_set_irq, NULL);
 105
 106    /* Try to create the device via the device control API */
 107    s->dev_fd = kvm_create_device(kvm_state, KVM_DEV_TYPE_ARM_VGIC_V3, false);
 108    if (s->dev_fd < 0) {
 109        error_setg_errno(errp, -s->dev_fd, "error creating in-kernel VGIC");
 110        return;
 111    }
 112
 113    kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_NR_IRQS,
 114                      0, &s->num_irq, true);
 115
 116    /* Tell the kernel to complete VGIC initialization now */
 117    kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL,
 118                      KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true);
 119
 120    kvm_arm_register_device(&s->iomem_dist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
 121                            KVM_VGIC_V3_ADDR_TYPE_DIST, s->dev_fd);
 122    kvm_arm_register_device(&s->iomem_redist, -1, KVM_DEV_ARM_VGIC_GRP_ADDR,
 123                            KVM_VGIC_V3_ADDR_TYPE_REDIST, s->dev_fd);
 124
 125    /* Block migration of a KVM GICv3 device: the API for saving and restoring
 126     * the state in the kernel is not yet finalised in the kernel or
 127     * implemented in QEMU.
 128     */
 129    error_setg(&s->migration_blocker, "vGICv3 migration is not implemented");
 130    migrate_add_blocker(s->migration_blocker);
 131
 132    if (kvm_has_gsi_routing()) {
 133        /* set up irq routing */
 134        kvm_init_irq_routing(kvm_state);
 135        for (i = 0; i < s->num_irq - GIC_INTERNAL; ++i) {
 136            kvm_irqchip_add_irq_route(kvm_state, i, 0, i);
 137        }
 138
 139        kvm_gsi_routing_allowed = true;
 140
 141        kvm_irqchip_commit_routes(kvm_state);
 142    }
 143}
 144
 145static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data)
 146{
 147    DeviceClass *dc = DEVICE_CLASS(klass);
 148    ARMGICv3CommonClass *agcc = ARM_GICV3_COMMON_CLASS(klass);
 149    KVMARMGICv3Class *kgc = KVM_ARM_GICV3_CLASS(klass);
 150
 151    agcc->pre_save = kvm_arm_gicv3_get;
 152    agcc->post_load = kvm_arm_gicv3_put;
 153    kgc->parent_realize = dc->realize;
 154    kgc->parent_reset = dc->reset;
 155    dc->realize = kvm_arm_gicv3_realize;
 156    dc->reset = kvm_arm_gicv3_reset;
 157}
 158
 159static const TypeInfo kvm_arm_gicv3_info = {
 160    .name = TYPE_KVM_ARM_GICV3,
 161    .parent = TYPE_ARM_GICV3_COMMON,
 162    .instance_size = sizeof(GICv3State),
 163    .class_init = kvm_arm_gicv3_class_init,
 164    .class_size = sizeof(KVMARMGICv3Class),
 165};
 166
 167static void kvm_arm_gicv3_register_types(void)
 168{
 169    type_register_static(&kvm_arm_gicv3_info);
 170}
 171
 172type_init(kvm_arm_gicv3_register_types)
 173