qemu/hw/nvram/fw_cfg.c
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   1/*
   2 * QEMU Firmware configuration device emulation
   3 *
   4 * Copyright (c) 2008 Gleb Natapov
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24#include "qemu/osdep.h"
  25#include "hw/hw.h"
  26#include "sysemu/sysemu.h"
  27#include "sysemu/dma.h"
  28#include "hw/boards.h"
  29#include "hw/isa/isa.h"
  30#include "hw/nvram/fw_cfg.h"
  31#include "hw/sysbus.h"
  32#include "trace.h"
  33#include "qemu/error-report.h"
  34#include "qemu/config-file.h"
  35#include "qemu/cutils.h"
  36
  37#define FW_CFG_NAME "fw_cfg"
  38#define FW_CFG_PATH "/machine/" FW_CFG_NAME
  39
  40#define TYPE_FW_CFG     "fw_cfg"
  41#define TYPE_FW_CFG_IO  "fw_cfg_io"
  42#define TYPE_FW_CFG_MEM "fw_cfg_mem"
  43
  44#define FW_CFG(obj)     OBJECT_CHECK(FWCfgState,    (obj), TYPE_FW_CFG)
  45#define FW_CFG_IO(obj)  OBJECT_CHECK(FWCfgIoState,  (obj), TYPE_FW_CFG_IO)
  46#define FW_CFG_MEM(obj) OBJECT_CHECK(FWCfgMemState, (obj), TYPE_FW_CFG_MEM)
  47
  48/* FW_CFG_VERSION bits */
  49#define FW_CFG_VERSION      0x01
  50#define FW_CFG_VERSION_DMA  0x02
  51
  52/* FW_CFG_DMA_CONTROL bits */
  53#define FW_CFG_DMA_CTL_ERROR   0x01
  54#define FW_CFG_DMA_CTL_READ    0x02
  55#define FW_CFG_DMA_CTL_SKIP    0x04
  56#define FW_CFG_DMA_CTL_SELECT  0x08
  57
  58#define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
  59
  60typedef struct FWCfgEntry {
  61    uint32_t len;
  62    uint8_t *data;
  63    void *callback_opaque;
  64    FWCfgReadCallback read_callback;
  65} FWCfgEntry;
  66
  67struct FWCfgState {
  68    /*< private >*/
  69    SysBusDevice parent_obj;
  70    /*< public >*/
  71
  72    FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
  73    int entry_order[FW_CFG_MAX_ENTRY];
  74    FWCfgFiles *files;
  75    uint16_t cur_entry;
  76    uint32_t cur_offset;
  77    Notifier machine_ready;
  78
  79    int fw_cfg_order_override;
  80
  81    bool dma_enabled;
  82    dma_addr_t dma_addr;
  83    AddressSpace *dma_as;
  84    MemoryRegion dma_iomem;
  85};
  86
  87struct FWCfgIoState {
  88    /*< private >*/
  89    FWCfgState parent_obj;
  90    /*< public >*/
  91
  92    MemoryRegion comb_iomem;
  93    uint32_t iobase, dma_iobase;
  94};
  95
  96struct FWCfgMemState {
  97    /*< private >*/
  98    FWCfgState parent_obj;
  99    /*< public >*/
 100
 101    MemoryRegion ctl_iomem, data_iomem;
 102    uint32_t data_width;
 103    MemoryRegionOps wide_data_ops;
 104};
 105
 106#define JPG_FILE 0
 107#define BMP_FILE 1
 108
 109static char *read_splashfile(char *filename, gsize *file_sizep,
 110                             int *file_typep)
 111{
 112    GError *err = NULL;
 113    gboolean res;
 114    gchar *content;
 115    int file_type;
 116    unsigned int filehead;
 117    int bmp_bpp;
 118
 119    res = g_file_get_contents(filename, &content, file_sizep, &err);
 120    if (res == FALSE) {
 121        error_report("failed to read splash file '%s'", filename);
 122        g_error_free(err);
 123        return NULL;
 124    }
 125
 126    /* check file size */
 127    if (*file_sizep < 30) {
 128        goto error;
 129    }
 130
 131    /* check magic ID */
 132    filehead = ((content[0] & 0xff) + (content[1] << 8)) & 0xffff;
 133    if (filehead == 0xd8ff) {
 134        file_type = JPG_FILE;
 135    } else if (filehead == 0x4d42) {
 136        file_type = BMP_FILE;
 137    } else {
 138        goto error;
 139    }
 140
 141    /* check BMP bpp */
 142    if (file_type == BMP_FILE) {
 143        bmp_bpp = (content[28] + (content[29] << 8)) & 0xffff;
 144        if (bmp_bpp != 24) {
 145            goto error;
 146        }
 147    }
 148
 149    /* return values */
 150    *file_typep = file_type;
 151
 152    return content;
 153
 154error:
 155    error_report("splash file '%s' format not recognized; must be JPEG "
 156                 "or 24 bit BMP", filename);
 157    g_free(content);
 158    return NULL;
 159}
 160
 161static void fw_cfg_bootsplash(FWCfgState *s)
 162{
 163    int boot_splash_time = -1;
 164    const char *boot_splash_filename = NULL;
 165    char *p;
 166    char *filename, *file_data;
 167    gsize file_size;
 168    int file_type;
 169    const char *temp;
 170
 171    /* get user configuration */
 172    QemuOptsList *plist = qemu_find_opts("boot-opts");
 173    QemuOpts *opts = QTAILQ_FIRST(&plist->head);
 174    if (opts != NULL) {
 175        temp = qemu_opt_get(opts, "splash");
 176        if (temp != NULL) {
 177            boot_splash_filename = temp;
 178        }
 179        temp = qemu_opt_get(opts, "splash-time");
 180        if (temp != NULL) {
 181            p = (char *)temp;
 182            boot_splash_time = strtol(p, &p, 10);
 183        }
 184    }
 185
 186    /* insert splash time if user configurated */
 187    if (boot_splash_time >= 0) {
 188        /* validate the input */
 189        if (boot_splash_time > 0xffff) {
 190            error_report("splash time is big than 65535, force it to 65535.");
 191            boot_splash_time = 0xffff;
 192        }
 193        /* use little endian format */
 194        qemu_extra_params_fw[0] = (uint8_t)(boot_splash_time & 0xff);
 195        qemu_extra_params_fw[1] = (uint8_t)((boot_splash_time >> 8) & 0xff);
 196        fw_cfg_add_file(s, "etc/boot-menu-wait", qemu_extra_params_fw, 2);
 197    }
 198
 199    /* insert splash file if user configurated */
 200    if (boot_splash_filename != NULL) {
 201        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, boot_splash_filename);
 202        if (filename == NULL) {
 203            error_report("failed to find file '%s'.", boot_splash_filename);
 204            return;
 205        }
 206
 207        /* loading file data */
 208        file_data = read_splashfile(filename, &file_size, &file_type);
 209        if (file_data == NULL) {
 210            g_free(filename);
 211            return;
 212        }
 213        g_free(boot_splash_filedata);
 214        boot_splash_filedata = (uint8_t *)file_data;
 215        boot_splash_filedata_size = file_size;
 216
 217        /* insert data */
 218        if (file_type == JPG_FILE) {
 219            fw_cfg_add_file(s, "bootsplash.jpg",
 220                    boot_splash_filedata, boot_splash_filedata_size);
 221        } else {
 222            fw_cfg_add_file(s, "bootsplash.bmp",
 223                    boot_splash_filedata, boot_splash_filedata_size);
 224        }
 225        g_free(filename);
 226    }
 227}
 228
 229static void fw_cfg_reboot(FWCfgState *s)
 230{
 231    int reboot_timeout = -1;
 232    char *p;
 233    const char *temp;
 234
 235    /* get user configuration */
 236    QemuOptsList *plist = qemu_find_opts("boot-opts");
 237    QemuOpts *opts = QTAILQ_FIRST(&plist->head);
 238    if (opts != NULL) {
 239        temp = qemu_opt_get(opts, "reboot-timeout");
 240        if (temp != NULL) {
 241            p = (char *)temp;
 242            reboot_timeout = strtol(p, &p, 10);
 243        }
 244    }
 245    /* validate the input */
 246    if (reboot_timeout > 0xffff) {
 247        error_report("reboot timeout is larger than 65535, force it to 65535.");
 248        reboot_timeout = 0xffff;
 249    }
 250    fw_cfg_add_file(s, "etc/boot-fail-wait", g_memdup(&reboot_timeout, 4), 4);
 251}
 252
 253static void fw_cfg_write(FWCfgState *s, uint8_t value)
 254{
 255    /* nothing, write support removed in QEMU v2.4+ */
 256}
 257
 258static int fw_cfg_select(FWCfgState *s, uint16_t key)
 259{
 260    int arch, ret;
 261    FWCfgEntry *e;
 262
 263    s->cur_offset = 0;
 264    if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
 265        s->cur_entry = FW_CFG_INVALID;
 266        ret = 0;
 267    } else {
 268        s->cur_entry = key;
 269        ret = 1;
 270        /* entry successfully selected, now run callback if present */
 271        arch = !!(key & FW_CFG_ARCH_LOCAL);
 272        e = &s->entries[arch][key & FW_CFG_ENTRY_MASK];
 273        if (e->read_callback) {
 274            e->read_callback(e->callback_opaque);
 275        }
 276    }
 277
 278    trace_fw_cfg_select(s, key, ret);
 279    return ret;
 280}
 281
 282static uint64_t fw_cfg_data_read(void *opaque, hwaddr addr, unsigned size)
 283{
 284    FWCfgState *s = opaque;
 285    int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
 286    FWCfgEntry *e = (s->cur_entry == FW_CFG_INVALID) ? NULL :
 287                    &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
 288    uint64_t value = 0;
 289
 290    assert(size > 0 && size <= sizeof(value));
 291    if (s->cur_entry != FW_CFG_INVALID && e->data && s->cur_offset < e->len) {
 292        /* The least significant 'size' bytes of the return value are
 293         * expected to contain a string preserving portion of the item
 294         * data, padded with zeros on the right in case we run out early.
 295         * In technical terms, we're composing the host-endian representation
 296         * of the big endian interpretation of the fw_cfg string.
 297         */
 298        do {
 299            value = (value << 8) | e->data[s->cur_offset++];
 300        } while (--size && s->cur_offset < e->len);
 301        /* If size is still not zero, we *did* run out early, so continue
 302         * left-shifting, to add the appropriate number of padding zeros
 303         * on the right.
 304         */
 305        value <<= 8 * size;
 306    }
 307
 308    trace_fw_cfg_read(s, value);
 309    return value;
 310}
 311
 312static void fw_cfg_data_mem_write(void *opaque, hwaddr addr,
 313                                  uint64_t value, unsigned size)
 314{
 315    FWCfgState *s = opaque;
 316    unsigned i = size;
 317
 318    do {
 319        fw_cfg_write(s, value >> (8 * --i));
 320    } while (i);
 321}
 322
 323static void fw_cfg_dma_transfer(FWCfgState *s)
 324{
 325    dma_addr_t len;
 326    FWCfgDmaAccess dma;
 327    int arch;
 328    FWCfgEntry *e;
 329    int read;
 330    dma_addr_t dma_addr;
 331
 332    /* Reset the address before the next access */
 333    dma_addr = s->dma_addr;
 334    s->dma_addr = 0;
 335
 336    if (dma_memory_read(s->dma_as, dma_addr, &dma, sizeof(dma))) {
 337        stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
 338                   FW_CFG_DMA_CTL_ERROR);
 339        return;
 340    }
 341
 342    dma.address = be64_to_cpu(dma.address);
 343    dma.length = be32_to_cpu(dma.length);
 344    dma.control = be32_to_cpu(dma.control);
 345
 346    if (dma.control & FW_CFG_DMA_CTL_SELECT) {
 347        fw_cfg_select(s, dma.control >> 16);
 348    }
 349
 350    arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
 351    e = (s->cur_entry == FW_CFG_INVALID) ? NULL :
 352        &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
 353
 354    if (dma.control & FW_CFG_DMA_CTL_READ) {
 355        read = 1;
 356    } else if (dma.control & FW_CFG_DMA_CTL_SKIP) {
 357        read = 0;
 358    } else {
 359        dma.length = 0;
 360    }
 361
 362    dma.control = 0;
 363
 364    while (dma.length > 0 && !(dma.control & FW_CFG_DMA_CTL_ERROR)) {
 365        if (s->cur_entry == FW_CFG_INVALID || !e->data ||
 366                                s->cur_offset >= e->len) {
 367            len = dma.length;
 368
 369            /* If the access is not a read access, it will be a skip access,
 370             * tested before.
 371             */
 372            if (read) {
 373                if (dma_memory_set(s->dma_as, dma.address, 0, len)) {
 374                    dma.control |= FW_CFG_DMA_CTL_ERROR;
 375                }
 376            }
 377
 378        } else {
 379            if (dma.length <= (e->len - s->cur_offset)) {
 380                len = dma.length;
 381            } else {
 382                len = (e->len - s->cur_offset);
 383            }
 384
 385            /* If the access is not a read access, it will be a skip access,
 386             * tested before.
 387             */
 388            if (read) {
 389                if (dma_memory_write(s->dma_as, dma.address,
 390                                    &e->data[s->cur_offset], len)) {
 391                    dma.control |= FW_CFG_DMA_CTL_ERROR;
 392                }
 393            }
 394
 395            s->cur_offset += len;
 396        }
 397
 398        dma.address += len;
 399        dma.length  -= len;
 400
 401    }
 402
 403    stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
 404                dma.control);
 405
 406    trace_fw_cfg_read(s, 0);
 407}
 408
 409static uint64_t fw_cfg_dma_mem_read(void *opaque, hwaddr addr,
 410                                    unsigned size)
 411{
 412    /* Return a signature value (and handle various read sizes) */
 413    return extract64(FW_CFG_DMA_SIGNATURE, (8 - addr - size) * 8, size * 8);
 414}
 415
 416static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr,
 417                                 uint64_t value, unsigned size)
 418{
 419    FWCfgState *s = opaque;
 420
 421    if (size == 4) {
 422        if (addr == 0) {
 423            /* FWCfgDmaAccess high address */
 424            s->dma_addr = value << 32;
 425        } else if (addr == 4) {
 426            /* FWCfgDmaAccess low address */
 427            s->dma_addr |= value;
 428            fw_cfg_dma_transfer(s);
 429        }
 430    } else if (size == 8 && addr == 0) {
 431        s->dma_addr = value;
 432        fw_cfg_dma_transfer(s);
 433    }
 434}
 435
 436static bool fw_cfg_dma_mem_valid(void *opaque, hwaddr addr,
 437                                  unsigned size, bool is_write)
 438{
 439    return !is_write || ((size == 4 && (addr == 0 || addr == 4)) ||
 440                         (size == 8 && addr == 0));
 441}
 442
 443static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr,
 444                                  unsigned size, bool is_write)
 445{
 446    return addr == 0;
 447}
 448
 449static void fw_cfg_ctl_mem_write(void *opaque, hwaddr addr,
 450                                 uint64_t value, unsigned size)
 451{
 452    fw_cfg_select(opaque, (uint16_t)value);
 453}
 454
 455static bool fw_cfg_ctl_mem_valid(void *opaque, hwaddr addr,
 456                                 unsigned size, bool is_write)
 457{
 458    return is_write && size == 2;
 459}
 460
 461static void fw_cfg_comb_write(void *opaque, hwaddr addr,
 462                              uint64_t value, unsigned size)
 463{
 464    switch (size) {
 465    case 1:
 466        fw_cfg_write(opaque, (uint8_t)value);
 467        break;
 468    case 2:
 469        fw_cfg_select(opaque, (uint16_t)value);
 470        break;
 471    }
 472}
 473
 474static bool fw_cfg_comb_valid(void *opaque, hwaddr addr,
 475                                  unsigned size, bool is_write)
 476{
 477    return (size == 1) || (is_write && size == 2);
 478}
 479
 480static const MemoryRegionOps fw_cfg_ctl_mem_ops = {
 481    .write = fw_cfg_ctl_mem_write,
 482    .endianness = DEVICE_BIG_ENDIAN,
 483    .valid.accepts = fw_cfg_ctl_mem_valid,
 484};
 485
 486static const MemoryRegionOps fw_cfg_data_mem_ops = {
 487    .read = fw_cfg_data_read,
 488    .write = fw_cfg_data_mem_write,
 489    .endianness = DEVICE_BIG_ENDIAN,
 490    .valid = {
 491        .min_access_size = 1,
 492        .max_access_size = 1,
 493        .accepts = fw_cfg_data_mem_valid,
 494    },
 495};
 496
 497static const MemoryRegionOps fw_cfg_comb_mem_ops = {
 498    .read = fw_cfg_data_read,
 499    .write = fw_cfg_comb_write,
 500    .endianness = DEVICE_LITTLE_ENDIAN,
 501    .valid.accepts = fw_cfg_comb_valid,
 502};
 503
 504static const MemoryRegionOps fw_cfg_dma_mem_ops = {
 505    .read = fw_cfg_dma_mem_read,
 506    .write = fw_cfg_dma_mem_write,
 507    .endianness = DEVICE_BIG_ENDIAN,
 508    .valid.accepts = fw_cfg_dma_mem_valid,
 509    .valid.max_access_size = 8,
 510    .impl.max_access_size = 8,
 511};
 512
 513static void fw_cfg_reset(DeviceState *d)
 514{
 515    FWCfgState *s = FW_CFG(d);
 516
 517    /* we never register a read callback for FW_CFG_SIGNATURE */
 518    fw_cfg_select(s, FW_CFG_SIGNATURE);
 519}
 520
 521/* Save restore 32 bit int as uint16_t
 522   This is a Big hack, but it is how the old state did it.
 523   Or we broke compatibility in the state, or we can't use struct tm
 524 */
 525
 526static int get_uint32_as_uint16(QEMUFile *f, void *pv, size_t size)
 527{
 528    uint32_t *v = pv;
 529    *v = qemu_get_be16(f);
 530    return 0;
 531}
 532
 533static void put_unused(QEMUFile *f, void *pv, size_t size)
 534{
 535    fprintf(stderr, "uint32_as_uint16 is only used for backward compatibility.\n");
 536    fprintf(stderr, "This functions shouldn't be called.\n");
 537}
 538
 539static const VMStateInfo vmstate_hack_uint32_as_uint16 = {
 540    .name = "int32_as_uint16",
 541    .get  = get_uint32_as_uint16,
 542    .put  = put_unused,
 543};
 544
 545#define VMSTATE_UINT16_HACK(_f, _s, _t)                                    \
 546    VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
 547
 548
 549static bool is_version_1(void *opaque, int version_id)
 550{
 551    return version_id == 1;
 552}
 553
 554bool fw_cfg_dma_enabled(void *opaque)
 555{
 556    FWCfgState *s = opaque;
 557
 558    return s->dma_enabled;
 559}
 560
 561static const VMStateDescription vmstate_fw_cfg_dma = {
 562    .name = "fw_cfg/dma",
 563    .needed = fw_cfg_dma_enabled,
 564    .fields = (VMStateField[]) {
 565        VMSTATE_UINT64(dma_addr, FWCfgState),
 566        VMSTATE_END_OF_LIST()
 567    },
 568};
 569
 570static const VMStateDescription vmstate_fw_cfg = {
 571    .name = "fw_cfg",
 572    .version_id = 2,
 573    .minimum_version_id = 1,
 574    .fields = (VMStateField[]) {
 575        VMSTATE_UINT16(cur_entry, FWCfgState),
 576        VMSTATE_UINT16_HACK(cur_offset, FWCfgState, is_version_1),
 577        VMSTATE_UINT32_V(cur_offset, FWCfgState, 2),
 578        VMSTATE_END_OF_LIST()
 579    },
 580    .subsections = (const VMStateDescription*[]) {
 581        &vmstate_fw_cfg_dma,
 582        NULL,
 583    }
 584};
 585
 586static void fw_cfg_add_bytes_read_callback(FWCfgState *s, uint16_t key,
 587                                           FWCfgReadCallback callback,
 588                                           void *callback_opaque,
 589                                           void *data, size_t len)
 590{
 591    int arch = !!(key & FW_CFG_ARCH_LOCAL);
 592
 593    key &= FW_CFG_ENTRY_MASK;
 594
 595    assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX);
 596    assert(s->entries[arch][key].data == NULL); /* avoid key conflict */
 597
 598    s->entries[arch][key].data = data;
 599    s->entries[arch][key].len = (uint32_t)len;
 600    s->entries[arch][key].read_callback = callback;
 601    s->entries[arch][key].callback_opaque = callback_opaque;
 602}
 603
 604static void *fw_cfg_modify_bytes_read(FWCfgState *s, uint16_t key,
 605                                              void *data, size_t len)
 606{
 607    void *ptr;
 608    int arch = !!(key & FW_CFG_ARCH_LOCAL);
 609
 610    key &= FW_CFG_ENTRY_MASK;
 611
 612    assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX);
 613
 614    /* return the old data to the function caller, avoid memory leak */
 615    ptr = s->entries[arch][key].data;
 616    s->entries[arch][key].data = data;
 617    s->entries[arch][key].len = len;
 618    s->entries[arch][key].callback_opaque = NULL;
 619
 620    return ptr;
 621}
 622
 623void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t len)
 624{
 625    fw_cfg_add_bytes_read_callback(s, key, NULL, NULL, data, len);
 626}
 627
 628void fw_cfg_add_string(FWCfgState *s, uint16_t key, const char *value)
 629{
 630    size_t sz = strlen(value) + 1;
 631
 632    fw_cfg_add_bytes(s, key, g_memdup(value, sz), sz);
 633}
 634
 635void fw_cfg_add_i16(FWCfgState *s, uint16_t key, uint16_t value)
 636{
 637    uint16_t *copy;
 638
 639    copy = g_malloc(sizeof(value));
 640    *copy = cpu_to_le16(value);
 641    fw_cfg_add_bytes(s, key, copy, sizeof(value));
 642}
 643
 644void fw_cfg_modify_i16(FWCfgState *s, uint16_t key, uint16_t value)
 645{
 646    uint16_t *copy, *old;
 647
 648    copy = g_malloc(sizeof(value));
 649    *copy = cpu_to_le16(value);
 650    old = fw_cfg_modify_bytes_read(s, key, copy, sizeof(value));
 651    g_free(old);
 652}
 653
 654void fw_cfg_add_i32(FWCfgState *s, uint16_t key, uint32_t value)
 655{
 656    uint32_t *copy;
 657
 658    copy = g_malloc(sizeof(value));
 659    *copy = cpu_to_le32(value);
 660    fw_cfg_add_bytes(s, key, copy, sizeof(value));
 661}
 662
 663void fw_cfg_add_i64(FWCfgState *s, uint16_t key, uint64_t value)
 664{
 665    uint64_t *copy;
 666
 667    copy = g_malloc(sizeof(value));
 668    *copy = cpu_to_le64(value);
 669    fw_cfg_add_bytes(s, key, copy, sizeof(value));
 670}
 671
 672void fw_cfg_set_order_override(FWCfgState *s, int order)
 673{
 674    assert(s->fw_cfg_order_override == 0);
 675    s->fw_cfg_order_override = order;
 676}
 677
 678void fw_cfg_reset_order_override(FWCfgState *s)
 679{
 680    assert(s->fw_cfg_order_override != 0);
 681    s->fw_cfg_order_override = 0;
 682}
 683
 684/*
 685 * This is the legacy order list.  For legacy systems, files are in
 686 * the fw_cfg in the order defined below, by the "order" value.  Note
 687 * that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
 688 * specific area, but there may be more than one and they occur in the
 689 * order that the user specifies them on the command line.  Those are
 690 * handled in a special manner, using the order override above.
 691 *
 692 * For non-legacy, the files are sorted by filename to avoid this kind
 693 * of complexity in the future.
 694 *
 695 * This is only for x86, other arches don't implement versioning so
 696 * they won't set legacy mode.
 697 */
 698static struct {
 699    const char *name;
 700    int order;
 701} fw_cfg_order[] = {
 702    { "etc/boot-menu-wait", 10 },
 703    { "bootsplash.jpg", 11 },
 704    { "bootsplash.bmp", 12 },
 705    { "etc/boot-fail-wait", 15 },
 706    { "etc/smbios/smbios-tables", 20 },
 707    { "etc/smbios/smbios-anchor", 30 },
 708    { "etc/e820", 40 },
 709    { "etc/reserved-memory-end", 50 },
 710    { "genroms/kvmvapic.bin", 55 },
 711    { "genroms/linuxboot.bin", 60 },
 712    { }, /* VGA ROMs from pc_vga_init come here, 70. */
 713    { }, /* NIC option ROMs from pc_nic_init come here, 80. */
 714    { "etc/system-states", 90 },
 715    { }, /* User ROMs come here, 100. */
 716    { }, /* Device FW comes here, 110. */
 717    { "etc/extra-pci-roots", 120 },
 718    { "etc/acpi/tables", 130 },
 719    { "etc/table-loader", 140 },
 720    { "etc/tpm/log", 150 },
 721    { "etc/acpi/rsdp", 160 },
 722    { "bootorder", 170 },
 723
 724#define FW_CFG_ORDER_OVERRIDE_LAST 200
 725};
 726
 727static int get_fw_cfg_order(FWCfgState *s, const char *name)
 728{
 729    int i;
 730
 731    if (s->fw_cfg_order_override > 0) {
 732        return s->fw_cfg_order_override;
 733    }
 734
 735    for (i = 0; i < ARRAY_SIZE(fw_cfg_order); i++) {
 736        if (fw_cfg_order[i].name == NULL) {
 737            continue;
 738        }
 739
 740        if (strcmp(name, fw_cfg_order[i].name) == 0) {
 741            return fw_cfg_order[i].order;
 742        }
 743    }
 744
 745    /* Stick unknown stuff at the end. */
 746    error_report("warning: Unknown firmware file in legacy mode: %s", name);
 747    return FW_CFG_ORDER_OVERRIDE_LAST;
 748}
 749
 750void fw_cfg_add_file_callback(FWCfgState *s,  const char *filename,
 751                              FWCfgReadCallback callback, void *callback_opaque,
 752                              void *data, size_t len)
 753{
 754    int i, index, count;
 755    size_t dsize;
 756    MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
 757    int order = 0;
 758
 759    if (!s->files) {
 760        dsize = sizeof(uint32_t) + sizeof(FWCfgFile) * FW_CFG_FILE_SLOTS;
 761        s->files = g_malloc0(dsize);
 762        fw_cfg_add_bytes(s, FW_CFG_FILE_DIR, s->files, dsize);
 763    }
 764
 765    count = be32_to_cpu(s->files->count);
 766    assert(count < FW_CFG_FILE_SLOTS);
 767
 768    /* Find the insertion point. */
 769    if (mc->legacy_fw_cfg_order) {
 770        /*
 771         * Sort by order. For files with the same order, we keep them
 772         * in the sequence in which they were added.
 773         */
 774        order = get_fw_cfg_order(s, filename);
 775        for (index = count;
 776             index > 0 && order < s->entry_order[index - 1];
 777             index--);
 778    } else {
 779        /* Sort by file name. */
 780        for (index = count;
 781             index > 0 && strcmp(filename, s->files->f[index - 1].name) < 0;
 782             index--);
 783    }
 784
 785    /*
 786     * Move all the entries from the index point and after down one
 787     * to create a slot for the new entry.  Because calculations are
 788     * being done with the index, make it so that "i" is the current
 789     * index and "i - 1" is the one being copied from, thus the
 790     * unusual start and end in the for statement.
 791     */
 792    for (i = count + 1; i > index; i--) {
 793        s->files->f[i] = s->files->f[i - 1];
 794        s->files->f[i].select = cpu_to_be16(FW_CFG_FILE_FIRST + i);
 795        s->entries[0][FW_CFG_FILE_FIRST + i] =
 796            s->entries[0][FW_CFG_FILE_FIRST + i - 1];
 797        s->entry_order[i] = s->entry_order[i - 1];
 798    }
 799
 800    memset(&s->files->f[index], 0, sizeof(FWCfgFile));
 801    memset(&s->entries[0][FW_CFG_FILE_FIRST + index], 0, sizeof(FWCfgEntry));
 802
 803    pstrcpy(s->files->f[index].name, sizeof(s->files->f[index].name), filename);
 804    for (i = 0; i <= count; i++) {
 805        if (i != index &&
 806            strcmp(s->files->f[index].name, s->files->f[i].name) == 0) {
 807            error_report("duplicate fw_cfg file name: %s",
 808                         s->files->f[index].name);
 809            exit(1);
 810        }
 811    }
 812
 813    fw_cfg_add_bytes_read_callback(s, FW_CFG_FILE_FIRST + index,
 814                                   callback, callback_opaque, data, len);
 815
 816    s->files->f[index].size   = cpu_to_be32(len);
 817    s->files->f[index].select = cpu_to_be16(FW_CFG_FILE_FIRST + index);
 818    s->entry_order[index] = order;
 819    trace_fw_cfg_add_file(s, index, s->files->f[index].name, len);
 820
 821    s->files->count = cpu_to_be32(count+1);
 822}
 823
 824void fw_cfg_add_file(FWCfgState *s,  const char *filename,
 825                     void *data, size_t len)
 826{
 827    fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len);
 828}
 829
 830void *fw_cfg_modify_file(FWCfgState *s, const char *filename,
 831                        void *data, size_t len)
 832{
 833    int i, index;
 834    void *ptr = NULL;
 835
 836    assert(s->files);
 837
 838    index = be32_to_cpu(s->files->count);
 839    assert(index < FW_CFG_FILE_SLOTS);
 840
 841    for (i = 0; i < index; i++) {
 842        if (strcmp(filename, s->files->f[i].name) == 0) {
 843            ptr = fw_cfg_modify_bytes_read(s, FW_CFG_FILE_FIRST + i,
 844                                           data, len);
 845            s->files->f[i].size   = cpu_to_be32(len);
 846            return ptr;
 847        }
 848    }
 849    /* add new one */
 850    fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len);
 851    return NULL;
 852}
 853
 854static void fw_cfg_machine_reset(void *opaque)
 855{
 856    void *ptr;
 857    size_t len;
 858    FWCfgState *s = opaque;
 859    char *bootindex = get_boot_devices_list(&len, false);
 860
 861    ptr = fw_cfg_modify_file(s, "bootorder", (uint8_t *)bootindex, len);
 862    g_free(ptr);
 863}
 864
 865static void fw_cfg_machine_ready(struct Notifier *n, void *data)
 866{
 867    FWCfgState *s = container_of(n, FWCfgState, machine_ready);
 868    qemu_register_reset(fw_cfg_machine_reset, s);
 869}
 870
 871
 872
 873static void fw_cfg_init1(DeviceState *dev)
 874{
 875    FWCfgState *s = FW_CFG(dev);
 876    MachineState *machine = MACHINE(qdev_get_machine());
 877
 878    assert(!object_resolve_path(FW_CFG_PATH, NULL));
 879
 880    object_property_add_child(OBJECT(machine), FW_CFG_NAME, OBJECT(s), NULL);
 881
 882    qdev_init_nofail(dev);
 883
 884    fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (char *)"QEMU", 4);
 885    fw_cfg_add_bytes(s, FW_CFG_UUID, &qemu_uuid, 16);
 886    fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)!machine->enable_graphics);
 887    fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
 888    fw_cfg_bootsplash(s);
 889    fw_cfg_reboot(s);
 890
 891    s->machine_ready.notify = fw_cfg_machine_ready;
 892    qemu_add_machine_init_done_notifier(&s->machine_ready);
 893}
 894
 895FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
 896                                AddressSpace *dma_as)
 897{
 898    DeviceState *dev;
 899    FWCfgState *s;
 900    uint32_t version = FW_CFG_VERSION;
 901    bool dma_requested = dma_iobase && dma_as;
 902
 903    dev = qdev_create(NULL, TYPE_FW_CFG_IO);
 904    qdev_prop_set_uint32(dev, "iobase", iobase);
 905    qdev_prop_set_uint32(dev, "dma_iobase", dma_iobase);
 906    if (!dma_requested) {
 907        qdev_prop_set_bit(dev, "dma_enabled", false);
 908    }
 909
 910    fw_cfg_init1(dev);
 911    s = FW_CFG(dev);
 912
 913    if (s->dma_enabled) {
 914        /* 64 bits for the address field */
 915        s->dma_as = dma_as;
 916        s->dma_addr = 0;
 917
 918        version |= FW_CFG_VERSION_DMA;
 919    }
 920
 921    fw_cfg_add_i32(s, FW_CFG_ID, version);
 922
 923    return s;
 924}
 925
 926FWCfgState *fw_cfg_init_io(uint32_t iobase)
 927{
 928    return fw_cfg_init_io_dma(iobase, 0, NULL);
 929}
 930
 931FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
 932                                 hwaddr data_addr, uint32_t data_width,
 933                                 hwaddr dma_addr, AddressSpace *dma_as)
 934{
 935    DeviceState *dev;
 936    SysBusDevice *sbd;
 937    FWCfgState *s;
 938    uint32_t version = FW_CFG_VERSION;
 939    bool dma_requested = dma_addr && dma_as;
 940
 941    dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
 942    qdev_prop_set_uint32(dev, "data_width", data_width);
 943    if (!dma_requested) {
 944        qdev_prop_set_bit(dev, "dma_enabled", false);
 945    }
 946
 947    fw_cfg_init1(dev);
 948
 949    sbd = SYS_BUS_DEVICE(dev);
 950    sysbus_mmio_map(sbd, 0, ctl_addr);
 951    sysbus_mmio_map(sbd, 1, data_addr);
 952
 953    s = FW_CFG(dev);
 954
 955    if (s->dma_enabled) {
 956        s->dma_as = dma_as;
 957        s->dma_addr = 0;
 958        sysbus_mmio_map(sbd, 2, dma_addr);
 959        version |= FW_CFG_VERSION_DMA;
 960    }
 961
 962    fw_cfg_add_i32(s, FW_CFG_ID, version);
 963
 964    return s;
 965}
 966
 967FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr)
 968{
 969    return fw_cfg_init_mem_wide(ctl_addr, data_addr,
 970                                fw_cfg_data_mem_ops.valid.max_access_size,
 971                                0, NULL);
 972}
 973
 974
 975FWCfgState *fw_cfg_find(void)
 976{
 977    return FW_CFG(object_resolve_path(FW_CFG_PATH, NULL));
 978}
 979
 980static void fw_cfg_class_init(ObjectClass *klass, void *data)
 981{
 982    DeviceClass *dc = DEVICE_CLASS(klass);
 983
 984    dc->reset = fw_cfg_reset;
 985    dc->vmsd = &vmstate_fw_cfg;
 986}
 987
 988static const TypeInfo fw_cfg_info = {
 989    .name          = TYPE_FW_CFG,
 990    .parent        = TYPE_SYS_BUS_DEVICE,
 991    .abstract      = true,
 992    .instance_size = sizeof(FWCfgState),
 993    .class_init    = fw_cfg_class_init,
 994};
 995
 996
 997static Property fw_cfg_io_properties[] = {
 998    DEFINE_PROP_UINT32("iobase", FWCfgIoState, iobase, -1),
 999    DEFINE_PROP_UINT32("dma_iobase", FWCfgIoState, dma_iobase, -1),
1000    DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState, parent_obj.dma_enabled,
1001                     true),
1002    DEFINE_PROP_END_OF_LIST(),
1003};
1004
1005static void fw_cfg_io_realize(DeviceState *dev, Error **errp)
1006{
1007    FWCfgIoState *s = FW_CFG_IO(dev);
1008    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
1009
1010    /* when using port i/o, the 8-bit data register ALWAYS overlaps
1011     * with half of the 16-bit control register. Hence, the total size
1012     * of the i/o region used is FW_CFG_CTL_SIZE */
1013    memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops,
1014                          FW_CFG(s), "fwcfg", FW_CFG_CTL_SIZE);
1015    sysbus_add_io(sbd, s->iobase, &s->comb_iomem);
1016
1017    if (FW_CFG(s)->dma_enabled) {
1018        memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s),
1019                              &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma",
1020                              sizeof(dma_addr_t));
1021        sysbus_add_io(sbd, s->dma_iobase, &FW_CFG(s)->dma_iomem);
1022    }
1023}
1024
1025static void fw_cfg_io_class_init(ObjectClass *klass, void *data)
1026{
1027    DeviceClass *dc = DEVICE_CLASS(klass);
1028
1029    dc->realize = fw_cfg_io_realize;
1030    dc->props = fw_cfg_io_properties;
1031}
1032
1033static const TypeInfo fw_cfg_io_info = {
1034    .name          = TYPE_FW_CFG_IO,
1035    .parent        = TYPE_FW_CFG,
1036    .instance_size = sizeof(FWCfgIoState),
1037    .class_init    = fw_cfg_io_class_init,
1038};
1039
1040
1041static Property fw_cfg_mem_properties[] = {
1042    DEFINE_PROP_UINT32("data_width", FWCfgMemState, data_width, -1),
1043    DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState, parent_obj.dma_enabled,
1044                     true),
1045    DEFINE_PROP_END_OF_LIST(),
1046};
1047
1048static void fw_cfg_mem_realize(DeviceState *dev, Error **errp)
1049{
1050    FWCfgMemState *s = FW_CFG_MEM(dev);
1051    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
1052    const MemoryRegionOps *data_ops = &fw_cfg_data_mem_ops;
1053
1054    memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops,
1055                          FW_CFG(s), "fwcfg.ctl", FW_CFG_CTL_SIZE);
1056    sysbus_init_mmio(sbd, &s->ctl_iomem);
1057
1058    if (s->data_width > data_ops->valid.max_access_size) {
1059        /* memberwise copy because the "old_mmio" member is const */
1060        s->wide_data_ops.read       = data_ops->read;
1061        s->wide_data_ops.write      = data_ops->write;
1062        s->wide_data_ops.endianness = data_ops->endianness;
1063        s->wide_data_ops.valid      = data_ops->valid;
1064        s->wide_data_ops.impl       = data_ops->impl;
1065
1066        s->wide_data_ops.valid.max_access_size = s->data_width;
1067        s->wide_data_ops.impl.max_access_size  = s->data_width;
1068        data_ops = &s->wide_data_ops;
1069    }
1070    memory_region_init_io(&s->data_iomem, OBJECT(s), data_ops, FW_CFG(s),
1071                          "fwcfg.data", data_ops->valid.max_access_size);
1072    sysbus_init_mmio(sbd, &s->data_iomem);
1073
1074    if (FW_CFG(s)->dma_enabled) {
1075        memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s),
1076                              &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma",
1077                              sizeof(dma_addr_t));
1078        sysbus_init_mmio(sbd, &FW_CFG(s)->dma_iomem);
1079    }
1080}
1081
1082static void fw_cfg_mem_class_init(ObjectClass *klass, void *data)
1083{
1084    DeviceClass *dc = DEVICE_CLASS(klass);
1085
1086    dc->realize = fw_cfg_mem_realize;
1087    dc->props = fw_cfg_mem_properties;
1088}
1089
1090static const TypeInfo fw_cfg_mem_info = {
1091    .name          = TYPE_FW_CFG_MEM,
1092    .parent        = TYPE_FW_CFG,
1093    .instance_size = sizeof(FWCfgMemState),
1094    .class_init    = fw_cfg_mem_class_init,
1095};
1096
1097
1098static void fw_cfg_register_types(void)
1099{
1100    type_register_static(&fw_cfg_info);
1101    type_register_static(&fw_cfg_io_info);
1102    type_register_static(&fw_cfg_mem_info);
1103}
1104
1105type_init(fw_cfg_register_types)
1106