qemu/hw/ppc/spapr_cpu_core.c
<<
>>
Prefs
   1/*
   2 * sPAPR CPU core device, acts as container of CPU thread devices.
   3 *
   4 * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
   5 *
   6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7 * See the COPYING file in the top-level directory.
   8 */
   9#include "hw/cpu/core.h"
  10#include "hw/ppc/spapr_cpu_core.h"
  11#include "target-ppc/cpu.h"
  12#include "hw/ppc/spapr.h"
  13#include "hw/boards.h"
  14#include "qapi/error.h"
  15#include "sysemu/cpus.h"
  16#include "target-ppc/kvm_ppc.h"
  17#include "hw/ppc/ppc.h"
  18#include "target-ppc/mmu-hash64.h"
  19#include "sysemu/numa.h"
  20
  21static void spapr_cpu_reset(void *opaque)
  22{
  23    sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  24    PowerPCCPU *cpu = opaque;
  25    CPUState *cs = CPU(cpu);
  26    CPUPPCState *env = &cpu->env;
  27
  28    cpu_reset(cs);
  29
  30    /* All CPUs start halted.  CPU0 is unhalted from the machine level
  31     * reset code and the rest are explicitly started up by the guest
  32     * using an RTAS call */
  33    cs->halted = 1;
  34
  35    env->spr[SPR_HIOR] = 0;
  36
  37    ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
  38                                &error_fatal);
  39}
  40
  41static void spapr_cpu_destroy(PowerPCCPU *cpu)
  42{
  43    sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  44
  45    xics_cpu_destroy(spapr->xics, cpu);
  46    qemu_unregister_reset(spapr_cpu_reset, cpu);
  47}
  48
  49void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
  50{
  51    CPUPPCState *env = &cpu->env;
  52    CPUState *cs = CPU(cpu);
  53    int i;
  54
  55    /* Set time-base frequency to 512 MHz */
  56    cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
  57
  58    /* Enable PAPR mode in TCG or KVM */
  59    cpu_ppc_set_papr(cpu);
  60
  61    if (cpu->max_compat) {
  62        Error *local_err = NULL;
  63
  64        ppc_set_compat(cpu, cpu->max_compat, &local_err);
  65        if (local_err) {
  66            error_propagate(errp, local_err);
  67            return;
  68        }
  69    }
  70
  71    /* Set NUMA node for the added CPUs  */
  72    i = numa_get_node_for_cpu(cs->cpu_index);
  73    if (i < nb_numa_nodes) {
  74            cs->numa_node = i;
  75    }
  76
  77    xics_cpu_setup(spapr->xics, cpu);
  78
  79    qemu_register_reset(spapr_cpu_reset, cpu);
  80    spapr_cpu_reset(cpu);
  81}
  82
  83/*
  84 * Return the sPAPR CPU core type for @model which essentially is the CPU
  85 * model specified with -cpu cmdline option.
  86 */
  87char *spapr_get_cpu_core_type(const char *model)
  88{
  89    char *core_type;
  90    gchar **model_pieces = g_strsplit(model, ",", 2);
  91
  92    core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE);
  93
  94    /* Check whether it exists or whether we have to look up an alias name */
  95    if (!object_class_by_name(core_type)) {
  96        const char *realmodel;
  97
  98        g_free(core_type);
  99        core_type = NULL;
 100        realmodel = ppc_cpu_lookup_alias(model_pieces[0]);
 101        if (realmodel) {
 102            core_type = spapr_get_cpu_core_type(realmodel);
 103        }
 104    }
 105
 106    g_strfreev(model_pieces);
 107    return core_type;
 108}
 109
 110static void spapr_core_release(DeviceState *dev, void *opaque)
 111{
 112    sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 113    sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
 114    const char *typename = object_class_get_name(scc->cpu_class);
 115    size_t size = object_type_get_instance_size(typename);
 116    sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 117    CPUCore *cc = CPU_CORE(dev);
 118    int i;
 119
 120    for (i = 0; i < cc->nr_threads; i++) {
 121        void *obj = sc->threads + i * size;
 122        DeviceState *dev = DEVICE(obj);
 123        CPUState *cs = CPU(dev);
 124        PowerPCCPU *cpu = POWERPC_CPU(cs);
 125
 126        spapr_cpu_destroy(cpu);
 127        cpu_remove_sync(cs);
 128        object_unparent(obj);
 129    }
 130
 131    spapr->cores[cc->core_id / smp_threads] = NULL;
 132
 133    g_free(sc->threads);
 134    object_unparent(OBJECT(dev));
 135}
 136
 137void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
 138                       Error **errp)
 139{
 140    CPUCore *cc = CPU_CORE(dev);
 141    int smt = kvmppc_smt_threads();
 142    int index = cc->core_id / smp_threads;
 143    sPAPRDRConnector *drc =
 144        spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
 145    sPAPRDRConnectorClass *drck;
 146    Error *local_err = NULL;
 147
 148    if (index == 0) {
 149        error_setg(errp, "Boot CPU core may not be unplugged");
 150        return;
 151    }
 152
 153    g_assert(drc);
 154
 155    drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
 156    drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
 157    if (local_err) {
 158        error_propagate(errp, local_err);
 159        return;
 160    }
 161
 162    spapr_hotplug_req_remove_by_index(drc);
 163}
 164
 165void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 166                     Error **errp)
 167{
 168    sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 169    sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
 170    CPUCore *cc = CPU_CORE(dev);
 171    CPUState *cs = CPU(core->threads);
 172    sPAPRDRConnector *drc;
 173    sPAPRDRConnectorClass *drck;
 174    Error *local_err = NULL;
 175    void *fdt = NULL;
 176    int fdt_offset = 0;
 177    int index = cc->core_id / smp_threads;
 178    int smt = kvmppc_smt_threads();
 179
 180    drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
 181    spapr->cores[index] = OBJECT(dev);
 182
 183    g_assert(drc);
 184
 185    /*
 186     * Setup CPU DT entries only for hotplugged CPUs. For boot time or
 187     * coldplugged CPUs DT entries are setup in spapr_build_fdt().
 188     */
 189    if (dev->hotplugged) {
 190        fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
 191    }
 192
 193    drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
 194    drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
 195    if (local_err) {
 196        g_free(fdt);
 197        spapr->cores[index] = NULL;
 198        error_propagate(errp, local_err);
 199        return;
 200    }
 201
 202    if (dev->hotplugged) {
 203        /*
 204         * Send hotplug notification interrupt to the guest only in case
 205         * of hotplugged CPUs.
 206         */
 207        spapr_hotplug_req_add_by_index(drc);
 208    } else {
 209        /*
 210         * Set the right DRC states for cold plugged CPU.
 211         */
 212        drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
 213        drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
 214    }
 215}
 216
 217void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 218                         Error **errp)
 219{
 220    MachineState *machine = MACHINE(OBJECT(hotplug_dev));
 221    MachineClass *mc = MACHINE_GET_CLASS(hotplug_dev);
 222    sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 223    int spapr_max_cores = max_cpus / smp_threads;
 224    int index;
 225    Error *local_err = NULL;
 226    CPUCore *cc = CPU_CORE(dev);
 227    char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
 228    const char *type = object_get_typename(OBJECT(dev));
 229
 230    if (!mc->query_hotpluggable_cpus) {
 231        error_setg(&local_err, "CPU hotplug not supported for this machine");
 232        goto out;
 233    }
 234
 235    if (strcmp(base_core_type, type)) {
 236        error_setg(&local_err, "CPU core type should be %s", base_core_type);
 237        goto out;
 238    }
 239
 240    if (cc->nr_threads != smp_threads) {
 241        error_setg(&local_err, "threads must be %d", smp_threads);
 242        goto out;
 243    }
 244
 245    if (cc->core_id % smp_threads) {
 246        error_setg(&local_err, "invalid core id %d", cc->core_id);
 247        goto out;
 248    }
 249
 250    index = cc->core_id / smp_threads;
 251    if (index < 0 || index >= spapr_max_cores) {
 252        error_setg(&local_err, "core id %d out of range", cc->core_id);
 253        goto out;
 254    }
 255
 256    if (spapr->cores[index]) {
 257        error_setg(&local_err, "core %d already populated", cc->core_id);
 258        goto out;
 259    }
 260
 261out:
 262    g_free(base_core_type);
 263    error_propagate(errp, local_err);
 264}
 265
 266static void spapr_cpu_core_realize_child(Object *child, Error **errp)
 267{
 268    Error *local_err = NULL;
 269    sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 270    CPUState *cs = CPU(child);
 271    PowerPCCPU *cpu = POWERPC_CPU(cs);
 272
 273    object_property_set_bool(child, true, "realized", &local_err);
 274    if (local_err) {
 275        error_propagate(errp, local_err);
 276        return;
 277    }
 278
 279    spapr_cpu_init(spapr, cpu, &local_err);
 280    if (local_err) {
 281        error_propagate(errp, local_err);
 282        return;
 283    }
 284}
 285
 286static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
 287{
 288    sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 289    sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev));
 290    CPUCore *cc = CPU_CORE(OBJECT(dev));
 291    const char *typename = object_class_get_name(scc->cpu_class);
 292    size_t size = object_type_get_instance_size(typename);
 293    Error *local_err = NULL;
 294    void *obj;
 295    int i, j;
 296
 297    sc->threads = g_malloc0(size * cc->nr_threads);
 298    for (i = 0; i < cc->nr_threads; i++) {
 299        char id[32];
 300        CPUState *cs;
 301
 302        obj = sc->threads + i * size;
 303
 304        object_initialize(obj, size, typename);
 305        cs = CPU(obj);
 306        cs->cpu_index = cc->core_id + i;
 307        snprintf(id, sizeof(id), "thread[%d]", i);
 308        object_property_add_child(OBJECT(sc), id, obj, &local_err);
 309        if (local_err) {
 310            goto err;
 311        }
 312        object_unref(obj);
 313    }
 314
 315    for (j = 0; j < cc->nr_threads; j++) {
 316        obj = sc->threads + j * size;
 317
 318        spapr_cpu_core_realize_child(obj, &local_err);
 319        if (local_err) {
 320            goto err;
 321        }
 322    }
 323    return;
 324
 325err:
 326    while (--i >= 0) {
 327        obj = sc->threads + i * size;
 328        object_unparent(obj);
 329    }
 330    g_free(sc->threads);
 331    error_propagate(errp, local_err);
 332}
 333
 334static const char *spapr_core_models[] = {
 335    /* 970 */
 336    "970_v2.2",
 337
 338    /* 970MP variants */
 339    "970MP_v1.0",
 340    "970mp_v1.0",
 341    "970MP_v1.1",
 342    "970mp_v1.1",
 343
 344    /* POWER5+ */
 345    "POWER5+_v2.1",
 346
 347    /* POWER7 */
 348    "POWER7_v2.3",
 349
 350    /* POWER7+ */
 351    "POWER7+_v2.1",
 352
 353    /* POWER8 */
 354    "POWER8_v2.0",
 355
 356    /* POWER8E */
 357    "POWER8E_v2.1",
 358
 359    /* POWER8NVL */
 360    "POWER8NVL_v1.0",
 361};
 362
 363void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
 364{
 365    DeviceClass *dc = DEVICE_CLASS(oc);
 366    sPAPRCPUCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
 367
 368    dc->realize = spapr_cpu_core_realize;
 369    scc->cpu_class = cpu_class_by_name(TYPE_POWERPC_CPU, data);
 370    g_assert(scc->cpu_class);
 371}
 372
 373static const TypeInfo spapr_cpu_core_type_info = {
 374    .name = TYPE_SPAPR_CPU_CORE,
 375    .parent = TYPE_CPU_CORE,
 376    .abstract = true,
 377    .instance_size = sizeof(sPAPRCPUCore),
 378    .class_size = sizeof(sPAPRCPUCoreClass),
 379};
 380
 381static void spapr_cpu_core_register_types(void)
 382{
 383    int i;
 384
 385    type_register_static(&spapr_cpu_core_type_info);
 386
 387    for (i = 0; i < ARRAY_SIZE(spapr_core_models); i++) {
 388        TypeInfo type_info = {
 389            .parent = TYPE_SPAPR_CPU_CORE,
 390            .instance_size = sizeof(sPAPRCPUCore),
 391            .class_init = spapr_cpu_core_class_init,
 392            .class_data = (void *) spapr_core_models[i],
 393        };
 394
 395        type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE,
 396                                         spapr_core_models[i]);
 397        type_register(&type_info);
 398        g_free((void *)type_info.name);
 399    }
 400}
 401
 402type_init(spapr_cpu_core_register_types)
 403