LXR qemu/include/hw/i386/x86-iommu.h

   1/*
   2 * Common IOMMU interface for X86 platform
   3 *
   4 * Copyright (C) 2016 Peter Xu, Red Hat <peterx@redhat.com>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15
  16 * You should have received a copy of the GNU General Public License along
  17 * with this program; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#ifndef IOMMU_COMMON_H
  21#define IOMMU_COMMON_H
  22
  23#include "hw/sysbus.h"
  24#include "hw/pci/pci.h"
  25
  26#define  TYPE_X86_IOMMU_DEVICE  ("x86-iommu")
  27#define  X86_IOMMU_DEVICE(obj) \
  28    OBJECT_CHECK(X86IOMMUState, (obj), TYPE_X86_IOMMU_DEVICE)
  29#define  X86_IOMMU_CLASS(klass) \
  30    OBJECT_CLASS_CHECK(X86IOMMUClass, (klass), TYPE_X86_IOMMU_DEVICE)
  31#define  X86_IOMMU_GET_CLASS(obj) \
  32    OBJECT_GET_CLASS(X86IOMMUClass, obj, TYPE_X86_IOMMU_DEVICE)
  33
  34#define X86_IOMMU_PCI_DEVFN_MAX           256
  35#define X86_IOMMU_SID_INVALID             (0xffff)
  36
  37typedef struct X86IOMMUState X86IOMMUState;
  38typedef struct X86IOMMUClass X86IOMMUClass;
  39
  40typedef enum IommuType {
  41    TYPE_INTEL,
  42    TYPE_AMD,
  43    TYPE_NONE
  44} IommuType;
  45
  46struct X86IOMMUClass {
  47    SysBusDeviceClass parent;
  48    /* Intel/AMD specific realize() hook */
  49    DeviceRealize realize;
  50    /* MSI-based interrupt remapping */
  51    int (*int_remap)(X86IOMMUState *iommu, MSIMessage *src,
  52                     MSIMessage *dst, uint16_t sid);
  53};
  54
  55/**
  56 * iec_notify_fn - IEC (Interrupt Entry Cache) notifier hook,
  57 *                 triggered when IR invalidation happens.
  58 * @private: private data
  59 * @global: whether this is a global IEC invalidation
  60 * @index: IRTE index to invalidate (start from)
  61 * @mask: invalidation mask
  62 */
  63typedef void (*iec_notify_fn)(void *private, bool global,
  64                              uint32_t index, uint32_t mask);
  65
  66struct IEC_Notifier {
  67    iec_notify_fn iec_notify;
  68    void *private;
  69    QLIST_ENTRY(IEC_Notifier) list;
  70};
  71typedef struct IEC_Notifier IEC_Notifier;
  72
  73struct X86IOMMUState {
  74    SysBusDevice busdev;
  75    bool intr_supported;        /* Whether vIOMMU supports IR */
  76    IommuType type;             /* IOMMU type - AMD/Intel     */
  77    QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */
  78};
  79
  80/**
  81 * x86_iommu_get_default - get default IOMMU device
  82 * @return: pointer to default IOMMU device
  83 */
  84X86IOMMUState *x86_iommu_get_default(void);
  85
  86/*
  87 * x86_iommu_get_type - get IOMMU type
  88 */
  89IommuType x86_iommu_get_type(void);
  90
  91/**
  92 * x86_iommu_iec_register_notifier - register IEC (Interrupt Entry
  93 *                                   Cache) notifiers
  94 * @iommu: IOMMU device to register
  95 * @fn: IEC notifier hook function
  96 * @data: notifier private data
  97 */
  98void x86_iommu_iec_register_notifier(X86IOMMUState *iommu,
  99                                     iec_notify_fn fn, void *data);
 100
 101/**
 102 * x86_iommu_iec_notify_all - Notify IEC invalidations
 103 * @iommu: IOMMU device that sends the notification
 104 * @global: whether this is a global invalidation. If true, @index
 105 *          and @mask are undefined.
 106 * @index: starting index of interrupt entry to invalidate
 107 * @mask: index mask for the invalidation
 108 */
 109void x86_iommu_iec_notify_all(X86IOMMUState *iommu, bool global,
 110                              uint32_t index, uint32_t mask);
 111
 112#endif
 113