1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19#include "qemu/osdep.h"
20#include "qemu-version.h"
21#include <sys/syscall.h>
22#include <sys/resource.h>
23
24#include "qapi/error.h"
25#include "qemu.h"
26#include "qemu/path.h"
27#include "qemu/config-file.h"
28#include "qemu/cutils.h"
29#include "qemu/help_option.h"
30#include "cpu.h"
31#include "exec/exec-all.h"
32#include "tcg.h"
33#include "qemu/timer.h"
34#include "qemu/envlist.h"
35#include "elf.h"
36#include "exec/log.h"
37#include "trace/control.h"
38#include "glib-compat.h"
39
40char *exec_path;
41
42int singlestep;
43static const char *filename;
44static const char *argv0;
45static int gdbstub_port;
46static envlist_t *envlist;
47static const char *cpu_model;
48unsigned long mmap_min_addr;
49unsigned long guest_base;
50int have_guest_base;
51
52#define EXCP_DUMP(env, fmt, ...) \
53do { \
54 CPUState *cs = ENV_GET_CPU(env); \
55 fprintf(stderr, fmt , ## __VA_ARGS__); \
56 cpu_dump_state(cs, stderr, fprintf, 0); \
57 if (qemu_log_separate()) { \
58 qemu_log(fmt, ## __VA_ARGS__); \
59 log_cpu_state(cs, 0); \
60 } \
61} while (0)
62
63#if (TARGET_LONG_BITS == 32) && (HOST_LONG_BITS == 64)
64
65
66
67
68
69
70
71# ifdef TARGET_MIPS
72
73unsigned long reserved_va = 0x77000000;
74# else
75unsigned long reserved_va = 0xf7000000;
76# endif
77#else
78unsigned long reserved_va;
79#endif
80
81static void usage(int exitcode);
82
83static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
84const char *qemu_uname_release;
85
86
87
88
89unsigned long guest_stack_size = 8 * 1024 * 1024UL;
90
91void gemu_log(const char *fmt, ...)
92{
93 va_list ap;
94
95 va_start(ap, fmt);
96 vfprintf(stderr, fmt, ap);
97 va_end(ap);
98}
99
100#if defined(TARGET_I386)
101int cpu_get_pic_interrupt(CPUX86State *env)
102{
103 return -1;
104}
105#endif
106
107
108
109
110
111void fork_start(void)
112{
113 cpu_list_lock();
114 qemu_mutex_lock(&tcg_ctx.tb_ctx.tb_lock);
115 mmap_fork_start();
116}
117
118void fork_end(int child)
119{
120 mmap_fork_end(child);
121 if (child) {
122 CPUState *cpu, *next_cpu;
123
124
125 CPU_FOREACH_SAFE(cpu, next_cpu) {
126 if (cpu != thread_cpu) {
127 QTAILQ_REMOVE(&cpus, cpu, node);
128 }
129 }
130 qemu_mutex_init(&tcg_ctx.tb_ctx.tb_lock);
131 qemu_init_cpu_list();
132 gdbserver_fork(thread_cpu);
133 } else {
134 qemu_mutex_unlock(&tcg_ctx.tb_ctx.tb_lock);
135 cpu_list_unlock();
136 }
137}
138
139#ifdef TARGET_I386
140
141
142
143uint64_t cpu_get_tsc(CPUX86State *env)
144{
145 return cpu_get_host_ticks();
146}
147
148static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
149 int flags)
150{
151 unsigned int e1, e2;
152 uint32_t *p;
153 e1 = (addr << 16) | (limit & 0xffff);
154 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
155 e2 |= flags;
156 p = ptr;
157 p[0] = tswap32(e1);
158 p[1] = tswap32(e2);
159}
160
161static uint64_t *idt_table;
162#ifdef TARGET_X86_64
163static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
164 uint64_t addr, unsigned int sel)
165{
166 uint32_t *p, e1, e2;
167 e1 = (addr & 0xffff) | (sel << 16);
168 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
169 p = ptr;
170 p[0] = tswap32(e1);
171 p[1] = tswap32(e2);
172 p[2] = tswap32(addr >> 32);
173 p[3] = 0;
174}
175
176static void set_idt(int n, unsigned int dpl)
177{
178 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
179}
180#else
181static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
182 uint32_t addr, unsigned int sel)
183{
184 uint32_t *p, e1, e2;
185 e1 = (addr & 0xffff) | (sel << 16);
186 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
187 p = ptr;
188 p[0] = tswap32(e1);
189 p[1] = tswap32(e2);
190}
191
192
193static void set_idt(int n, unsigned int dpl)
194{
195 set_gate(idt_table + n, 0, dpl, 0, 0);
196}
197#endif
198
199void cpu_loop(CPUX86State *env)
200{
201 CPUState *cs = CPU(x86_env_get_cpu(env));
202 int trapnr;
203 abi_ulong pc;
204 abi_ulong ret;
205 target_siginfo_t info;
206
207 for(;;) {
208 cpu_exec_start(cs);
209 trapnr = cpu_exec(cs);
210 cpu_exec_end(cs);
211 process_queued_cpu_work(cs);
212
213 switch(trapnr) {
214 case 0x80:
215
216 ret = do_syscall(env,
217 env->regs[R_EAX],
218 env->regs[R_EBX],
219 env->regs[R_ECX],
220 env->regs[R_EDX],
221 env->regs[R_ESI],
222 env->regs[R_EDI],
223 env->regs[R_EBP],
224 0, 0);
225 if (ret == -TARGET_ERESTARTSYS) {
226 env->eip -= 2;
227 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
228 env->regs[R_EAX] = ret;
229 }
230 break;
231#ifndef TARGET_ABI32
232 case EXCP_SYSCALL:
233
234 ret = do_syscall(env,
235 env->regs[R_EAX],
236 env->regs[R_EDI],
237 env->regs[R_ESI],
238 env->regs[R_EDX],
239 env->regs[10],
240 env->regs[8],
241 env->regs[9],
242 0, 0);
243 if (ret == -TARGET_ERESTARTSYS) {
244 env->eip -= 2;
245 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
246 env->regs[R_EAX] = ret;
247 }
248 break;
249#endif
250 case EXCP0B_NOSEG:
251 case EXCP0C_STACK:
252 info.si_signo = TARGET_SIGBUS;
253 info.si_errno = 0;
254 info.si_code = TARGET_SI_KERNEL;
255 info._sifields._sigfault._addr = 0;
256 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
257 break;
258 case EXCP0D_GPF:
259
260#ifndef TARGET_X86_64
261 if (env->eflags & VM_MASK) {
262 handle_vm86_fault(env);
263 } else
264#endif
265 {
266 info.si_signo = TARGET_SIGSEGV;
267 info.si_errno = 0;
268 info.si_code = TARGET_SI_KERNEL;
269 info._sifields._sigfault._addr = 0;
270 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
271 }
272 break;
273 case EXCP0E_PAGE:
274 info.si_signo = TARGET_SIGSEGV;
275 info.si_errno = 0;
276 if (!(env->error_code & 1))
277 info.si_code = TARGET_SEGV_MAPERR;
278 else
279 info.si_code = TARGET_SEGV_ACCERR;
280 info._sifields._sigfault._addr = env->cr[2];
281 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
282 break;
283 case EXCP00_DIVZ:
284#ifndef TARGET_X86_64
285 if (env->eflags & VM_MASK) {
286 handle_vm86_trap(env, trapnr);
287 } else
288#endif
289 {
290
291 info.si_signo = TARGET_SIGFPE;
292 info.si_errno = 0;
293 info.si_code = TARGET_FPE_INTDIV;
294 info._sifields._sigfault._addr = env->eip;
295 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
296 }
297 break;
298 case EXCP01_DB:
299 case EXCP03_INT3:
300#ifndef TARGET_X86_64
301 if (env->eflags & VM_MASK) {
302 handle_vm86_trap(env, trapnr);
303 } else
304#endif
305 {
306 info.si_signo = TARGET_SIGTRAP;
307 info.si_errno = 0;
308 if (trapnr == EXCP01_DB) {
309 info.si_code = TARGET_TRAP_BRKPT;
310 info._sifields._sigfault._addr = env->eip;
311 } else {
312 info.si_code = TARGET_SI_KERNEL;
313 info._sifields._sigfault._addr = 0;
314 }
315 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
316 }
317 break;
318 case EXCP04_INTO:
319 case EXCP05_BOUND:
320#ifndef TARGET_X86_64
321 if (env->eflags & VM_MASK) {
322 handle_vm86_trap(env, trapnr);
323 } else
324#endif
325 {
326 info.si_signo = TARGET_SIGSEGV;
327 info.si_errno = 0;
328 info.si_code = TARGET_SI_KERNEL;
329 info._sifields._sigfault._addr = 0;
330 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
331 }
332 break;
333 case EXCP06_ILLOP:
334 info.si_signo = TARGET_SIGILL;
335 info.si_errno = 0;
336 info.si_code = TARGET_ILL_ILLOPN;
337 info._sifields._sigfault._addr = env->eip;
338 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
339 break;
340 case EXCP_INTERRUPT:
341
342 break;
343 case EXCP_DEBUG:
344 {
345 int sig;
346
347 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
348 if (sig)
349 {
350 info.si_signo = sig;
351 info.si_errno = 0;
352 info.si_code = TARGET_TRAP_BRKPT;
353 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
354 }
355 }
356 break;
357 case EXCP_ATOMIC:
358 cpu_exec_step_atomic(cs);
359 break;
360 default:
361 pc = env->segs[R_CS].base + env->eip;
362 EXCP_DUMP(env, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
363 (long)pc, trapnr);
364 abort();
365 }
366 process_pending_signals(env);
367 }
368}
369#endif
370
371#ifdef TARGET_ARM
372
373#define get_user_code_u32(x, gaddr, env) \
374 ({ abi_long __r = get_user_u32((x), (gaddr)); \
375 if (!__r && bswap_code(arm_sctlr_b(env))) { \
376 (x) = bswap32(x); \
377 } \
378 __r; \
379 })
380
381#define get_user_code_u16(x, gaddr, env) \
382 ({ abi_long __r = get_user_u16((x), (gaddr)); \
383 if (!__r && bswap_code(arm_sctlr_b(env))) { \
384 (x) = bswap16(x); \
385 } \
386 __r; \
387 })
388
389#define get_user_data_u32(x, gaddr, env) \
390 ({ abi_long __r = get_user_u32((x), (gaddr)); \
391 if (!__r && arm_cpu_bswap_data(env)) { \
392 (x) = bswap32(x); \
393 } \
394 __r; \
395 })
396
397#define get_user_data_u16(x, gaddr, env) \
398 ({ abi_long __r = get_user_u16((x), (gaddr)); \
399 if (!__r && arm_cpu_bswap_data(env)) { \
400 (x) = bswap16(x); \
401 } \
402 __r; \
403 })
404
405#define put_user_data_u32(x, gaddr, env) \
406 ({ typeof(x) __x = (x); \
407 if (arm_cpu_bswap_data(env)) { \
408 __x = bswap32(__x); \
409 } \
410 put_user_u32(__x, (gaddr)); \
411 })
412
413#define put_user_data_u16(x, gaddr, env) \
414 ({ typeof(x) __x = (x); \
415 if (arm_cpu_bswap_data(env)) { \
416 __x = bswap16(__x); \
417 } \
418 put_user_u16(__x, (gaddr)); \
419 })
420
421#ifdef TARGET_ABI32
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438static void arm_kernel_cmpxchg64_helper(CPUARMState *env)
439{
440 uint64_t oldval, newval, val;
441 uint32_t addr, cpsr;
442 target_siginfo_t info;
443
444
445
446
447
448
449
450 start_exclusive();
451 cpsr = cpsr_read(env);
452 addr = env->regs[2];
453
454 if (get_user_u64(oldval, env->regs[0])) {
455 env->exception.vaddress = env->regs[0];
456 goto segv;
457 };
458
459 if (get_user_u64(newval, env->regs[1])) {
460 env->exception.vaddress = env->regs[1];
461 goto segv;
462 };
463
464 if (get_user_u64(val, addr)) {
465 env->exception.vaddress = addr;
466 goto segv;
467 }
468
469 if (val == oldval) {
470 val = newval;
471
472 if (put_user_u64(val, addr)) {
473 env->exception.vaddress = addr;
474 goto segv;
475 };
476
477 env->regs[0] = 0;
478 cpsr |= CPSR_C;
479 } else {
480 env->regs[0] = -1;
481 cpsr &= ~CPSR_C;
482 }
483 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
484 end_exclusive();
485 return;
486
487segv:
488 end_exclusive();
489
490
491 info.si_signo = TARGET_SIGSEGV;
492 info.si_errno = 0;
493
494 info.si_code = TARGET_SEGV_MAPERR;
495 info._sifields._sigfault._addr = env->exception.vaddress;
496 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
497}
498
499
500static int
501do_kernel_trap(CPUARMState *env)
502{
503 uint32_t addr;
504 uint32_t cpsr;
505 uint32_t val;
506
507 switch (env->regs[15]) {
508 case 0xffff0fa0:
509
510 break;
511 case 0xffff0fc0:
512
513
514
515
516 start_exclusive();
517 cpsr = cpsr_read(env);
518 addr = env->regs[2];
519
520 if (get_user_u32(val, addr))
521 val = ~env->regs[0];
522 if (val == env->regs[0]) {
523 val = env->regs[1];
524
525 put_user_u32(val, addr);
526 env->regs[0] = 0;
527 cpsr |= CPSR_C;
528 } else {
529 env->regs[0] = -1;
530 cpsr &= ~CPSR_C;
531 }
532 cpsr_write(env, cpsr, CPSR_C, CPSRWriteByInstr);
533 end_exclusive();
534 break;
535 case 0xffff0fe0:
536 env->regs[0] = cpu_get_tls(env);
537 break;
538 case 0xffff0f60:
539 arm_kernel_cmpxchg64_helper(env);
540 break;
541
542 default:
543 return 1;
544 }
545
546 addr = env->regs[14];
547 if (addr & 1) {
548 env->thumb = 1;
549 addr &= ~1;
550 }
551 env->regs[15] = addr;
552
553 return 0;
554}
555
556void cpu_loop(CPUARMState *env)
557{
558 CPUState *cs = CPU(arm_env_get_cpu(env));
559 int trapnr;
560 unsigned int n, insn;
561 target_siginfo_t info;
562 uint32_t addr;
563 abi_ulong ret;
564
565 for(;;) {
566 cpu_exec_start(cs);
567 trapnr = cpu_exec(cs);
568 cpu_exec_end(cs);
569 process_queued_cpu_work(cs);
570
571 switch(trapnr) {
572 case EXCP_UDEF:
573 {
574 TaskState *ts = cs->opaque;
575 uint32_t opcode;
576 int rc;
577
578
579
580
581 get_user_code_u32(opcode, env->regs[15], env);
582
583 rc = EmulateAll(opcode, &ts->fpa, env);
584 if (rc == 0) {
585 info.si_signo = TARGET_SIGILL;
586 info.si_errno = 0;
587 info.si_code = TARGET_ILL_ILLOPN;
588 info._sifields._sigfault._addr = env->regs[15];
589 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
590 } else if (rc < 0) {
591 int arm_fpe=0;
592
593
594 if (-rc & float_flag_invalid)
595 arm_fpe |= BIT_IOC;
596 if (-rc & float_flag_divbyzero)
597 arm_fpe |= BIT_DZC;
598 if (-rc & float_flag_overflow)
599 arm_fpe |= BIT_OFC;
600 if (-rc & float_flag_underflow)
601 arm_fpe |= BIT_UFC;
602 if (-rc & float_flag_inexact)
603 arm_fpe |= BIT_IXC;
604
605 FPSR fpsr = ts->fpa.fpsr;
606
607
608 if (fpsr & (arm_fpe << 16)) {
609 info.si_signo = TARGET_SIGFPE;
610 info.si_errno = 0;
611
612
613 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
614 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
615 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
616 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
617 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
618
619 info._sifields._sigfault._addr = env->regs[15];
620 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
621 } else {
622 env->regs[15] += 4;
623 }
624
625
626 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
627 fpsr |= BIT_IXC;
628 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
629 fpsr |= BIT_UFC;
630 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
631 fpsr |= BIT_OFC;
632 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
633 fpsr |= BIT_DZC;
634 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
635 fpsr |= BIT_IOC;
636 ts->fpa.fpsr=fpsr;
637 } else {
638
639 env->regs[15] += 4;
640 }
641 }
642 break;
643 case EXCP_SWI:
644 case EXCP_BKPT:
645 {
646 env->eabi = 1;
647
648 if (trapnr == EXCP_BKPT) {
649 if (env->thumb) {
650
651 get_user_code_u16(insn, env->regs[15], env);
652 n = insn & 0xff;
653 env->regs[15] += 2;
654 } else {
655
656 get_user_code_u32(insn, env->regs[15], env);
657 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
658 env->regs[15] += 4;
659 }
660 } else {
661 if (env->thumb) {
662
663 get_user_code_u16(insn, env->regs[15] - 2, env);
664 n = insn & 0xff;
665 } else {
666
667 get_user_code_u32(insn, env->regs[15] - 4, env);
668 n = insn & 0xffffff;
669 }
670 }
671
672 if (n == ARM_NR_cacheflush) {
673
674 } else if (n == ARM_NR_semihosting
675 || n == ARM_NR_thumb_semihosting) {
676 env->regs[0] = do_arm_semihosting (env);
677 } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
678
679 if (env->thumb || n == 0) {
680 n = env->regs[7];
681 } else {
682 n -= ARM_SYSCALL_BASE;
683 env->eabi = 0;
684 }
685 if ( n > ARM_NR_BASE) {
686 switch (n) {
687 case ARM_NR_cacheflush:
688
689 break;
690 case ARM_NR_set_tls:
691 cpu_set_tls(env, env->regs[0]);
692 env->regs[0] = 0;
693 break;
694 case ARM_NR_breakpoint:
695 env->regs[15] -= env->thumb ? 2 : 4;
696 goto excp_debug;
697 default:
698 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
699 n);
700 env->regs[0] = -TARGET_ENOSYS;
701 break;
702 }
703 } else {
704 ret = do_syscall(env,
705 n,
706 env->regs[0],
707 env->regs[1],
708 env->regs[2],
709 env->regs[3],
710 env->regs[4],
711 env->regs[5],
712 0, 0);
713 if (ret == -TARGET_ERESTARTSYS) {
714 env->regs[15] -= env->thumb ? 2 : 4;
715 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
716 env->regs[0] = ret;
717 }
718 }
719 } else {
720 goto error;
721 }
722 }
723 break;
724 case EXCP_SEMIHOST:
725 env->regs[0] = do_arm_semihosting(env);
726 break;
727 case EXCP_INTERRUPT:
728
729 break;
730 case EXCP_PREFETCH_ABORT:
731 case EXCP_DATA_ABORT:
732 addr = env->exception.vaddress;
733 {
734 info.si_signo = TARGET_SIGSEGV;
735 info.si_errno = 0;
736
737 info.si_code = TARGET_SEGV_MAPERR;
738 info._sifields._sigfault._addr = addr;
739 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
740 }
741 break;
742 case EXCP_DEBUG:
743 excp_debug:
744 {
745 int sig;
746
747 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
748 if (sig)
749 {
750 info.si_signo = sig;
751 info.si_errno = 0;
752 info.si_code = TARGET_TRAP_BRKPT;
753 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
754 }
755 }
756 break;
757 case EXCP_KERNEL_TRAP:
758 if (do_kernel_trap(env))
759 goto error;
760 break;
761 case EXCP_YIELD:
762
763 break;
764 case EXCP_ATOMIC:
765 cpu_exec_step_atomic(cs);
766 break;
767 default:
768 error:
769 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
770 abort();
771 }
772 process_pending_signals(env);
773 }
774}
775
776#else
777
778
779void cpu_loop(CPUARMState *env)
780{
781 CPUState *cs = CPU(arm_env_get_cpu(env));
782 int trapnr, sig;
783 abi_long ret;
784 target_siginfo_t info;
785
786 for (;;) {
787 cpu_exec_start(cs);
788 trapnr = cpu_exec(cs);
789 cpu_exec_end(cs);
790 process_queued_cpu_work(cs);
791
792 switch (trapnr) {
793 case EXCP_SWI:
794 ret = do_syscall(env,
795 env->xregs[8],
796 env->xregs[0],
797 env->xregs[1],
798 env->xregs[2],
799 env->xregs[3],
800 env->xregs[4],
801 env->xregs[5],
802 0, 0);
803 if (ret == -TARGET_ERESTARTSYS) {
804 env->pc -= 4;
805 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
806 env->xregs[0] = ret;
807 }
808 break;
809 case EXCP_INTERRUPT:
810
811 break;
812 case EXCP_UDEF:
813 info.si_signo = TARGET_SIGILL;
814 info.si_errno = 0;
815 info.si_code = TARGET_ILL_ILLOPN;
816 info._sifields._sigfault._addr = env->pc;
817 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
818 break;
819 case EXCP_PREFETCH_ABORT:
820 case EXCP_DATA_ABORT:
821 info.si_signo = TARGET_SIGSEGV;
822 info.si_errno = 0;
823
824 info.si_code = TARGET_SEGV_MAPERR;
825 info._sifields._sigfault._addr = env->exception.vaddress;
826 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
827 break;
828 case EXCP_DEBUG:
829 case EXCP_BKPT:
830 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
831 if (sig) {
832 info.si_signo = sig;
833 info.si_errno = 0;
834 info.si_code = TARGET_TRAP_BRKPT;
835 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
836 }
837 break;
838 case EXCP_SEMIHOST:
839 env->xregs[0] = do_arm_semihosting(env);
840 break;
841 case EXCP_YIELD:
842
843 break;
844 case EXCP_ATOMIC:
845 cpu_exec_step_atomic(cs);
846 break;
847 default:
848 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
849 abort();
850 }
851 process_pending_signals(env);
852
853
854
855 env->exclusive_addr = -1;
856 }
857}
858#endif
859
860#endif
861
862#ifdef TARGET_UNICORE32
863
864void cpu_loop(CPUUniCore32State *env)
865{
866 CPUState *cs = CPU(uc32_env_get_cpu(env));
867 int trapnr;
868 unsigned int n, insn;
869 target_siginfo_t info;
870
871 for (;;) {
872 cpu_exec_start(cs);
873 trapnr = cpu_exec(cs);
874 cpu_exec_end(cs);
875 process_queued_cpu_work(cs);
876
877 switch (trapnr) {
878 case UC32_EXCP_PRIV:
879 {
880
881 get_user_u32(insn, env->regs[31] - 4);
882 n = insn & 0xffffff;
883
884 if (n >= UC32_SYSCALL_BASE) {
885
886 n -= UC32_SYSCALL_BASE;
887 if (n == UC32_SYSCALL_NR_set_tls) {
888 cpu_set_tls(env, env->regs[0]);
889 env->regs[0] = 0;
890 } else {
891 abi_long ret = do_syscall(env,
892 n,
893 env->regs[0],
894 env->regs[1],
895 env->regs[2],
896 env->regs[3],
897 env->regs[4],
898 env->regs[5],
899 0, 0);
900 if (ret == -TARGET_ERESTARTSYS) {
901 env->regs[31] -= 4;
902 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
903 env->regs[0] = ret;
904 }
905 }
906 } else {
907 goto error;
908 }
909 }
910 break;
911 case UC32_EXCP_DTRAP:
912 case UC32_EXCP_ITRAP:
913 info.si_signo = TARGET_SIGSEGV;
914 info.si_errno = 0;
915
916 info.si_code = TARGET_SEGV_MAPERR;
917 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
918 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
919 break;
920 case EXCP_INTERRUPT:
921
922 break;
923 case EXCP_DEBUG:
924 {
925 int sig;
926
927 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
928 if (sig) {
929 info.si_signo = sig;
930 info.si_errno = 0;
931 info.si_code = TARGET_TRAP_BRKPT;
932 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
933 }
934 }
935 break;
936 case EXCP_ATOMIC:
937 cpu_exec_step_atomic(cs);
938 break;
939 default:
940 goto error;
941 }
942 process_pending_signals(env);
943 }
944
945error:
946 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
947 abort();
948}
949#endif
950
951#ifdef TARGET_SPARC
952#define SPARC64_STACK_BIAS 2047
953
954
955
956
957
958static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
959{
960 index = (index + cwp * 16) % (16 * env->nwindows);
961
962
963 if (index < 8 && env->cwp == env->nwindows - 1)
964 index += 16 * env->nwindows;
965 return index;
966}
967
968
969static inline void save_window_offset(CPUSPARCState *env, int cwp1)
970{
971 unsigned int i;
972 abi_ulong sp_ptr;
973
974 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
975#ifdef TARGET_SPARC64
976 if (sp_ptr & 3)
977 sp_ptr += SPARC64_STACK_BIAS;
978#endif
979#if defined(DEBUG_WIN)
980 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
981 sp_ptr, cwp1);
982#endif
983 for(i = 0; i < 16; i++) {
984
985 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
986 sp_ptr += sizeof(abi_ulong);
987 }
988}
989
990static void save_window(CPUSPARCState *env)
991{
992#ifndef TARGET_SPARC64
993 unsigned int new_wim;
994 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
995 ((1LL << env->nwindows) - 1);
996 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
997 env->wim = new_wim;
998#else
999 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
1000 env->cansave++;
1001 env->canrestore--;
1002#endif
1003}
1004
1005static void restore_window(CPUSPARCState *env)
1006{
1007#ifndef TARGET_SPARC64
1008 unsigned int new_wim;
1009#endif
1010 unsigned int i, cwp1;
1011 abi_ulong sp_ptr;
1012
1013#ifndef TARGET_SPARC64
1014 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
1015 ((1LL << env->nwindows) - 1);
1016#endif
1017
1018
1019 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1020 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
1021#ifdef TARGET_SPARC64
1022 if (sp_ptr & 3)
1023 sp_ptr += SPARC64_STACK_BIAS;
1024#endif
1025#if defined(DEBUG_WIN)
1026 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
1027 sp_ptr, cwp1);
1028#endif
1029 for(i = 0; i < 16; i++) {
1030
1031 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
1032 sp_ptr += sizeof(abi_ulong);
1033 }
1034#ifdef TARGET_SPARC64
1035 env->canrestore++;
1036 if (env->cleanwin < env->nwindows - 1)
1037 env->cleanwin++;
1038 env->cansave--;
1039#else
1040 env->wim = new_wim;
1041#endif
1042}
1043
1044static void flush_windows(CPUSPARCState *env)
1045{
1046 int offset, cwp1;
1047
1048 offset = 1;
1049 for(;;) {
1050
1051 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
1052#ifndef TARGET_SPARC64
1053 if (env->wim & (1 << cwp1))
1054 break;
1055#else
1056 if (env->canrestore == 0)
1057 break;
1058 env->cansave++;
1059 env->canrestore--;
1060#endif
1061 save_window_offset(env, cwp1);
1062 offset++;
1063 }
1064 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
1065#ifndef TARGET_SPARC64
1066
1067 env->wim = 1 << cwp1;
1068#endif
1069#if defined(DEBUG_WIN)
1070 printf("flush_windows: nb=%d\n", offset - 1);
1071#endif
1072}
1073
1074void cpu_loop (CPUSPARCState *env)
1075{
1076 CPUState *cs = CPU(sparc_env_get_cpu(env));
1077 int trapnr;
1078 abi_long ret;
1079 target_siginfo_t info;
1080
1081 while (1) {
1082 cpu_exec_start(cs);
1083 trapnr = cpu_exec(cs);
1084 cpu_exec_end(cs);
1085 process_queued_cpu_work(cs);
1086
1087
1088 if (env->cc_op != CC_OP_FLAGS) {
1089 cpu_get_psr(env);
1090 }
1091
1092 switch (trapnr) {
1093#ifndef TARGET_SPARC64
1094 case 0x88:
1095 case 0x90:
1096#else
1097 case 0x110:
1098 case 0x16d:
1099#endif
1100 ret = do_syscall (env, env->gregs[1],
1101 env->regwptr[0], env->regwptr[1],
1102 env->regwptr[2], env->regwptr[3],
1103 env->regwptr[4], env->regwptr[5],
1104 0, 0);
1105 if (ret == -TARGET_ERESTARTSYS || ret == -TARGET_QEMU_ESIGRETURN) {
1106 break;
1107 }
1108 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
1109#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1110 env->xcc |= PSR_CARRY;
1111#else
1112 env->psr |= PSR_CARRY;
1113#endif
1114 ret = -ret;
1115 } else {
1116#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
1117 env->xcc &= ~PSR_CARRY;
1118#else
1119 env->psr &= ~PSR_CARRY;
1120#endif
1121 }
1122 env->regwptr[0] = ret;
1123
1124 env->pc = env->npc;
1125 env->npc = env->npc + 4;
1126 break;
1127 case 0x83:
1128#ifdef TARGET_ABI32
1129 case 0x103:
1130#endif
1131 flush_windows(env);
1132
1133 env->pc = env->npc;
1134 env->npc = env->npc + 4;
1135 break;
1136#ifndef TARGET_SPARC64
1137 case TT_WIN_OVF:
1138 save_window(env);
1139 break;
1140 case TT_WIN_UNF:
1141 restore_window(env);
1142 break;
1143 case TT_TFAULT:
1144 case TT_DFAULT:
1145 {
1146 info.si_signo = TARGET_SIGSEGV;
1147 info.si_errno = 0;
1148
1149 info.si_code = TARGET_SEGV_MAPERR;
1150 info._sifields._sigfault._addr = env->mmuregs[4];
1151 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1152 }
1153 break;
1154#else
1155 case TT_SPILL:
1156 save_window(env);
1157 break;
1158 case TT_FILL:
1159 restore_window(env);
1160 break;
1161 case TT_TFAULT:
1162 case TT_DFAULT:
1163 {
1164 info.si_signo = TARGET_SIGSEGV;
1165 info.si_errno = 0;
1166
1167 info.si_code = TARGET_SEGV_MAPERR;
1168 if (trapnr == TT_DFAULT)
1169 info._sifields._sigfault._addr = env->dmmuregs[4];
1170 else
1171 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
1172 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1173 }
1174 break;
1175#ifndef TARGET_ABI32
1176 case 0x16e:
1177 flush_windows(env);
1178 sparc64_get_context(env);
1179 break;
1180 case 0x16f:
1181 flush_windows(env);
1182 sparc64_set_context(env);
1183 break;
1184#endif
1185#endif
1186 case EXCP_INTERRUPT:
1187
1188 break;
1189 case TT_ILL_INSN:
1190 {
1191 info.si_signo = TARGET_SIGILL;
1192 info.si_errno = 0;
1193 info.si_code = TARGET_ILL_ILLOPC;
1194 info._sifields._sigfault._addr = env->pc;
1195 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1196 }
1197 break;
1198 case EXCP_DEBUG:
1199 {
1200 int sig;
1201
1202 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1203 if (sig)
1204 {
1205 info.si_signo = sig;
1206 info.si_errno = 0;
1207 info.si_code = TARGET_TRAP_BRKPT;
1208 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1209 }
1210 }
1211 break;
1212 case EXCP_ATOMIC:
1213 cpu_exec_step_atomic(cs);
1214 break;
1215 default:
1216 printf ("Unhandled trap: 0x%x\n", trapnr);
1217 cpu_dump_state(cs, stderr, fprintf, 0);
1218 exit(EXIT_FAILURE);
1219 }
1220 process_pending_signals (env);
1221 }
1222}
1223
1224#endif
1225
1226#ifdef TARGET_PPC
1227static inline uint64_t cpu_ppc_get_tb(CPUPPCState *env)
1228{
1229 return cpu_get_host_ticks();
1230}
1231
1232uint64_t cpu_ppc_load_tbl(CPUPPCState *env)
1233{
1234 return cpu_ppc_get_tb(env);
1235}
1236
1237uint32_t cpu_ppc_load_tbu(CPUPPCState *env)
1238{
1239 return cpu_ppc_get_tb(env) >> 32;
1240}
1241
1242uint64_t cpu_ppc_load_atbl(CPUPPCState *env)
1243{
1244 return cpu_ppc_get_tb(env);
1245}
1246
1247uint32_t cpu_ppc_load_atbu(CPUPPCState *env)
1248{
1249 return cpu_ppc_get_tb(env) >> 32;
1250}
1251
1252uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env)
1253__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1254
1255uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env)
1256{
1257 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1258}
1259
1260
1261int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
1262{
1263 return -1;
1264}
1265
1266int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
1267{
1268 return -1;
1269}
1270
1271static int do_store_exclusive(CPUPPCState *env)
1272{
1273 target_ulong addr;
1274 target_ulong page_addr;
1275 target_ulong val, val2 __attribute__((unused)) = 0;
1276 int flags;
1277 int segv = 0;
1278
1279 addr = env->reserve_ea;
1280 page_addr = addr & TARGET_PAGE_MASK;
1281 start_exclusive();
1282 mmap_lock();
1283 flags = page_get_flags(page_addr);
1284 if ((flags & PAGE_READ) == 0) {
1285 segv = 1;
1286 } else {
1287 int reg = env->reserve_info & 0x1f;
1288 int size = env->reserve_info >> 5;
1289 int stored = 0;
1290
1291 if (addr == env->reserve_addr) {
1292 switch (size) {
1293 case 1: segv = get_user_u8(val, addr); break;
1294 case 2: segv = get_user_u16(val, addr); break;
1295 case 4: segv = get_user_u32(val, addr); break;
1296#if defined(TARGET_PPC64)
1297 case 8: segv = get_user_u64(val, addr); break;
1298 case 16: {
1299 segv = get_user_u64(val, addr);
1300 if (!segv) {
1301 segv = get_user_u64(val2, addr + 8);
1302 }
1303 break;
1304 }
1305#endif
1306 default: abort();
1307 }
1308 if (!segv && val == env->reserve_val) {
1309 val = env->gpr[reg];
1310 switch (size) {
1311 case 1: segv = put_user_u8(val, addr); break;
1312 case 2: segv = put_user_u16(val, addr); break;
1313 case 4: segv = put_user_u32(val, addr); break;
1314#if defined(TARGET_PPC64)
1315 case 8: segv = put_user_u64(val, addr); break;
1316 case 16: {
1317 if (val2 == env->reserve_val2) {
1318 if (msr_le) {
1319 val2 = val;
1320 val = env->gpr[reg+1];
1321 } else {
1322 val2 = env->gpr[reg+1];
1323 }
1324 segv = put_user_u64(val, addr);
1325 if (!segv) {
1326 segv = put_user_u64(val2, addr + 8);
1327 }
1328 }
1329 break;
1330 }
1331#endif
1332 default: abort();
1333 }
1334 if (!segv) {
1335 stored = 1;
1336 }
1337 }
1338 }
1339 env->crf[0] = (stored << 1) | xer_so;
1340 env->reserve_addr = (target_ulong)-1;
1341 }
1342 if (!segv) {
1343 env->nip += 4;
1344 }
1345 mmap_unlock();
1346 end_exclusive();
1347 return segv;
1348}
1349
1350void cpu_loop(CPUPPCState *env)
1351{
1352 CPUState *cs = CPU(ppc_env_get_cpu(env));
1353 target_siginfo_t info;
1354 int trapnr;
1355 target_ulong ret;
1356
1357 for(;;) {
1358 cpu_exec_start(cs);
1359 trapnr = cpu_exec(cs);
1360 cpu_exec_end(cs);
1361 process_queued_cpu_work(cs);
1362
1363 switch(trapnr) {
1364 case POWERPC_EXCP_NONE:
1365
1366 break;
1367 case POWERPC_EXCP_CRITICAL:
1368 cpu_abort(cs, "Critical interrupt while in user mode. "
1369 "Aborting\n");
1370 break;
1371 case POWERPC_EXCP_MCHECK:
1372 cpu_abort(cs, "Machine check exception while in user mode. "
1373 "Aborting\n");
1374 break;
1375 case POWERPC_EXCP_DSI:
1376
1377 switch (env->error_code & 0xFF000000) {
1378 case 0x40000000:
1379 case 0x42000000:
1380 info.si_signo = TARGET_SIGSEGV;
1381 info.si_errno = 0;
1382 info.si_code = TARGET_SEGV_MAPERR;
1383 break;
1384 case 0x04000000:
1385 info.si_signo = TARGET_SIGILL;
1386 info.si_errno = 0;
1387 info.si_code = TARGET_ILL_ILLADR;
1388 break;
1389 case 0x08000000:
1390 info.si_signo = TARGET_SIGSEGV;
1391 info.si_errno = 0;
1392 info.si_code = TARGET_SEGV_ACCERR;
1393 break;
1394 default:
1395
1396 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1397 env->error_code);
1398 info.si_signo = TARGET_SIGSEGV;
1399 info.si_errno = 0;
1400 info.si_code = TARGET_SEGV_MAPERR;
1401 break;
1402 }
1403 info._sifields._sigfault._addr = env->nip;
1404 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1405 break;
1406 case POWERPC_EXCP_ISI:
1407
1408 switch (env->error_code & 0xFF000000) {
1409 case 0x40000000:
1410 info.si_signo = TARGET_SIGSEGV;
1411 info.si_errno = 0;
1412 info.si_code = TARGET_SEGV_MAPERR;
1413 break;
1414 case 0x10000000:
1415 case 0x08000000:
1416 info.si_signo = TARGET_SIGSEGV;
1417 info.si_errno = 0;
1418 info.si_code = TARGET_SEGV_ACCERR;
1419 break;
1420 default:
1421
1422 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1423 env->error_code);
1424 info.si_signo = TARGET_SIGSEGV;
1425 info.si_errno = 0;
1426 info.si_code = TARGET_SEGV_MAPERR;
1427 break;
1428 }
1429 info._sifields._sigfault._addr = env->nip - 4;
1430 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1431 break;
1432 case POWERPC_EXCP_EXTERNAL:
1433 cpu_abort(cs, "External interrupt while in user mode. "
1434 "Aborting\n");
1435 break;
1436 case POWERPC_EXCP_ALIGN:
1437
1438 info.si_signo = TARGET_SIGBUS;
1439 info.si_errno = 0;
1440 info.si_code = TARGET_BUS_ADRALN;
1441 info._sifields._sigfault._addr = env->nip;
1442 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1443 break;
1444 case POWERPC_EXCP_PROGRAM:
1445 case POWERPC_EXCP_HV_EMU:
1446
1447 switch (env->error_code & ~0xF) {
1448 case POWERPC_EXCP_FP:
1449 info.si_signo = TARGET_SIGFPE;
1450 info.si_errno = 0;
1451 switch (env->error_code & 0xF) {
1452 case POWERPC_EXCP_FP_OX:
1453 info.si_code = TARGET_FPE_FLTOVF;
1454 break;
1455 case POWERPC_EXCP_FP_UX:
1456 info.si_code = TARGET_FPE_FLTUND;
1457 break;
1458 case POWERPC_EXCP_FP_ZX:
1459 case POWERPC_EXCP_FP_VXZDZ:
1460 info.si_code = TARGET_FPE_FLTDIV;
1461 break;
1462 case POWERPC_EXCP_FP_XX:
1463 info.si_code = TARGET_FPE_FLTRES;
1464 break;
1465 case POWERPC_EXCP_FP_VXSOFT:
1466 info.si_code = TARGET_FPE_FLTINV;
1467 break;
1468 case POWERPC_EXCP_FP_VXSNAN:
1469 case POWERPC_EXCP_FP_VXISI:
1470 case POWERPC_EXCP_FP_VXIDI:
1471 case POWERPC_EXCP_FP_VXIMZ:
1472 case POWERPC_EXCP_FP_VXVC:
1473 case POWERPC_EXCP_FP_VXSQRT:
1474 case POWERPC_EXCP_FP_VXCVI:
1475 info.si_code = TARGET_FPE_FLTSUB;
1476 break;
1477 default:
1478 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1479 env->error_code);
1480 break;
1481 }
1482 break;
1483 case POWERPC_EXCP_INVAL:
1484 info.si_signo = TARGET_SIGILL;
1485 info.si_errno = 0;
1486 switch (env->error_code & 0xF) {
1487 case POWERPC_EXCP_INVAL_INVAL:
1488 info.si_code = TARGET_ILL_ILLOPC;
1489 break;
1490 case POWERPC_EXCP_INVAL_LSWX:
1491 info.si_code = TARGET_ILL_ILLOPN;
1492 break;
1493 case POWERPC_EXCP_INVAL_SPR:
1494 info.si_code = TARGET_ILL_PRVREG;
1495 break;
1496 case POWERPC_EXCP_INVAL_FP:
1497 info.si_code = TARGET_ILL_COPROC;
1498 break;
1499 default:
1500 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1501 env->error_code & 0xF);
1502 info.si_code = TARGET_ILL_ILLADR;
1503 break;
1504 }
1505 break;
1506 case POWERPC_EXCP_PRIV:
1507 info.si_signo = TARGET_SIGILL;
1508 info.si_errno = 0;
1509 switch (env->error_code & 0xF) {
1510 case POWERPC_EXCP_PRIV_OPC:
1511 info.si_code = TARGET_ILL_PRVOPC;
1512 break;
1513 case POWERPC_EXCP_PRIV_REG:
1514 info.si_code = TARGET_ILL_PRVREG;
1515 break;
1516 default:
1517 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1518 env->error_code & 0xF);
1519 info.si_code = TARGET_ILL_PRVOPC;
1520 break;
1521 }
1522 break;
1523 case POWERPC_EXCP_TRAP:
1524 cpu_abort(cs, "Tried to call a TRAP\n");
1525 break;
1526 default:
1527
1528 cpu_abort(cs, "Unknown program exception (%02x)\n",
1529 env->error_code);
1530 break;
1531 }
1532 info._sifields._sigfault._addr = env->nip;
1533 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1534 break;
1535 case POWERPC_EXCP_FPU:
1536 info.si_signo = TARGET_SIGILL;
1537 info.si_errno = 0;
1538 info.si_code = TARGET_ILL_COPROC;
1539 info._sifields._sigfault._addr = env->nip;
1540 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1541 break;
1542 case POWERPC_EXCP_SYSCALL:
1543 cpu_abort(cs, "Syscall exception while in user mode. "
1544 "Aborting\n");
1545 break;
1546 case POWERPC_EXCP_APU:
1547 info.si_signo = TARGET_SIGILL;
1548 info.si_errno = 0;
1549 info.si_code = TARGET_ILL_COPROC;
1550 info._sifields._sigfault._addr = env->nip;
1551 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1552 break;
1553 case POWERPC_EXCP_DECR:
1554 cpu_abort(cs, "Decrementer interrupt while in user mode. "
1555 "Aborting\n");
1556 break;
1557 case POWERPC_EXCP_FIT:
1558 cpu_abort(cs, "Fix interval timer interrupt while in user mode. "
1559 "Aborting\n");
1560 break;
1561 case POWERPC_EXCP_WDT:
1562 cpu_abort(cs, "Watchdog timer interrupt while in user mode. "
1563 "Aborting\n");
1564 break;
1565 case POWERPC_EXCP_DTLB:
1566 cpu_abort(cs, "Data TLB exception while in user mode. "
1567 "Aborting\n");
1568 break;
1569 case POWERPC_EXCP_ITLB:
1570 cpu_abort(cs, "Instruction TLB exception while in user mode. "
1571 "Aborting\n");
1572 break;
1573 case POWERPC_EXCP_SPEU:
1574 info.si_signo = TARGET_SIGILL;
1575 info.si_errno = 0;
1576 info.si_code = TARGET_ILL_COPROC;
1577 info._sifields._sigfault._addr = env->nip;
1578 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1579 break;
1580 case POWERPC_EXCP_EFPDI:
1581 cpu_abort(cs, "Embedded floating-point data IRQ not handled\n");
1582 break;
1583 case POWERPC_EXCP_EFPRI:
1584 cpu_abort(cs, "Embedded floating-point round IRQ not handled\n");
1585 break;
1586 case POWERPC_EXCP_EPERFM:
1587 cpu_abort(cs, "Performance monitor exception not handled\n");
1588 break;
1589 case POWERPC_EXCP_DOORI:
1590 cpu_abort(cs, "Doorbell interrupt while in user mode. "
1591 "Aborting\n");
1592 break;
1593 case POWERPC_EXCP_DOORCI:
1594 cpu_abort(cs, "Doorbell critical interrupt while in user mode. "
1595 "Aborting\n");
1596 break;
1597 case POWERPC_EXCP_RESET:
1598 cpu_abort(cs, "Reset interrupt while in user mode. "
1599 "Aborting\n");
1600 break;
1601 case POWERPC_EXCP_DSEG:
1602 cpu_abort(cs, "Data segment exception while in user mode. "
1603 "Aborting\n");
1604 break;
1605 case POWERPC_EXCP_ISEG:
1606 cpu_abort(cs, "Instruction segment exception "
1607 "while in user mode. Aborting\n");
1608 break;
1609
1610 case POWERPC_EXCP_HDECR:
1611 cpu_abort(cs, "Hypervisor decrementer interrupt "
1612 "while in user mode. Aborting\n");
1613 break;
1614 case POWERPC_EXCP_TRACE:
1615
1616
1617
1618 break;
1619
1620 case POWERPC_EXCP_HDSI:
1621 cpu_abort(cs, "Hypervisor data storage exception "
1622 "while in user mode. Aborting\n");
1623 break;
1624 case POWERPC_EXCP_HISI:
1625 cpu_abort(cs, "Hypervisor instruction storage exception "
1626 "while in user mode. Aborting\n");
1627 break;
1628 case POWERPC_EXCP_HDSEG:
1629 cpu_abort(cs, "Hypervisor data segment exception "
1630 "while in user mode. Aborting\n");
1631 break;
1632 case POWERPC_EXCP_HISEG:
1633 cpu_abort(cs, "Hypervisor instruction segment exception "
1634 "while in user mode. Aborting\n");
1635 break;
1636 case POWERPC_EXCP_VPU:
1637 info.si_signo = TARGET_SIGILL;
1638 info.si_errno = 0;
1639 info.si_code = TARGET_ILL_COPROC;
1640 info._sifields._sigfault._addr = env->nip;
1641 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1642 break;
1643 case POWERPC_EXCP_PIT:
1644 cpu_abort(cs, "Programmable interval timer interrupt "
1645 "while in user mode. Aborting\n");
1646 break;
1647 case POWERPC_EXCP_IO:
1648 cpu_abort(cs, "IO error exception while in user mode. "
1649 "Aborting\n");
1650 break;
1651 case POWERPC_EXCP_RUNM:
1652 cpu_abort(cs, "Run mode exception while in user mode. "
1653 "Aborting\n");
1654 break;
1655 case POWERPC_EXCP_EMUL:
1656 cpu_abort(cs, "Emulation trap exception not handled\n");
1657 break;
1658 case POWERPC_EXCP_IFTLB:
1659 cpu_abort(cs, "Instruction fetch TLB exception "
1660 "while in user-mode. Aborting");
1661 break;
1662 case POWERPC_EXCP_DLTLB:
1663 cpu_abort(cs, "Data load TLB exception while in user-mode. "
1664 "Aborting");
1665 break;
1666 case POWERPC_EXCP_DSTLB:
1667 cpu_abort(cs, "Data store TLB exception while in user-mode. "
1668 "Aborting");
1669 break;
1670 case POWERPC_EXCP_FPA:
1671 cpu_abort(cs, "Floating-point assist exception not handled\n");
1672 break;
1673 case POWERPC_EXCP_IABR:
1674 cpu_abort(cs, "Instruction address breakpoint exception "
1675 "not handled\n");
1676 break;
1677 case POWERPC_EXCP_SMI:
1678 cpu_abort(cs, "System management interrupt while in user mode. "
1679 "Aborting\n");
1680 break;
1681 case POWERPC_EXCP_THERM:
1682 cpu_abort(cs, "Thermal interrupt interrupt while in user mode. "
1683 "Aborting\n");
1684 break;
1685 case POWERPC_EXCP_PERFM:
1686 cpu_abort(cs, "Performance monitor exception not handled\n");
1687 break;
1688 case POWERPC_EXCP_VPUA:
1689 cpu_abort(cs, "Vector assist exception not handled\n");
1690 break;
1691 case POWERPC_EXCP_SOFTP:
1692 cpu_abort(cs, "Soft patch exception not handled\n");
1693 break;
1694 case POWERPC_EXCP_MAINT:
1695 cpu_abort(cs, "Maintenance exception while in user mode. "
1696 "Aborting\n");
1697 break;
1698 case POWERPC_EXCP_STOP:
1699
1700 break;
1701 case POWERPC_EXCP_BRANCH:
1702
1703 break;
1704 case POWERPC_EXCP_SYSCALL_USER:
1705
1706
1707
1708
1709
1710 env->crf[0] &= ~0x1;
1711 env->nip += 4;
1712 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1713 env->gpr[5], env->gpr[6], env->gpr[7],
1714 env->gpr[8], 0, 0);
1715 if (ret == -TARGET_ERESTARTSYS) {
1716 env->nip -= 4;
1717 break;
1718 }
1719 if (ret == (target_ulong)(-TARGET_QEMU_ESIGRETURN)) {
1720
1721
1722 break;
1723 }
1724 if (ret > (target_ulong)(-515)) {
1725 env->crf[0] |= 0x1;
1726 ret = -ret;
1727 }
1728 env->gpr[3] = ret;
1729 break;
1730 case POWERPC_EXCP_STCX:
1731 if (do_store_exclusive(env)) {
1732 info.si_signo = TARGET_SIGSEGV;
1733 info.si_errno = 0;
1734 info.si_code = TARGET_SEGV_MAPERR;
1735 info._sifields._sigfault._addr = env->nip;
1736 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1737 }
1738 break;
1739 case EXCP_DEBUG:
1740 {
1741 int sig;
1742
1743 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
1744 if (sig) {
1745 info.si_signo = sig;
1746 info.si_errno = 0;
1747 info.si_code = TARGET_TRAP_BRKPT;
1748 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
1749 }
1750 }
1751 break;
1752 case EXCP_INTERRUPT:
1753
1754 break;
1755 case EXCP_ATOMIC:
1756 cpu_exec_step_atomic(cs);
1757 break;
1758 default:
1759 cpu_abort(cs, "Unknown exception 0x%x. Aborting\n", trapnr);
1760 break;
1761 }
1762 process_pending_signals(env);
1763 }
1764}
1765#endif
1766
1767#ifdef TARGET_MIPS
1768
1769# ifdef TARGET_ABI_MIPSO32
1770# define MIPS_SYS(name, args) args,
1771static const uint8_t mips_syscall_args[] = {
1772 MIPS_SYS(sys_syscall , 8)
1773 MIPS_SYS(sys_exit , 1)
1774 MIPS_SYS(sys_fork , 0)
1775 MIPS_SYS(sys_read , 3)
1776 MIPS_SYS(sys_write , 3)
1777 MIPS_SYS(sys_open , 3)
1778 MIPS_SYS(sys_close , 1)
1779 MIPS_SYS(sys_waitpid , 3)
1780 MIPS_SYS(sys_creat , 2)
1781 MIPS_SYS(sys_link , 2)
1782 MIPS_SYS(sys_unlink , 1)
1783 MIPS_SYS(sys_execve , 0)
1784 MIPS_SYS(sys_chdir , 1)
1785 MIPS_SYS(sys_time , 1)
1786 MIPS_SYS(sys_mknod , 3)
1787 MIPS_SYS(sys_chmod , 2)
1788 MIPS_SYS(sys_lchown , 3)
1789 MIPS_SYS(sys_ni_syscall , 0)
1790 MIPS_SYS(sys_ni_syscall , 0)
1791 MIPS_SYS(sys_lseek , 3)
1792 MIPS_SYS(sys_getpid , 0)
1793 MIPS_SYS(sys_mount , 5)
1794 MIPS_SYS(sys_umount , 1)
1795 MIPS_SYS(sys_setuid , 1)
1796 MIPS_SYS(sys_getuid , 0)
1797 MIPS_SYS(sys_stime , 1)
1798 MIPS_SYS(sys_ptrace , 4)
1799 MIPS_SYS(sys_alarm , 1)
1800 MIPS_SYS(sys_ni_syscall , 0)
1801 MIPS_SYS(sys_pause , 0)
1802 MIPS_SYS(sys_utime , 2)
1803 MIPS_SYS(sys_ni_syscall , 0)
1804 MIPS_SYS(sys_ni_syscall , 0)
1805 MIPS_SYS(sys_access , 2)
1806 MIPS_SYS(sys_nice , 1)
1807 MIPS_SYS(sys_ni_syscall , 0)
1808 MIPS_SYS(sys_sync , 0)
1809 MIPS_SYS(sys_kill , 2)
1810 MIPS_SYS(sys_rename , 2)
1811 MIPS_SYS(sys_mkdir , 2)
1812 MIPS_SYS(sys_rmdir , 1)
1813 MIPS_SYS(sys_dup , 1)
1814 MIPS_SYS(sys_pipe , 0)
1815 MIPS_SYS(sys_times , 1)
1816 MIPS_SYS(sys_ni_syscall , 0)
1817 MIPS_SYS(sys_brk , 1)
1818 MIPS_SYS(sys_setgid , 1)
1819 MIPS_SYS(sys_getgid , 0)
1820 MIPS_SYS(sys_ni_syscall , 0)
1821 MIPS_SYS(sys_geteuid , 0)
1822 MIPS_SYS(sys_getegid , 0)
1823 MIPS_SYS(sys_acct , 0)
1824 MIPS_SYS(sys_umount2 , 2)
1825 MIPS_SYS(sys_ni_syscall , 0)
1826 MIPS_SYS(sys_ioctl , 3)
1827 MIPS_SYS(sys_fcntl , 3)
1828 MIPS_SYS(sys_ni_syscall , 2)
1829 MIPS_SYS(sys_setpgid , 2)
1830 MIPS_SYS(sys_ni_syscall , 0)
1831 MIPS_SYS(sys_olduname , 1)
1832 MIPS_SYS(sys_umask , 1)
1833 MIPS_SYS(sys_chroot , 1)
1834 MIPS_SYS(sys_ustat , 2)
1835 MIPS_SYS(sys_dup2 , 2)
1836 MIPS_SYS(sys_getppid , 0)
1837 MIPS_SYS(sys_getpgrp , 0)
1838 MIPS_SYS(sys_setsid , 0)
1839 MIPS_SYS(sys_sigaction , 3)
1840 MIPS_SYS(sys_sgetmask , 0)
1841 MIPS_SYS(sys_ssetmask , 1)
1842 MIPS_SYS(sys_setreuid , 2)
1843 MIPS_SYS(sys_setregid , 2)
1844 MIPS_SYS(sys_sigsuspend , 0)
1845 MIPS_SYS(sys_sigpending , 1)
1846 MIPS_SYS(sys_sethostname , 2)
1847 MIPS_SYS(sys_setrlimit , 2)
1848 MIPS_SYS(sys_getrlimit , 2)
1849 MIPS_SYS(sys_getrusage , 2)
1850 MIPS_SYS(sys_gettimeofday, 2)
1851 MIPS_SYS(sys_settimeofday, 2)
1852 MIPS_SYS(sys_getgroups , 2)
1853 MIPS_SYS(sys_setgroups , 2)
1854 MIPS_SYS(sys_ni_syscall , 0)
1855 MIPS_SYS(sys_symlink , 2)
1856 MIPS_SYS(sys_ni_syscall , 0)
1857 MIPS_SYS(sys_readlink , 3)
1858 MIPS_SYS(sys_uselib , 1)
1859 MIPS_SYS(sys_swapon , 2)
1860 MIPS_SYS(sys_reboot , 3)
1861 MIPS_SYS(old_readdir , 3)
1862 MIPS_SYS(old_mmap , 6)
1863 MIPS_SYS(sys_munmap , 2)
1864 MIPS_SYS(sys_truncate , 2)
1865 MIPS_SYS(sys_ftruncate , 2)
1866 MIPS_SYS(sys_fchmod , 2)
1867 MIPS_SYS(sys_fchown , 3)
1868 MIPS_SYS(sys_getpriority , 2)
1869 MIPS_SYS(sys_setpriority , 3)
1870 MIPS_SYS(sys_ni_syscall , 0)
1871 MIPS_SYS(sys_statfs , 2)
1872 MIPS_SYS(sys_fstatfs , 2)
1873 MIPS_SYS(sys_ni_syscall , 0)
1874 MIPS_SYS(sys_socketcall , 2)
1875 MIPS_SYS(sys_syslog , 3)
1876 MIPS_SYS(sys_setitimer , 3)
1877 MIPS_SYS(sys_getitimer , 2)
1878 MIPS_SYS(sys_newstat , 2)
1879 MIPS_SYS(sys_newlstat , 2)
1880 MIPS_SYS(sys_newfstat , 2)
1881 MIPS_SYS(sys_uname , 1)
1882 MIPS_SYS(sys_ni_syscall , 0)
1883 MIPS_SYS(sys_vhangup , 0)
1884 MIPS_SYS(sys_ni_syscall , 0)
1885 MIPS_SYS(sys_ni_syscall , 0)
1886 MIPS_SYS(sys_wait4 , 4)
1887 MIPS_SYS(sys_swapoff , 1)
1888 MIPS_SYS(sys_sysinfo , 1)
1889 MIPS_SYS(sys_ipc , 6)
1890 MIPS_SYS(sys_fsync , 1)
1891 MIPS_SYS(sys_sigreturn , 0)
1892 MIPS_SYS(sys_clone , 6)
1893 MIPS_SYS(sys_setdomainname, 2)
1894 MIPS_SYS(sys_newuname , 1)
1895 MIPS_SYS(sys_ni_syscall , 0)
1896 MIPS_SYS(sys_adjtimex , 1)
1897 MIPS_SYS(sys_mprotect , 3)
1898 MIPS_SYS(sys_sigprocmask , 3)
1899 MIPS_SYS(sys_ni_syscall , 0)
1900 MIPS_SYS(sys_init_module , 5)
1901 MIPS_SYS(sys_delete_module, 1)
1902 MIPS_SYS(sys_ni_syscall , 0)
1903 MIPS_SYS(sys_quotactl , 0)
1904 MIPS_SYS(sys_getpgid , 1)
1905 MIPS_SYS(sys_fchdir , 1)
1906 MIPS_SYS(sys_bdflush , 2)
1907 MIPS_SYS(sys_sysfs , 3)
1908 MIPS_SYS(sys_personality , 1)
1909 MIPS_SYS(sys_ni_syscall , 0)
1910 MIPS_SYS(sys_setfsuid , 1)
1911 MIPS_SYS(sys_setfsgid , 1)
1912 MIPS_SYS(sys_llseek , 5)
1913 MIPS_SYS(sys_getdents , 3)
1914 MIPS_SYS(sys_select , 5)
1915 MIPS_SYS(sys_flock , 2)
1916 MIPS_SYS(sys_msync , 3)
1917 MIPS_SYS(sys_readv , 3)
1918 MIPS_SYS(sys_writev , 3)
1919 MIPS_SYS(sys_cacheflush , 3)
1920 MIPS_SYS(sys_cachectl , 3)
1921 MIPS_SYS(sys_sysmips , 4)
1922 MIPS_SYS(sys_ni_syscall , 0)
1923 MIPS_SYS(sys_getsid , 1)
1924 MIPS_SYS(sys_fdatasync , 0)
1925 MIPS_SYS(sys_sysctl , 1)
1926 MIPS_SYS(sys_mlock , 2)
1927 MIPS_SYS(sys_munlock , 2)
1928 MIPS_SYS(sys_mlockall , 1)
1929 MIPS_SYS(sys_munlockall , 0)
1930 MIPS_SYS(sys_sched_setparam, 2)
1931 MIPS_SYS(sys_sched_getparam, 2)
1932 MIPS_SYS(sys_sched_setscheduler, 3)
1933 MIPS_SYS(sys_sched_getscheduler, 1)
1934 MIPS_SYS(sys_sched_yield , 0)
1935 MIPS_SYS(sys_sched_get_priority_max, 1)
1936 MIPS_SYS(sys_sched_get_priority_min, 1)
1937 MIPS_SYS(sys_sched_rr_get_interval, 2)
1938 MIPS_SYS(sys_nanosleep, 2)
1939 MIPS_SYS(sys_mremap , 5)
1940 MIPS_SYS(sys_accept , 3)
1941 MIPS_SYS(sys_bind , 3)
1942 MIPS_SYS(sys_connect , 3)
1943 MIPS_SYS(sys_getpeername , 3)
1944 MIPS_SYS(sys_getsockname , 3)
1945 MIPS_SYS(sys_getsockopt , 5)
1946 MIPS_SYS(sys_listen , 2)
1947 MIPS_SYS(sys_recv , 4)
1948 MIPS_SYS(sys_recvfrom , 6)
1949 MIPS_SYS(sys_recvmsg , 3)
1950 MIPS_SYS(sys_send , 4)
1951 MIPS_SYS(sys_sendmsg , 3)
1952 MIPS_SYS(sys_sendto , 6)
1953 MIPS_SYS(sys_setsockopt , 5)
1954 MIPS_SYS(sys_shutdown , 2)
1955 MIPS_SYS(sys_socket , 3)
1956 MIPS_SYS(sys_socketpair , 4)
1957 MIPS_SYS(sys_setresuid , 3)
1958 MIPS_SYS(sys_getresuid , 3)
1959 MIPS_SYS(sys_ni_syscall , 0)
1960 MIPS_SYS(sys_poll , 3)
1961 MIPS_SYS(sys_nfsservctl , 3)
1962 MIPS_SYS(sys_setresgid , 3)
1963 MIPS_SYS(sys_getresgid , 3)
1964 MIPS_SYS(sys_prctl , 5)
1965 MIPS_SYS(sys_rt_sigreturn, 0)
1966 MIPS_SYS(sys_rt_sigaction, 4)
1967 MIPS_SYS(sys_rt_sigprocmask, 4)
1968 MIPS_SYS(sys_rt_sigpending, 2)
1969 MIPS_SYS(sys_rt_sigtimedwait, 4)
1970 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1971 MIPS_SYS(sys_rt_sigsuspend, 0)
1972 MIPS_SYS(sys_pread64 , 6)
1973 MIPS_SYS(sys_pwrite64 , 6)
1974 MIPS_SYS(sys_chown , 3)
1975 MIPS_SYS(sys_getcwd , 2)
1976 MIPS_SYS(sys_capget , 2)
1977 MIPS_SYS(sys_capset , 2)
1978 MIPS_SYS(sys_sigaltstack , 2)
1979 MIPS_SYS(sys_sendfile , 4)
1980 MIPS_SYS(sys_ni_syscall , 0)
1981 MIPS_SYS(sys_ni_syscall , 0)
1982 MIPS_SYS(sys_mmap2 , 6)
1983 MIPS_SYS(sys_truncate64 , 4)
1984 MIPS_SYS(sys_ftruncate64 , 4)
1985 MIPS_SYS(sys_stat64 , 2)
1986 MIPS_SYS(sys_lstat64 , 2)
1987 MIPS_SYS(sys_fstat64 , 2)
1988 MIPS_SYS(sys_pivot_root , 2)
1989 MIPS_SYS(sys_mincore , 3)
1990 MIPS_SYS(sys_madvise , 3)
1991 MIPS_SYS(sys_getdents64 , 3)
1992 MIPS_SYS(sys_fcntl64 , 3)
1993 MIPS_SYS(sys_ni_syscall , 0)
1994 MIPS_SYS(sys_gettid , 0)
1995 MIPS_SYS(sys_readahead , 5)
1996 MIPS_SYS(sys_setxattr , 5)
1997 MIPS_SYS(sys_lsetxattr , 5)
1998 MIPS_SYS(sys_fsetxattr , 5)
1999 MIPS_SYS(sys_getxattr , 4)
2000 MIPS_SYS(sys_lgetxattr , 4)
2001 MIPS_SYS(sys_fgetxattr , 4)
2002 MIPS_SYS(sys_listxattr , 3)
2003 MIPS_SYS(sys_llistxattr , 3)
2004 MIPS_SYS(sys_flistxattr , 3)
2005 MIPS_SYS(sys_removexattr , 2)
2006 MIPS_SYS(sys_lremovexattr, 2)
2007 MIPS_SYS(sys_fremovexattr, 2)
2008 MIPS_SYS(sys_tkill , 2)
2009 MIPS_SYS(sys_sendfile64 , 5)
2010 MIPS_SYS(sys_futex , 6)
2011 MIPS_SYS(sys_sched_setaffinity, 3)
2012 MIPS_SYS(sys_sched_getaffinity, 3)
2013 MIPS_SYS(sys_io_setup , 2)
2014 MIPS_SYS(sys_io_destroy , 1)
2015 MIPS_SYS(sys_io_getevents, 5)
2016 MIPS_SYS(sys_io_submit , 3)
2017 MIPS_SYS(sys_io_cancel , 3)
2018 MIPS_SYS(sys_exit_group , 1)
2019 MIPS_SYS(sys_lookup_dcookie, 3)
2020 MIPS_SYS(sys_epoll_create, 1)
2021 MIPS_SYS(sys_epoll_ctl , 4)
2022 MIPS_SYS(sys_epoll_wait , 3)
2023 MIPS_SYS(sys_remap_file_pages, 5)
2024 MIPS_SYS(sys_set_tid_address, 1)
2025 MIPS_SYS(sys_restart_syscall, 0)
2026 MIPS_SYS(sys_fadvise64_64, 7)
2027 MIPS_SYS(sys_statfs64 , 3)
2028 MIPS_SYS(sys_fstatfs64 , 2)
2029 MIPS_SYS(sys_timer_create, 3)
2030 MIPS_SYS(sys_timer_settime, 4)
2031 MIPS_SYS(sys_timer_gettime, 2)
2032 MIPS_SYS(sys_timer_getoverrun, 1)
2033 MIPS_SYS(sys_timer_delete, 1)
2034 MIPS_SYS(sys_clock_settime, 2)
2035 MIPS_SYS(sys_clock_gettime, 2)
2036 MIPS_SYS(sys_clock_getres, 2)
2037 MIPS_SYS(sys_clock_nanosleep, 4)
2038 MIPS_SYS(sys_tgkill , 3)
2039 MIPS_SYS(sys_utimes , 2)
2040 MIPS_SYS(sys_mbind , 4)
2041 MIPS_SYS(sys_ni_syscall , 0)
2042 MIPS_SYS(sys_ni_syscall , 0)
2043 MIPS_SYS(sys_mq_open , 4)
2044 MIPS_SYS(sys_mq_unlink , 1)
2045 MIPS_SYS(sys_mq_timedsend, 5)
2046 MIPS_SYS(sys_mq_timedreceive, 5)
2047 MIPS_SYS(sys_mq_notify , 2)
2048 MIPS_SYS(sys_mq_getsetattr, 3)
2049 MIPS_SYS(sys_ni_syscall , 0)
2050 MIPS_SYS(sys_waitid , 4)
2051 MIPS_SYS(sys_ni_syscall , 0)
2052 MIPS_SYS(sys_add_key , 5)
2053 MIPS_SYS(sys_request_key, 4)
2054 MIPS_SYS(sys_keyctl , 5)
2055 MIPS_SYS(sys_set_thread_area, 1)
2056 MIPS_SYS(sys_inotify_init, 0)
2057 MIPS_SYS(sys_inotify_add_watch, 3)
2058 MIPS_SYS(sys_inotify_rm_watch, 2)
2059 MIPS_SYS(sys_migrate_pages, 4)
2060 MIPS_SYS(sys_openat, 4)
2061 MIPS_SYS(sys_mkdirat, 3)
2062 MIPS_SYS(sys_mknodat, 4)
2063 MIPS_SYS(sys_fchownat, 5)
2064 MIPS_SYS(sys_futimesat, 3)
2065 MIPS_SYS(sys_fstatat64, 4)
2066 MIPS_SYS(sys_unlinkat, 3)
2067 MIPS_SYS(sys_renameat, 4)
2068 MIPS_SYS(sys_linkat, 5)
2069 MIPS_SYS(sys_symlinkat, 3)
2070 MIPS_SYS(sys_readlinkat, 4)
2071 MIPS_SYS(sys_fchmodat, 3)
2072 MIPS_SYS(sys_faccessat, 3)
2073 MIPS_SYS(sys_pselect6, 6)
2074 MIPS_SYS(sys_ppoll, 5)
2075 MIPS_SYS(sys_unshare, 1)
2076 MIPS_SYS(sys_splice, 6)
2077 MIPS_SYS(sys_sync_file_range, 7)
2078 MIPS_SYS(sys_tee, 4)
2079 MIPS_SYS(sys_vmsplice, 4)
2080 MIPS_SYS(sys_move_pages, 6)
2081 MIPS_SYS(sys_set_robust_list, 2)
2082 MIPS_SYS(sys_get_robust_list, 3)
2083 MIPS_SYS(sys_kexec_load, 4)
2084 MIPS_SYS(sys_getcpu, 3)
2085 MIPS_SYS(sys_epoll_pwait, 6)
2086 MIPS_SYS(sys_ioprio_set, 3)
2087 MIPS_SYS(sys_ioprio_get, 2)
2088 MIPS_SYS(sys_utimensat, 4)
2089 MIPS_SYS(sys_signalfd, 3)
2090 MIPS_SYS(sys_ni_syscall, 0)
2091 MIPS_SYS(sys_eventfd, 1)
2092 MIPS_SYS(sys_fallocate, 6)
2093 MIPS_SYS(sys_timerfd_create, 2)
2094 MIPS_SYS(sys_timerfd_gettime, 2)
2095 MIPS_SYS(sys_timerfd_settime, 4)
2096 MIPS_SYS(sys_signalfd4, 4)
2097 MIPS_SYS(sys_eventfd2, 2)
2098 MIPS_SYS(sys_epoll_create1, 1)
2099 MIPS_SYS(sys_dup3, 3)
2100 MIPS_SYS(sys_pipe2, 2)
2101 MIPS_SYS(sys_inotify_init1, 1)
2102 MIPS_SYS(sys_preadv, 5)
2103 MIPS_SYS(sys_pwritev, 5)
2104 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2105 MIPS_SYS(sys_perf_event_open, 5)
2106 MIPS_SYS(sys_accept4, 4)
2107 MIPS_SYS(sys_recvmmsg, 5)
2108 MIPS_SYS(sys_fanotify_init, 2)
2109 MIPS_SYS(sys_fanotify_mark, 6)
2110 MIPS_SYS(sys_prlimit64, 4)
2111 MIPS_SYS(sys_name_to_handle_at, 5)
2112 MIPS_SYS(sys_open_by_handle_at, 3)
2113 MIPS_SYS(sys_clock_adjtime, 2)
2114 MIPS_SYS(sys_syncfs, 1)
2115 MIPS_SYS(sys_sendmmsg, 4)
2116 MIPS_SYS(sys_setns, 2)
2117 MIPS_SYS(sys_process_vm_readv, 6)
2118 MIPS_SYS(sys_process_vm_writev, 6)
2119 MIPS_SYS(sys_kcmp, 5)
2120 MIPS_SYS(sys_finit_module, 3)
2121 MIPS_SYS(sys_sched_setattr, 2)
2122 MIPS_SYS(sys_sched_getattr, 3)
2123 MIPS_SYS(sys_renameat2, 5)
2124 MIPS_SYS(sys_seccomp, 3)
2125 MIPS_SYS(sys_getrandom, 3)
2126 MIPS_SYS(sys_memfd_create, 2)
2127 MIPS_SYS(sys_bpf, 3)
2128 MIPS_SYS(sys_execveat, 5)
2129 MIPS_SYS(sys_userfaultfd, 1)
2130 MIPS_SYS(sys_membarrier, 2)
2131 MIPS_SYS(sys_mlock2, 3)
2132 MIPS_SYS(sys_copy_file_range, 6)
2133 MIPS_SYS(sys_preadv2, 6)
2134 MIPS_SYS(sys_pwritev2, 6)
2135};
2136# undef MIPS_SYS
2137# endif
2138
2139static int do_store_exclusive(CPUMIPSState *env)
2140{
2141 target_ulong addr;
2142 target_ulong page_addr;
2143 target_ulong val;
2144 int flags;
2145 int segv = 0;
2146 int reg;
2147 int d;
2148
2149 addr = env->lladdr;
2150 page_addr = addr & TARGET_PAGE_MASK;
2151 start_exclusive();
2152 mmap_lock();
2153 flags = page_get_flags(page_addr);
2154 if ((flags & PAGE_READ) == 0) {
2155 segv = 1;
2156 } else {
2157 reg = env->llreg & 0x1f;
2158 d = (env->llreg & 0x20) != 0;
2159 if (d) {
2160 segv = get_user_s64(val, addr);
2161 } else {
2162 segv = get_user_s32(val, addr);
2163 }
2164 if (!segv) {
2165 if (val != env->llval) {
2166 env->active_tc.gpr[reg] = 0;
2167 } else {
2168 if (d) {
2169 segv = put_user_u64(env->llnewval, addr);
2170 } else {
2171 segv = put_user_u32(env->llnewval, addr);
2172 }
2173 if (!segv) {
2174 env->active_tc.gpr[reg] = 1;
2175 }
2176 }
2177 }
2178 }
2179 env->lladdr = -1;
2180 if (!segv) {
2181 env->active_tc.PC += 4;
2182 }
2183 mmap_unlock();
2184 end_exclusive();
2185 return segv;
2186}
2187
2188
2189enum {
2190 BRK_OVERFLOW = 6,
2191 BRK_DIVZERO = 7
2192};
2193
2194static int do_break(CPUMIPSState *env, target_siginfo_t *info,
2195 unsigned int code)
2196{
2197 int ret = -1;
2198
2199 switch (code) {
2200 case BRK_OVERFLOW:
2201 case BRK_DIVZERO:
2202 info->si_signo = TARGET_SIGFPE;
2203 info->si_errno = 0;
2204 info->si_code = (code == BRK_OVERFLOW) ? FPE_INTOVF : FPE_INTDIV;
2205 queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info);
2206 ret = 0;
2207 break;
2208 default:
2209 info->si_signo = TARGET_SIGTRAP;
2210 info->si_errno = 0;
2211 queue_signal(env, info->si_signo, QEMU_SI_FAULT, &*info);
2212 ret = 0;
2213 break;
2214 }
2215
2216 return ret;
2217}
2218
2219void cpu_loop(CPUMIPSState *env)
2220{
2221 CPUState *cs = CPU(mips_env_get_cpu(env));
2222 target_siginfo_t info;
2223 int trapnr;
2224 abi_long ret;
2225# ifdef TARGET_ABI_MIPSO32
2226 unsigned int syscall_num;
2227# endif
2228
2229 for(;;) {
2230 cpu_exec_start(cs);
2231 trapnr = cpu_exec(cs);
2232 cpu_exec_end(cs);
2233 process_queued_cpu_work(cs);
2234
2235 switch(trapnr) {
2236 case EXCP_SYSCALL:
2237 env->active_tc.PC += 4;
2238# ifdef TARGET_ABI_MIPSO32
2239 syscall_num = env->active_tc.gpr[2] - 4000;
2240 if (syscall_num >= sizeof(mips_syscall_args)) {
2241 ret = -TARGET_ENOSYS;
2242 } else {
2243 int nb_args;
2244 abi_ulong sp_reg;
2245 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
2246
2247 nb_args = mips_syscall_args[syscall_num];
2248 sp_reg = env->active_tc.gpr[29];
2249 switch (nb_args) {
2250
2251 case 8:
2252 if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
2253 goto done_syscall;
2254 }
2255 case 7:
2256 if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
2257 goto done_syscall;
2258 }
2259 case 6:
2260 if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
2261 goto done_syscall;
2262 }
2263 case 5:
2264 if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
2265 goto done_syscall;
2266 }
2267 default:
2268 break;
2269 }
2270 ret = do_syscall(env, env->active_tc.gpr[2],
2271 env->active_tc.gpr[4],
2272 env->active_tc.gpr[5],
2273 env->active_tc.gpr[6],
2274 env->active_tc.gpr[7],
2275 arg5, arg6, arg7, arg8);
2276 }
2277done_syscall:
2278# else
2279 ret = do_syscall(env, env->active_tc.gpr[2],
2280 env->active_tc.gpr[4], env->active_tc.gpr[5],
2281 env->active_tc.gpr[6], env->active_tc.gpr[7],
2282 env->active_tc.gpr[8], env->active_tc.gpr[9],
2283 env->active_tc.gpr[10], env->active_tc.gpr[11]);
2284# endif
2285 if (ret == -TARGET_ERESTARTSYS) {
2286 env->active_tc.PC -= 4;
2287 break;
2288 }
2289 if (ret == -TARGET_QEMU_ESIGRETURN) {
2290
2291
2292 break;
2293 }
2294 if ((abi_ulong)ret >= (abi_ulong)-1133) {
2295 env->active_tc.gpr[7] = 1;
2296 ret = -ret;
2297 } else {
2298 env->active_tc.gpr[7] = 0;
2299 }
2300 env->active_tc.gpr[2] = ret;
2301 break;
2302 case EXCP_TLBL:
2303 case EXCP_TLBS:
2304 case EXCP_AdEL:
2305 case EXCP_AdES:
2306 info.si_signo = TARGET_SIGSEGV;
2307 info.si_errno = 0;
2308
2309 info.si_code = TARGET_SEGV_MAPERR;
2310 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2311 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2312 break;
2313 case EXCP_CpU:
2314 case EXCP_RI:
2315 info.si_signo = TARGET_SIGILL;
2316 info.si_errno = 0;
2317 info.si_code = 0;
2318 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2319 break;
2320 case EXCP_INTERRUPT:
2321
2322 break;
2323 case EXCP_DEBUG:
2324 {
2325 int sig;
2326
2327 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
2328 if (sig)
2329 {
2330 info.si_signo = sig;
2331 info.si_errno = 0;
2332 info.si_code = TARGET_TRAP_BRKPT;
2333 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2334 }
2335 }
2336 break;
2337 case EXCP_SC:
2338 if (do_store_exclusive(env)) {
2339 info.si_signo = TARGET_SIGSEGV;
2340 info.si_errno = 0;
2341 info.si_code = TARGET_SEGV_MAPERR;
2342 info._sifields._sigfault._addr = env->active_tc.PC;
2343 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2344 }
2345 break;
2346 case EXCP_DSPDIS:
2347 info.si_signo = TARGET_SIGILL;
2348 info.si_errno = 0;
2349 info.si_code = TARGET_ILL_ILLOPC;
2350 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2351 break;
2352
2353
2354
2355 case EXCP_BREAK:
2356 {
2357 abi_ulong trap_instr;
2358 unsigned int code;
2359
2360 if (env->hflags & MIPS_HFLAG_M16) {
2361 if (env->insn_flags & ASE_MICROMIPS) {
2362
2363 ret = get_user_u16(trap_instr, env->active_tc.PC);
2364 if (ret != 0) {
2365 goto error;
2366 }
2367
2368 if ((trap_instr >> 10) == 0x11) {
2369
2370 code = trap_instr & 0xf;
2371 } else {
2372
2373 abi_ulong instr_lo;
2374
2375 ret = get_user_u16(instr_lo,
2376 env->active_tc.PC + 2);
2377 if (ret != 0) {
2378 goto error;
2379 }
2380 trap_instr = (trap_instr << 16) | instr_lo;
2381 code = ((trap_instr >> 6) & ((1 << 20) - 1));
2382
2383
2384 if (code >= (1 << 10)) {
2385 code >>= 10;
2386 }
2387 }
2388 } else {
2389
2390 ret = get_user_u16(trap_instr, env->active_tc.PC);
2391 if (ret != 0) {
2392 goto error;
2393 }
2394 code = (trap_instr >> 6) & 0x3f;
2395 }
2396 } else {
2397 ret = get_user_u32(trap_instr, env->active_tc.PC);
2398 if (ret != 0) {
2399 goto error;
2400 }
2401
2402
2403
2404
2405
2406 code = ((trap_instr >> 6) & ((1 << 20) - 1));
2407 if (code >= (1 << 10)) {
2408 code >>= 10;
2409 }
2410 }
2411
2412 if (do_break(env, &info, code) != 0) {
2413 goto error;
2414 }
2415 }
2416 break;
2417 case EXCP_TRAP:
2418 {
2419 abi_ulong trap_instr;
2420 unsigned int code = 0;
2421
2422 if (env->hflags & MIPS_HFLAG_M16) {
2423
2424 abi_ulong instr[2];
2425
2426 ret = get_user_u16(instr[0], env->active_tc.PC) ||
2427 get_user_u16(instr[1], env->active_tc.PC + 2);
2428
2429 trap_instr = (instr[0] << 16) | instr[1];
2430 } else {
2431 ret = get_user_u32(trap_instr, env->active_tc.PC);
2432 }
2433
2434 if (ret != 0) {
2435 goto error;
2436 }
2437
2438
2439 if (!(trap_instr & 0xFC000000)) {
2440 if (env->hflags & MIPS_HFLAG_M16) {
2441
2442 code = ((trap_instr >> 12) & ((1 << 4) - 1));
2443 } else {
2444 code = ((trap_instr >> 6) & ((1 << 10) - 1));
2445 }
2446 }
2447
2448 if (do_break(env, &info, code) != 0) {
2449 goto error;
2450 }
2451 }
2452 break;
2453 case EXCP_ATOMIC:
2454 cpu_exec_step_atomic(cs);
2455 break;
2456 default:
2457error:
2458 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
2459 abort();
2460 }
2461 process_pending_signals(env);
2462 }
2463}
2464#endif
2465
2466#ifdef TARGET_OPENRISC
2467
2468void cpu_loop(CPUOpenRISCState *env)
2469{
2470 CPUState *cs = CPU(openrisc_env_get_cpu(env));
2471 int trapnr, gdbsig;
2472 abi_long ret;
2473
2474 for (;;) {
2475 cpu_exec_start(cs);
2476 trapnr = cpu_exec(cs);
2477 cpu_exec_end(cs);
2478 process_queued_cpu_work(cs);
2479 gdbsig = 0;
2480
2481 switch (trapnr) {
2482 case EXCP_RESET:
2483 qemu_log_mask(CPU_LOG_INT, "\nReset request, exit, pc is %#x\n", env->pc);
2484 exit(EXIT_FAILURE);
2485 break;
2486 case EXCP_BUSERR:
2487 qemu_log_mask(CPU_LOG_INT, "\nBus error, exit, pc is %#x\n", env->pc);
2488 gdbsig = TARGET_SIGBUS;
2489 break;
2490 case EXCP_DPF:
2491 case EXCP_IPF:
2492 cpu_dump_state(cs, stderr, fprintf, 0);
2493 gdbsig = TARGET_SIGSEGV;
2494 break;
2495 case EXCP_TICK:
2496 qemu_log_mask(CPU_LOG_INT, "\nTick time interrupt pc is %#x\n", env->pc);
2497 break;
2498 case EXCP_ALIGN:
2499 qemu_log_mask(CPU_LOG_INT, "\nAlignment pc is %#x\n", env->pc);
2500 gdbsig = TARGET_SIGBUS;
2501 break;
2502 case EXCP_ILLEGAL:
2503 qemu_log_mask(CPU_LOG_INT, "\nIllegal instructionpc is %#x\n", env->pc);
2504 gdbsig = TARGET_SIGILL;
2505 break;
2506 case EXCP_INT:
2507 qemu_log_mask(CPU_LOG_INT, "\nExternal interruptpc is %#x\n", env->pc);
2508 break;
2509 case EXCP_DTLBMISS:
2510 case EXCP_ITLBMISS:
2511 qemu_log_mask(CPU_LOG_INT, "\nTLB miss\n");
2512 break;
2513 case EXCP_RANGE:
2514 qemu_log_mask(CPU_LOG_INT, "\nRange\n");
2515 gdbsig = TARGET_SIGSEGV;
2516 break;
2517 case EXCP_SYSCALL:
2518 env->pc += 4;
2519 ret = do_syscall(env,
2520 env->gpr[11],
2521 env->gpr[3],
2522 env->gpr[4],
2523 env->gpr[5],
2524 env->gpr[6],
2525 env->gpr[7],
2526 env->gpr[8], 0, 0);
2527 if (ret == -TARGET_ERESTARTSYS) {
2528 env->pc -= 4;
2529 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2530 env->gpr[11] = ret;
2531 }
2532 break;
2533 case EXCP_FPE:
2534 qemu_log_mask(CPU_LOG_INT, "\nFloating point error\n");
2535 break;
2536 case EXCP_TRAP:
2537 qemu_log_mask(CPU_LOG_INT, "\nTrap\n");
2538 gdbsig = TARGET_SIGTRAP;
2539 break;
2540 case EXCP_NR:
2541 qemu_log_mask(CPU_LOG_INT, "\nNR\n");
2542 break;
2543 case EXCP_ATOMIC:
2544 cpu_exec_step_atomic(cs);
2545 break;
2546 default:
2547 EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
2548 trapnr);
2549 gdbsig = TARGET_SIGILL;
2550 break;
2551 }
2552 if (gdbsig) {
2553 gdb_handlesig(cs, gdbsig);
2554 if (gdbsig != TARGET_SIGTRAP) {
2555 exit(EXIT_FAILURE);
2556 }
2557 }
2558
2559 process_pending_signals(env);
2560 }
2561}
2562
2563#endif
2564
2565#ifdef TARGET_SH4
2566void cpu_loop(CPUSH4State *env)
2567{
2568 CPUState *cs = CPU(sh_env_get_cpu(env));
2569 int trapnr, ret;
2570 target_siginfo_t info;
2571
2572 while (1) {
2573 cpu_exec_start(cs);
2574 trapnr = cpu_exec(cs);
2575 cpu_exec_end(cs);
2576 process_queued_cpu_work(cs);
2577
2578 switch (trapnr) {
2579 case 0x160:
2580 env->pc += 2;
2581 ret = do_syscall(env,
2582 env->gregs[3],
2583 env->gregs[4],
2584 env->gregs[5],
2585 env->gregs[6],
2586 env->gregs[7],
2587 env->gregs[0],
2588 env->gregs[1],
2589 0, 0);
2590 if (ret == -TARGET_ERESTARTSYS) {
2591 env->pc -= 2;
2592 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2593 env->gregs[0] = ret;
2594 }
2595 break;
2596 case EXCP_INTERRUPT:
2597
2598 break;
2599 case EXCP_DEBUG:
2600 {
2601 int sig;
2602
2603 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
2604 if (sig)
2605 {
2606 info.si_signo = sig;
2607 info.si_errno = 0;
2608 info.si_code = TARGET_TRAP_BRKPT;
2609 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2610 }
2611 }
2612 break;
2613 case 0xa0:
2614 case 0xc0:
2615 info.si_signo = TARGET_SIGSEGV;
2616 info.si_errno = 0;
2617 info.si_code = TARGET_SEGV_MAPERR;
2618 info._sifields._sigfault._addr = env->tea;
2619 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2620 break;
2621
2622 case EXCP_ATOMIC:
2623 cpu_exec_step_atomic(cs);
2624 break;
2625 default:
2626 printf ("Unhandled trap: 0x%x\n", trapnr);
2627 cpu_dump_state(cs, stderr, fprintf, 0);
2628 exit(EXIT_FAILURE);
2629 }
2630 process_pending_signals (env);
2631 }
2632}
2633#endif
2634
2635#ifdef TARGET_CRIS
2636void cpu_loop(CPUCRISState *env)
2637{
2638 CPUState *cs = CPU(cris_env_get_cpu(env));
2639 int trapnr, ret;
2640 target_siginfo_t info;
2641
2642 while (1) {
2643 cpu_exec_start(cs);
2644 trapnr = cpu_exec(cs);
2645 cpu_exec_end(cs);
2646 process_queued_cpu_work(cs);
2647
2648 switch (trapnr) {
2649 case 0xaa:
2650 {
2651 info.si_signo = TARGET_SIGSEGV;
2652 info.si_errno = 0;
2653
2654 info.si_code = TARGET_SEGV_MAPERR;
2655 info._sifields._sigfault._addr = env->pregs[PR_EDA];
2656 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2657 }
2658 break;
2659 case EXCP_INTERRUPT:
2660
2661 break;
2662 case EXCP_BREAK:
2663 ret = do_syscall(env,
2664 env->regs[9],
2665 env->regs[10],
2666 env->regs[11],
2667 env->regs[12],
2668 env->regs[13],
2669 env->pregs[7],
2670 env->pregs[11],
2671 0, 0);
2672 if (ret == -TARGET_ERESTARTSYS) {
2673 env->pc -= 2;
2674 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2675 env->regs[10] = ret;
2676 }
2677 break;
2678 case EXCP_DEBUG:
2679 {
2680 int sig;
2681
2682 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
2683 if (sig)
2684 {
2685 info.si_signo = sig;
2686 info.si_errno = 0;
2687 info.si_code = TARGET_TRAP_BRKPT;
2688 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2689 }
2690 }
2691 break;
2692 case EXCP_ATOMIC:
2693 cpu_exec_step_atomic(cs);
2694 break;
2695 default:
2696 printf ("Unhandled trap: 0x%x\n", trapnr);
2697 cpu_dump_state(cs, stderr, fprintf, 0);
2698 exit(EXIT_FAILURE);
2699 }
2700 process_pending_signals (env);
2701 }
2702}
2703#endif
2704
2705#ifdef TARGET_MICROBLAZE
2706void cpu_loop(CPUMBState *env)
2707{
2708 CPUState *cs = CPU(mb_env_get_cpu(env));
2709 int trapnr, ret;
2710 target_siginfo_t info;
2711
2712 while (1) {
2713 cpu_exec_start(cs);
2714 trapnr = cpu_exec(cs);
2715 cpu_exec_end(cs);
2716 process_queued_cpu_work(cs);
2717
2718 switch (trapnr) {
2719 case 0xaa:
2720 {
2721 info.si_signo = TARGET_SIGSEGV;
2722 info.si_errno = 0;
2723
2724 info.si_code = TARGET_SEGV_MAPERR;
2725 info._sifields._sigfault._addr = 0;
2726 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2727 }
2728 break;
2729 case EXCP_INTERRUPT:
2730
2731 break;
2732 case EXCP_BREAK:
2733
2734 env->regs[14] += 4;
2735 env->sregs[SR_PC] = env->regs[14];
2736 ret = do_syscall(env,
2737 env->regs[12],
2738 env->regs[5],
2739 env->regs[6],
2740 env->regs[7],
2741 env->regs[8],
2742 env->regs[9],
2743 env->regs[10],
2744 0, 0);
2745 if (ret == -TARGET_ERESTARTSYS) {
2746
2747 env->sregs[SR_PC] -= 4;
2748 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2749 env->regs[3] = ret;
2750 }
2751
2752
2753
2754
2755
2756
2757 env->regs[14] = env->sregs[SR_PC];
2758 break;
2759 case EXCP_HW_EXCP:
2760 env->regs[17] = env->sregs[SR_PC] + 4;
2761 if (env->iflags & D_FLAG) {
2762 env->sregs[SR_ESR] |= 1 << 12;
2763 env->sregs[SR_PC] -= 4;
2764
2765 }
2766
2767 env->iflags &= ~(IMM_FLAG | D_FLAG);
2768
2769 switch (env->sregs[SR_ESR] & 31) {
2770 case ESR_EC_DIVZERO:
2771 info.si_signo = TARGET_SIGFPE;
2772 info.si_errno = 0;
2773 info.si_code = TARGET_FPE_FLTDIV;
2774 info._sifields._sigfault._addr = 0;
2775 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2776 break;
2777 case ESR_EC_FPU:
2778 info.si_signo = TARGET_SIGFPE;
2779 info.si_errno = 0;
2780 if (env->sregs[SR_FSR] & FSR_IO) {
2781 info.si_code = TARGET_FPE_FLTINV;
2782 }
2783 if (env->sregs[SR_FSR] & FSR_DZ) {
2784 info.si_code = TARGET_FPE_FLTDIV;
2785 }
2786 info._sifields._sigfault._addr = 0;
2787 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2788 break;
2789 default:
2790 printf ("Unhandled hw-exception: 0x%x\n",
2791 env->sregs[SR_ESR] & ESR_EC_MASK);
2792 cpu_dump_state(cs, stderr, fprintf, 0);
2793 exit(EXIT_FAILURE);
2794 break;
2795 }
2796 break;
2797 case EXCP_DEBUG:
2798 {
2799 int sig;
2800
2801 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
2802 if (sig)
2803 {
2804 info.si_signo = sig;
2805 info.si_errno = 0;
2806 info.si_code = TARGET_TRAP_BRKPT;
2807 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2808 }
2809 }
2810 break;
2811 case EXCP_ATOMIC:
2812 cpu_exec_step_atomic(cs);
2813 break;
2814 default:
2815 printf ("Unhandled trap: 0x%x\n", trapnr);
2816 cpu_dump_state(cs, stderr, fprintf, 0);
2817 exit(EXIT_FAILURE);
2818 }
2819 process_pending_signals (env);
2820 }
2821}
2822#endif
2823
2824#ifdef TARGET_M68K
2825
2826void cpu_loop(CPUM68KState *env)
2827{
2828 CPUState *cs = CPU(m68k_env_get_cpu(env));
2829 int trapnr;
2830 unsigned int n;
2831 target_siginfo_t info;
2832 TaskState *ts = cs->opaque;
2833
2834 for(;;) {
2835 cpu_exec_start(cs);
2836 trapnr = cpu_exec(cs);
2837 cpu_exec_end(cs);
2838 process_queued_cpu_work(cs);
2839
2840 switch(trapnr) {
2841 case EXCP_ILLEGAL:
2842 {
2843 if (ts->sim_syscalls) {
2844 uint16_t nr;
2845 get_user_u16(nr, env->pc + 2);
2846 env->pc += 4;
2847 do_m68k_simcall(env, nr);
2848 } else {
2849 goto do_sigill;
2850 }
2851 }
2852 break;
2853 case EXCP_HALT_INSN:
2854
2855 env->pc += 4;
2856 do_m68k_semihosting(env, env->dregs[0]);
2857 break;
2858 case EXCP_LINEA:
2859 case EXCP_LINEF:
2860 case EXCP_UNSUPPORTED:
2861 do_sigill:
2862 info.si_signo = TARGET_SIGILL;
2863 info.si_errno = 0;
2864 info.si_code = TARGET_ILL_ILLOPN;
2865 info._sifields._sigfault._addr = env->pc;
2866 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2867 break;
2868 case EXCP_TRAP0:
2869 {
2870 abi_long ret;
2871 ts->sim_syscalls = 0;
2872 n = env->dregs[0];
2873 env->pc += 2;
2874 ret = do_syscall(env,
2875 n,
2876 env->dregs[1],
2877 env->dregs[2],
2878 env->dregs[3],
2879 env->dregs[4],
2880 env->dregs[5],
2881 env->aregs[0],
2882 0, 0);
2883 if (ret == -TARGET_ERESTARTSYS) {
2884 env->pc -= 2;
2885 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
2886 env->dregs[0] = ret;
2887 }
2888 }
2889 break;
2890 case EXCP_INTERRUPT:
2891
2892 break;
2893 case EXCP_ACCESS:
2894 {
2895 info.si_signo = TARGET_SIGSEGV;
2896 info.si_errno = 0;
2897
2898 info.si_code = TARGET_SEGV_MAPERR;
2899 info._sifields._sigfault._addr = env->mmu.ar;
2900 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2901 }
2902 break;
2903 case EXCP_DEBUG:
2904 {
2905 int sig;
2906
2907 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
2908 if (sig)
2909 {
2910 info.si_signo = sig;
2911 info.si_errno = 0;
2912 info.si_code = TARGET_TRAP_BRKPT;
2913 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2914 }
2915 }
2916 break;
2917 case EXCP_ATOMIC:
2918 cpu_exec_step_atomic(cs);
2919 break;
2920 default:
2921 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
2922 abort();
2923 }
2924 process_pending_signals(env);
2925 }
2926}
2927#endif
2928
2929#ifdef TARGET_ALPHA
2930void cpu_loop(CPUAlphaState *env)
2931{
2932 CPUState *cs = CPU(alpha_env_get_cpu(env));
2933 int trapnr;
2934 target_siginfo_t info;
2935 abi_long sysret;
2936
2937 while (1) {
2938 cpu_exec_start(cs);
2939 trapnr = cpu_exec(cs);
2940 cpu_exec_end(cs);
2941 process_queued_cpu_work(cs);
2942
2943
2944
2945
2946 env->intr_flag = 0;
2947
2948 switch (trapnr) {
2949 case EXCP_RESET:
2950 fprintf(stderr, "Reset requested. Exit\n");
2951 exit(EXIT_FAILURE);
2952 break;
2953 case EXCP_MCHK:
2954 fprintf(stderr, "Machine check exception. Exit\n");
2955 exit(EXIT_FAILURE);
2956 break;
2957 case EXCP_SMP_INTERRUPT:
2958 case EXCP_CLK_INTERRUPT:
2959 case EXCP_DEV_INTERRUPT:
2960 fprintf(stderr, "External interrupt. Exit\n");
2961 exit(EXIT_FAILURE);
2962 break;
2963 case EXCP_MMFAULT:
2964 env->lock_addr = -1;
2965 info.si_signo = TARGET_SIGSEGV;
2966 info.si_errno = 0;
2967 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
2968 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
2969 info._sifields._sigfault._addr = env->trap_arg0;
2970 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2971 break;
2972 case EXCP_UNALIGN:
2973 env->lock_addr = -1;
2974 info.si_signo = TARGET_SIGBUS;
2975 info.si_errno = 0;
2976 info.si_code = TARGET_BUS_ADRALN;
2977 info._sifields._sigfault._addr = env->trap_arg0;
2978 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2979 break;
2980 case EXCP_OPCDEC:
2981 do_sigill:
2982 env->lock_addr = -1;
2983 info.si_signo = TARGET_SIGILL;
2984 info.si_errno = 0;
2985 info.si_code = TARGET_ILL_ILLOPC;
2986 info._sifields._sigfault._addr = env->pc;
2987 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2988 break;
2989 case EXCP_ARITH:
2990 env->lock_addr = -1;
2991 info.si_signo = TARGET_SIGFPE;
2992 info.si_errno = 0;
2993 info.si_code = TARGET_FPE_FLTINV;
2994 info._sifields._sigfault._addr = env->pc;
2995 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
2996 break;
2997 case EXCP_FEN:
2998
2999 break;
3000 case EXCP_CALL_PAL:
3001 env->lock_addr = -1;
3002 switch (env->error_code) {
3003 case 0x80:
3004
3005 info.si_signo = TARGET_SIGTRAP;
3006 info.si_errno = 0;
3007 info.si_code = TARGET_TRAP_BRKPT;
3008 info._sifields._sigfault._addr = env->pc;
3009 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3010 break;
3011 case 0x81:
3012
3013 info.si_signo = TARGET_SIGTRAP;
3014 info.si_errno = 0;
3015 info.si_code = 0;
3016 info._sifields._sigfault._addr = env->pc;
3017 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3018 break;
3019 case 0x83:
3020
3021 trapnr = env->ir[IR_V0];
3022 sysret = do_syscall(env, trapnr,
3023 env->ir[IR_A0], env->ir[IR_A1],
3024 env->ir[IR_A2], env->ir[IR_A3],
3025 env->ir[IR_A4], env->ir[IR_A5],
3026 0, 0);
3027 if (sysret == -TARGET_ERESTARTSYS) {
3028 env->pc -= 4;
3029 break;
3030 }
3031 if (sysret == -TARGET_QEMU_ESIGRETURN) {
3032 break;
3033 }
3034
3035
3036
3037 trapnr = (env->ir[IR_V0] != 0 && sysret < 0);
3038 env->ir[IR_V0] = (trapnr ? -sysret : sysret);
3039 env->ir[IR_A3] = trapnr;
3040 break;
3041 case 0x86:
3042
3043
3044
3045
3046
3047
3048 break;
3049 case 0x9E:
3050
3051
3052 abort();
3053 case 0x9F:
3054
3055
3056 abort();
3057 case 0xAA:
3058
3059 info.si_signo = TARGET_SIGFPE;
3060 switch (env->ir[IR_A0]) {
3061 case TARGET_GEN_INTOVF:
3062 info.si_code = TARGET_FPE_INTOVF;
3063 break;
3064 case TARGET_GEN_INTDIV:
3065 info.si_code = TARGET_FPE_INTDIV;
3066 break;
3067 case TARGET_GEN_FLTOVF:
3068 info.si_code = TARGET_FPE_FLTOVF;
3069 break;
3070 case TARGET_GEN_FLTUND:
3071 info.si_code = TARGET_FPE_FLTUND;
3072 break;
3073 case TARGET_GEN_FLTINV:
3074 info.si_code = TARGET_FPE_FLTINV;
3075 break;
3076 case TARGET_GEN_FLTINE:
3077 info.si_code = TARGET_FPE_FLTRES;
3078 break;
3079 case TARGET_GEN_ROPRAND:
3080 info.si_code = 0;
3081 break;
3082 default:
3083 info.si_signo = TARGET_SIGTRAP;
3084 info.si_code = 0;
3085 break;
3086 }
3087 info.si_errno = 0;
3088 info._sifields._sigfault._addr = env->pc;
3089 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3090 break;
3091 default:
3092 goto do_sigill;
3093 }
3094 break;
3095 case EXCP_DEBUG:
3096 info.si_signo = gdb_handlesig(cs, TARGET_SIGTRAP);
3097 if (info.si_signo) {
3098 env->lock_addr = -1;
3099 info.si_errno = 0;
3100 info.si_code = TARGET_TRAP_BRKPT;
3101 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3102 }
3103 break;
3104 case EXCP_INTERRUPT:
3105
3106 break;
3107 case EXCP_ATOMIC:
3108 cpu_exec_step_atomic(cs);
3109 break;
3110 default:
3111 printf ("Unhandled trap: 0x%x\n", trapnr);
3112 cpu_dump_state(cs, stderr, fprintf, 0);
3113 exit(EXIT_FAILURE);
3114 }
3115 process_pending_signals (env);
3116 }
3117}
3118#endif
3119
3120#ifdef TARGET_S390X
3121void cpu_loop(CPUS390XState *env)
3122{
3123 CPUState *cs = CPU(s390_env_get_cpu(env));
3124 int trapnr, n, sig;
3125 target_siginfo_t info;
3126 target_ulong addr;
3127 abi_long ret;
3128
3129 while (1) {
3130 cpu_exec_start(cs);
3131 trapnr = cpu_exec(cs);
3132 cpu_exec_end(cs);
3133 process_queued_cpu_work(cs);
3134
3135 switch (trapnr) {
3136 case EXCP_INTERRUPT:
3137
3138 break;
3139
3140 case EXCP_SVC:
3141 n = env->int_svc_code;
3142 if (!n) {
3143
3144 n = env->regs[1];
3145 }
3146 env->psw.addr += env->int_svc_ilen;
3147 ret = do_syscall(env, n, env->regs[2], env->regs[3],
3148 env->regs[4], env->regs[5],
3149 env->regs[6], env->regs[7], 0, 0);
3150 if (ret == -TARGET_ERESTARTSYS) {
3151 env->psw.addr -= env->int_svc_ilen;
3152 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
3153 env->regs[2] = ret;
3154 }
3155 break;
3156
3157 case EXCP_DEBUG:
3158 sig = gdb_handlesig(cs, TARGET_SIGTRAP);
3159 if (sig) {
3160 n = TARGET_TRAP_BRKPT;
3161 goto do_signal_pc;
3162 }
3163 break;
3164 case EXCP_PGM:
3165 n = env->int_pgm_code;
3166 switch (n) {
3167 case PGM_OPERATION:
3168 case PGM_PRIVILEGED:
3169 sig = TARGET_SIGILL;
3170 n = TARGET_ILL_ILLOPC;
3171 goto do_signal_pc;
3172 case PGM_PROTECTION:
3173 case PGM_ADDRESSING:
3174 sig = TARGET_SIGSEGV;
3175
3176 n = TARGET_SEGV_MAPERR;
3177 addr = env->__excp_addr;
3178 goto do_signal;
3179 case PGM_EXECUTE:
3180 case PGM_SPECIFICATION:
3181 case PGM_SPECIAL_OP:
3182 case PGM_OPERAND:
3183 do_sigill_opn:
3184 sig = TARGET_SIGILL;
3185 n = TARGET_ILL_ILLOPN;
3186 goto do_signal_pc;
3187
3188 case PGM_FIXPT_OVERFLOW:
3189 sig = TARGET_SIGFPE;
3190 n = TARGET_FPE_INTOVF;
3191 goto do_signal_pc;
3192 case PGM_FIXPT_DIVIDE:
3193 sig = TARGET_SIGFPE;
3194 n = TARGET_FPE_INTDIV;
3195 goto do_signal_pc;
3196
3197 case PGM_DATA:
3198 n = (env->fpc >> 8) & 0xff;
3199 if (n == 0xff) {
3200
3201 goto do_sigill_opn;
3202 } else {
3203
3204 if (n & 0x80) {
3205 n = TARGET_FPE_FLTINV;
3206 } else if (n & 0x40) {
3207 n = TARGET_FPE_FLTDIV;
3208 } else if (n & 0x20) {
3209 n = TARGET_FPE_FLTOVF;
3210 } else if (n & 0x10) {
3211 n = TARGET_FPE_FLTUND;
3212 } else if (n & 0x08) {
3213 n = TARGET_FPE_FLTRES;
3214 } else {
3215
3216 goto do_sigill_opn;
3217 }
3218 sig = TARGET_SIGFPE;
3219 goto do_signal_pc;
3220 }
3221
3222 default:
3223 fprintf(stderr, "Unhandled program exception: %#x\n", n);
3224 cpu_dump_state(cs, stderr, fprintf, 0);
3225 exit(EXIT_FAILURE);
3226 }
3227 break;
3228
3229 do_signal_pc:
3230 addr = env->psw.addr;
3231 do_signal:
3232 info.si_signo = sig;
3233 info.si_errno = 0;
3234 info.si_code = n;
3235 info._sifields._sigfault._addr = addr;
3236 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3237 break;
3238
3239 case EXCP_ATOMIC:
3240 cpu_exec_step_atomic(cs);
3241 break;
3242 default:
3243 fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
3244 cpu_dump_state(cs, stderr, fprintf, 0);
3245 exit(EXIT_FAILURE);
3246 }
3247 process_pending_signals (env);
3248 }
3249}
3250
3251#endif
3252
3253#ifdef TARGET_TILEGX
3254
3255static void gen_sigill_reg(CPUTLGState *env)
3256{
3257 target_siginfo_t info;
3258
3259 info.si_signo = TARGET_SIGILL;
3260 info.si_errno = 0;
3261 info.si_code = TARGET_ILL_PRVREG;
3262 info._sifields._sigfault._addr = env->pc;
3263 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3264}
3265
3266static void do_signal(CPUTLGState *env, int signo, int sigcode)
3267{
3268 target_siginfo_t info;
3269
3270 info.si_signo = signo;
3271 info.si_errno = 0;
3272 info._sifields._sigfault._addr = env->pc;
3273
3274 if (signo == TARGET_SIGSEGV) {
3275
3276
3277 target_ulong addr = env->excaddr;
3278 info._sifields._sigfault._addr = addr;
3279 if (page_check_range(addr, 1, PAGE_VALID) < 0) {
3280 sigcode = TARGET_SEGV_MAPERR;
3281 } else {
3282 sigcode = TARGET_SEGV_ACCERR;
3283 }
3284 }
3285 info.si_code = sigcode;
3286
3287 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
3288}
3289
3290static void gen_sigsegv_maperr(CPUTLGState *env, target_ulong addr)
3291{
3292 env->excaddr = addr;
3293 do_signal(env, TARGET_SIGSEGV, 0);
3294}
3295
3296static void set_regval(CPUTLGState *env, uint8_t reg, uint64_t val)
3297{
3298 if (unlikely(reg >= TILEGX_R_COUNT)) {
3299 switch (reg) {
3300 case TILEGX_R_SN:
3301 case TILEGX_R_ZERO:
3302 return;
3303 case TILEGX_R_IDN0:
3304 case TILEGX_R_IDN1:
3305 case TILEGX_R_UDN0:
3306 case TILEGX_R_UDN1:
3307 case TILEGX_R_UDN2:
3308 case TILEGX_R_UDN3:
3309 gen_sigill_reg(env);
3310 return;
3311 default:
3312 g_assert_not_reached();
3313 }
3314 }
3315 env->regs[reg] = val;
3316}
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344static void do_exch(CPUTLGState *env, bool quad, bool cmp)
3345{
3346 target_ulong addr;
3347 target_long val, sprval;
3348
3349 start_exclusive();
3350
3351 addr = env->atomic_srca;
3352 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
3353 goto sigsegv_maperr;
3354 }
3355
3356 if (cmp) {
3357 if (quad) {
3358 sprval = env->spregs[TILEGX_SPR_CMPEXCH];
3359 } else {
3360 sprval = sextract64(env->spregs[TILEGX_SPR_CMPEXCH], 0, 32);
3361 }
3362 }
3363
3364 if (!cmp || val == sprval) {
3365 target_long valb = env->atomic_srcb;
3366 if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
3367 goto sigsegv_maperr;
3368 }
3369 }
3370
3371 set_regval(env, env->atomic_dstr, val);
3372 end_exclusive();
3373 return;
3374
3375 sigsegv_maperr:
3376 end_exclusive();
3377 gen_sigsegv_maperr(env, addr);
3378}
3379
3380static void do_fetch(CPUTLGState *env, int trapnr, bool quad)
3381{
3382 int8_t write = 1;
3383 target_ulong addr;
3384 target_long val, valb;
3385
3386 start_exclusive();
3387
3388 addr = env->atomic_srca;
3389 valb = env->atomic_srcb;
3390 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
3391 goto sigsegv_maperr;
3392 }
3393
3394 switch (trapnr) {
3395 case TILEGX_EXCP_OPCODE_FETCHADD:
3396 case TILEGX_EXCP_OPCODE_FETCHADD4:
3397 valb += val;
3398 break;
3399 case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
3400 valb += val;
3401 if (valb < 0) {
3402 write = 0;
3403 }
3404 break;
3405 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
3406 valb += val;
3407 if ((int32_t)valb < 0) {
3408 write = 0;
3409 }
3410 break;
3411 case TILEGX_EXCP_OPCODE_FETCHAND:
3412 case TILEGX_EXCP_OPCODE_FETCHAND4:
3413 valb &= val;
3414 break;
3415 case TILEGX_EXCP_OPCODE_FETCHOR:
3416 case TILEGX_EXCP_OPCODE_FETCHOR4:
3417 valb |= val;
3418 break;
3419 default:
3420 g_assert_not_reached();
3421 }
3422
3423 if (write) {
3424 if (quad ? put_user_u64(valb, addr) : put_user_u32(valb, addr)) {
3425 goto sigsegv_maperr;
3426 }
3427 }
3428
3429 set_regval(env, env->atomic_dstr, val);
3430 end_exclusive();
3431 return;
3432
3433 sigsegv_maperr:
3434 end_exclusive();
3435 gen_sigsegv_maperr(env, addr);
3436}
3437
3438void cpu_loop(CPUTLGState *env)
3439{
3440 CPUState *cs = CPU(tilegx_env_get_cpu(env));
3441 int trapnr;
3442
3443 while (1) {
3444 cpu_exec_start(cs);
3445 trapnr = cpu_exec(cs);
3446 cpu_exec_end(cs);
3447 process_queued_cpu_work(cs);
3448
3449 switch (trapnr) {
3450 case TILEGX_EXCP_SYSCALL:
3451 {
3452 abi_ulong ret = do_syscall(env, env->regs[TILEGX_R_NR],
3453 env->regs[0], env->regs[1],
3454 env->regs[2], env->regs[3],
3455 env->regs[4], env->regs[5],
3456 env->regs[6], env->regs[7]);
3457 if (ret == -TARGET_ERESTARTSYS) {
3458 env->pc -= 8;
3459 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
3460 env->regs[TILEGX_R_RE] = ret;
3461 env->regs[TILEGX_R_ERR] = TILEGX_IS_ERRNO(ret) ? -ret : 0;
3462 }
3463 break;
3464 }
3465 case TILEGX_EXCP_OPCODE_EXCH:
3466 do_exch(env, true, false);
3467 break;
3468 case TILEGX_EXCP_OPCODE_EXCH4:
3469 do_exch(env, false, false);
3470 break;
3471 case TILEGX_EXCP_OPCODE_CMPEXCH:
3472 do_exch(env, true, true);
3473 break;
3474 case TILEGX_EXCP_OPCODE_CMPEXCH4:
3475 do_exch(env, false, true);
3476 break;
3477 case TILEGX_EXCP_OPCODE_FETCHADD:
3478 case TILEGX_EXCP_OPCODE_FETCHADDGEZ:
3479 case TILEGX_EXCP_OPCODE_FETCHAND:
3480 case TILEGX_EXCP_OPCODE_FETCHOR:
3481 do_fetch(env, trapnr, true);
3482 break;
3483 case TILEGX_EXCP_OPCODE_FETCHADD4:
3484 case TILEGX_EXCP_OPCODE_FETCHADDGEZ4:
3485 case TILEGX_EXCP_OPCODE_FETCHAND4:
3486 case TILEGX_EXCP_OPCODE_FETCHOR4:
3487 do_fetch(env, trapnr, false);
3488 break;
3489 case TILEGX_EXCP_SIGNAL:
3490 do_signal(env, env->signo, env->sigcode);
3491 break;
3492 case TILEGX_EXCP_REG_IDN_ACCESS:
3493 case TILEGX_EXCP_REG_UDN_ACCESS:
3494 gen_sigill_reg(env);
3495 break;
3496 case EXCP_ATOMIC:
3497 cpu_exec_step_atomic(cs);
3498 break;
3499 default:
3500 fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr);
3501 g_assert_not_reached();
3502 }
3503 process_pending_signals(env);
3504 }
3505}
3506
3507#endif
3508
3509THREAD CPUState *thread_cpu;
3510
3511bool qemu_cpu_is_self(CPUState *cpu)
3512{
3513 return thread_cpu == cpu;
3514}
3515
3516void qemu_cpu_kick(CPUState *cpu)
3517{
3518 cpu_exit(cpu);
3519}
3520
3521void task_settid(TaskState *ts)
3522{
3523 if (ts->ts_tid == 0) {
3524 ts->ts_tid = (pid_t)syscall(SYS_gettid);
3525 }
3526}
3527
3528void stop_all_tasks(void)
3529{
3530
3531
3532
3533
3534 start_exclusive();
3535}
3536
3537
3538void init_task_state(TaskState *ts)
3539{
3540 ts->used = 1;
3541}
3542
3543CPUArchState *cpu_copy(CPUArchState *env)
3544{
3545 CPUState *cpu = ENV_GET_CPU(env);
3546 CPUState *new_cpu = cpu_init(cpu_model);
3547 CPUArchState *new_env = new_cpu->env_ptr;
3548 CPUBreakpoint *bp;
3549 CPUWatchpoint *wp;
3550
3551
3552 cpu_reset(new_cpu);
3553
3554 memcpy(new_env, env, sizeof(CPUArchState));
3555
3556
3557
3558
3559 QTAILQ_INIT(&new_cpu->breakpoints);
3560 QTAILQ_INIT(&new_cpu->watchpoints);
3561 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
3562 cpu_breakpoint_insert(new_cpu, bp->pc, bp->flags, NULL);
3563 }
3564 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
3565 cpu_watchpoint_insert(new_cpu, wp->vaddr, wp->len, wp->flags, NULL);
3566 }
3567
3568 return new_env;
3569}
3570
3571static void handle_arg_help(const char *arg)
3572{
3573 usage(EXIT_SUCCESS);
3574}
3575
3576static void handle_arg_log(const char *arg)
3577{
3578 int mask;
3579
3580 mask = qemu_str_to_log_mask(arg);
3581 if (!mask) {
3582 qemu_print_log_usage(stdout);
3583 exit(EXIT_FAILURE);
3584 }
3585 qemu_log_needs_buffers();
3586 qemu_set_log(mask);
3587}
3588
3589static void handle_arg_log_filename(const char *arg)
3590{
3591 qemu_set_log_filename(arg, &error_fatal);
3592}
3593
3594static void handle_arg_set_env(const char *arg)
3595{
3596 char *r, *p, *token;
3597 r = p = strdup(arg);
3598 while ((token = strsep(&p, ",")) != NULL) {
3599 if (envlist_setenv(envlist, token) != 0) {
3600 usage(EXIT_FAILURE);
3601 }
3602 }
3603 free(r);
3604}
3605
3606static void handle_arg_unset_env(const char *arg)
3607{
3608 char *r, *p, *token;
3609 r = p = strdup(arg);
3610 while ((token = strsep(&p, ",")) != NULL) {
3611 if (envlist_unsetenv(envlist, token) != 0) {
3612 usage(EXIT_FAILURE);
3613 }
3614 }
3615 free(r);
3616}
3617
3618static void handle_arg_argv0(const char *arg)
3619{
3620 argv0 = strdup(arg);
3621}
3622
3623static void handle_arg_stack_size(const char *arg)
3624{
3625 char *p;
3626 guest_stack_size = strtoul(arg, &p, 0);
3627 if (guest_stack_size == 0) {
3628 usage(EXIT_FAILURE);
3629 }
3630
3631 if (*p == 'M') {
3632 guest_stack_size *= 1024 * 1024;
3633 } else if (*p == 'k' || *p == 'K') {
3634 guest_stack_size *= 1024;
3635 }
3636}
3637
3638static void handle_arg_ld_prefix(const char *arg)
3639{
3640 interp_prefix = strdup(arg);
3641}
3642
3643static void handle_arg_pagesize(const char *arg)
3644{
3645 qemu_host_page_size = atoi(arg);
3646 if (qemu_host_page_size == 0 ||
3647 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
3648 fprintf(stderr, "page size must be a power of two\n");
3649 exit(EXIT_FAILURE);
3650 }
3651}
3652
3653static void handle_arg_randseed(const char *arg)
3654{
3655 unsigned long long seed;
3656
3657 if (parse_uint_full(arg, &seed, 0) != 0 || seed > UINT_MAX) {
3658 fprintf(stderr, "Invalid seed number: %s\n", arg);
3659 exit(EXIT_FAILURE);
3660 }
3661 srand(seed);
3662}
3663
3664static void handle_arg_gdb(const char *arg)
3665{
3666 gdbstub_port = atoi(arg);
3667}
3668
3669static void handle_arg_uname(const char *arg)
3670{
3671 qemu_uname_release = strdup(arg);
3672}
3673
3674static void handle_arg_cpu(const char *arg)
3675{
3676 cpu_model = strdup(arg);
3677 if (cpu_model == NULL || is_help_option(cpu_model)) {
3678
3679#if defined(cpu_list)
3680 cpu_list(stdout, &fprintf);
3681#endif
3682 exit(EXIT_FAILURE);
3683 }
3684}
3685
3686static void handle_arg_guest_base(const char *arg)
3687{
3688 guest_base = strtol(arg, NULL, 0);
3689 have_guest_base = 1;
3690}
3691
3692static void handle_arg_reserved_va(const char *arg)
3693{
3694 char *p;
3695 int shift = 0;
3696 reserved_va = strtoul(arg, &p, 0);
3697 switch (*p) {
3698 case 'k':
3699 case 'K':
3700 shift = 10;
3701 break;
3702 case 'M':
3703 shift = 20;
3704 break;
3705 case 'G':
3706 shift = 30;
3707 break;
3708 }
3709 if (shift) {
3710 unsigned long unshifted = reserved_va;
3711 p++;
3712 reserved_va <<= shift;
3713 if (((reserved_va >> shift) != unshifted)
3714#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3715 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3716#endif
3717 ) {
3718 fprintf(stderr, "Reserved virtual address too big\n");
3719 exit(EXIT_FAILURE);
3720 }
3721 }
3722 if (*p) {
3723 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3724 exit(EXIT_FAILURE);
3725 }
3726}
3727
3728static void handle_arg_singlestep(const char *arg)
3729{
3730 singlestep = 1;
3731}
3732
3733static void handle_arg_strace(const char *arg)
3734{
3735 do_strace = 1;
3736}
3737
3738static void handle_arg_version(const char *arg)
3739{
3740 printf("qemu-" TARGET_NAME " version " QEMU_VERSION QEMU_PKGVERSION
3741 "\n" QEMU_COPYRIGHT "\n");
3742 exit(EXIT_SUCCESS);
3743}
3744
3745static char *trace_file;
3746static void handle_arg_trace(const char *arg)
3747{
3748 g_free(trace_file);
3749 trace_file = trace_opt_parse(arg);
3750}
3751
3752struct qemu_argument {
3753 const char *argv;
3754 const char *env;
3755 bool has_arg;
3756 void (*handle_opt)(const char *arg);
3757 const char *example;
3758 const char *help;
3759};
3760
3761static const struct qemu_argument arg_table[] = {
3762 {"h", "", false, handle_arg_help,
3763 "", "print this help"},
3764 {"help", "", false, handle_arg_help,
3765 "", ""},
3766 {"g", "QEMU_GDB", true, handle_arg_gdb,
3767 "port", "wait gdb connection to 'port'"},
3768 {"L", "QEMU_LD_PREFIX", true, handle_arg_ld_prefix,
3769 "path", "set the elf interpreter prefix to 'path'"},
3770 {"s", "QEMU_STACK_SIZE", true, handle_arg_stack_size,
3771 "size", "set the stack size to 'size' bytes"},
3772 {"cpu", "QEMU_CPU", true, handle_arg_cpu,
3773 "model", "select CPU (-cpu help for list)"},
3774 {"E", "QEMU_SET_ENV", true, handle_arg_set_env,
3775 "var=value", "sets targets environment variable (see below)"},
3776 {"U", "QEMU_UNSET_ENV", true, handle_arg_unset_env,
3777 "var", "unsets targets environment variable (see below)"},
3778 {"0", "QEMU_ARGV0", true, handle_arg_argv0,
3779 "argv0", "forces target process argv[0] to be 'argv0'"},
3780 {"r", "QEMU_UNAME", true, handle_arg_uname,
3781 "uname", "set qemu uname release string to 'uname'"},
3782 {"B", "QEMU_GUEST_BASE", true, handle_arg_guest_base,
3783 "address", "set guest_base address to 'address'"},
3784 {"R", "QEMU_RESERVED_VA", true, handle_arg_reserved_va,
3785 "size", "reserve 'size' bytes for guest virtual address space"},
3786 {"d", "QEMU_LOG", true, handle_arg_log,
3787 "item[,...]", "enable logging of specified items "
3788 "(use '-d help' for a list of items)"},
3789 {"D", "QEMU_LOG_FILENAME", true, handle_arg_log_filename,
3790 "logfile", "write logs to 'logfile' (default stderr)"},
3791 {"p", "QEMU_PAGESIZE", true, handle_arg_pagesize,
3792 "pagesize", "set the host page size to 'pagesize'"},
3793 {"singlestep", "QEMU_SINGLESTEP", false, handle_arg_singlestep,
3794 "", "run in singlestep mode"},
3795 {"strace", "QEMU_STRACE", false, handle_arg_strace,
3796 "", "log system calls"},
3797 {"seed", "QEMU_RAND_SEED", true, handle_arg_randseed,
3798 "", "Seed for pseudo-random number generator"},
3799 {"trace", "QEMU_TRACE", true, handle_arg_trace,
3800 "", "[[enable=]<pattern>][,events=<file>][,file=<file>]"},
3801 {"version", "QEMU_VERSION", false, handle_arg_version,
3802 "", "display version information and exit"},
3803 {NULL, NULL, false, NULL, NULL, NULL}
3804};
3805
3806static void usage(int exitcode)
3807{
3808 const struct qemu_argument *arginfo;
3809 int maxarglen;
3810 int maxenvlen;
3811
3812 printf("usage: qemu-" TARGET_NAME " [options] program [arguments...]\n"
3813 "Linux CPU emulator (compiled for " TARGET_NAME " emulation)\n"
3814 "\n"
3815 "Options and associated environment variables:\n"
3816 "\n");
3817
3818
3819
3820
3821 maxarglen = strlen("Argument");
3822 maxenvlen = strlen("Env-variable");
3823
3824 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3825 int arglen = strlen(arginfo->argv);
3826 if (arginfo->has_arg) {
3827 arglen += strlen(arginfo->example) + 1;
3828 }
3829 if (strlen(arginfo->env) > maxenvlen) {
3830 maxenvlen = strlen(arginfo->env);
3831 }
3832 if (arglen > maxarglen) {
3833 maxarglen = arglen;
3834 }
3835 }
3836
3837 printf("%-*s %-*s Description\n", maxarglen+1, "Argument",
3838 maxenvlen, "Env-variable");
3839
3840 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3841 if (arginfo->has_arg) {
3842 printf("-%s %-*s %-*s %s\n", arginfo->argv,
3843 (int)(maxarglen - strlen(arginfo->argv) - 1),
3844 arginfo->example, maxenvlen, arginfo->env, arginfo->help);
3845 } else {
3846 printf("-%-*s %-*s %s\n", maxarglen, arginfo->argv,
3847 maxenvlen, arginfo->env,
3848 arginfo->help);
3849 }
3850 }
3851
3852 printf("\n"
3853 "Defaults:\n"
3854 "QEMU_LD_PREFIX = %s\n"
3855 "QEMU_STACK_SIZE = %ld byte\n",
3856 interp_prefix,
3857 guest_stack_size);
3858
3859 printf("\n"
3860 "You can use -E and -U options or the QEMU_SET_ENV and\n"
3861 "QEMU_UNSET_ENV environment variables to set and unset\n"
3862 "environment variables for the target process.\n"
3863 "It is possible to provide several variables by separating them\n"
3864 "by commas in getsubopt(3) style. Additionally it is possible to\n"
3865 "provide the -E and -U options multiple times.\n"
3866 "The following lines are equivalent:\n"
3867 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
3868 " -E var1=val2,var2=val2 -U LD_PRELOAD,LD_DEBUG\n"
3869 " QEMU_SET_ENV=var1=val2,var2=val2 QEMU_UNSET_ENV=LD_PRELOAD,LD_DEBUG\n"
3870 "Note that if you provide several changes to a single variable\n"
3871 "the last change will stay in effect.\n");
3872
3873 exit(exitcode);
3874}
3875
3876static int parse_args(int argc, char **argv)
3877{
3878 const char *r;
3879 int optind;
3880 const struct qemu_argument *arginfo;
3881
3882 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3883 if (arginfo->env == NULL) {
3884 continue;
3885 }
3886
3887 r = getenv(arginfo->env);
3888 if (r != NULL) {
3889 arginfo->handle_opt(r);
3890 }
3891 }
3892
3893 optind = 1;
3894 for (;;) {
3895 if (optind >= argc) {
3896 break;
3897 }
3898 r = argv[optind];
3899 if (r[0] != '-') {
3900 break;
3901 }
3902 optind++;
3903 r++;
3904 if (!strcmp(r, "-")) {
3905 break;
3906 }
3907
3908 if (r[0] == '-') {
3909 r++;
3910 }
3911
3912 for (arginfo = arg_table; arginfo->handle_opt != NULL; arginfo++) {
3913 if (!strcmp(r, arginfo->argv)) {
3914 if (arginfo->has_arg) {
3915 if (optind >= argc) {
3916 (void) fprintf(stderr,
3917 "qemu: missing argument for option '%s'\n", r);
3918 exit(EXIT_FAILURE);
3919 }
3920 arginfo->handle_opt(argv[optind]);
3921 optind++;
3922 } else {
3923 arginfo->handle_opt(NULL);
3924 }
3925 break;
3926 }
3927 }
3928
3929
3930 if (arginfo->handle_opt == NULL) {
3931 (void) fprintf(stderr, "qemu: unknown option '%s'\n", r);
3932 exit(EXIT_FAILURE);
3933 }
3934 }
3935
3936 if (optind >= argc) {
3937 (void) fprintf(stderr, "qemu: no user program specified\n");
3938 exit(EXIT_FAILURE);
3939 }
3940
3941 filename = argv[optind];
3942 exec_path = argv[optind];
3943
3944 return optind;
3945}
3946
3947int main(int argc, char **argv, char **envp)
3948{
3949 struct target_pt_regs regs1, *regs = ®s1;
3950 struct image_info info1, *info = &info1;
3951 struct linux_binprm bprm;
3952 TaskState *ts;
3953 CPUArchState *env;
3954 CPUState *cpu;
3955 int optind;
3956 char **target_environ, **wrk;
3957 char **target_argv;
3958 int target_argc;
3959 int i;
3960 int ret;
3961 int execfd;
3962
3963 module_call_init(MODULE_INIT_TRACE);
3964 qemu_init_cpu_list();
3965 module_call_init(MODULE_INIT_QOM);
3966
3967 if ((envlist = envlist_create()) == NULL) {
3968 (void) fprintf(stderr, "Unable to allocate envlist\n");
3969 exit(EXIT_FAILURE);
3970 }
3971
3972
3973 for (wrk = environ; *wrk != NULL; wrk++) {
3974 (void) envlist_setenv(envlist, *wrk);
3975 }
3976
3977
3978
3979 {
3980 struct rlimit lim;
3981 if (getrlimit(RLIMIT_STACK, &lim) == 0
3982 && lim.rlim_cur != RLIM_INFINITY
3983 && lim.rlim_cur == (target_long)lim.rlim_cur) {
3984 guest_stack_size = lim.rlim_cur;
3985 }
3986 }
3987
3988 cpu_model = NULL;
3989
3990 srand(time(NULL));
3991
3992 qemu_add_opts(&qemu_trace_opts);
3993
3994 optind = parse_args(argc, argv);
3995
3996 if (!trace_init_backends()) {
3997 exit(1);
3998 }
3999 trace_init_file(trace_file);
4000
4001
4002 memset(regs, 0, sizeof(struct target_pt_regs));
4003
4004
4005 memset(info, 0, sizeof(struct image_info));
4006
4007 memset(&bprm, 0, sizeof (bprm));
4008
4009
4010 init_paths(interp_prefix);
4011
4012 init_qemu_uname_release();
4013
4014 if (cpu_model == NULL) {
4015#if defined(TARGET_I386)
4016#ifdef TARGET_X86_64
4017 cpu_model = "qemu64";
4018#else
4019 cpu_model = "qemu32";
4020#endif
4021#elif defined(TARGET_ARM)
4022 cpu_model = "any";
4023#elif defined(TARGET_UNICORE32)
4024 cpu_model = "any";
4025#elif defined(TARGET_M68K)
4026 cpu_model = "any";
4027#elif defined(TARGET_SPARC)
4028#ifdef TARGET_SPARC64
4029 cpu_model = "TI UltraSparc II";
4030#else
4031 cpu_model = "Fujitsu MB86904";
4032#endif
4033#elif defined(TARGET_MIPS)
4034#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
4035 cpu_model = "5KEf";
4036#else
4037 cpu_model = "24Kf";
4038#endif
4039#elif defined TARGET_OPENRISC
4040 cpu_model = "or1200";
4041#elif defined(TARGET_PPC)
4042# ifdef TARGET_PPC64
4043 cpu_model = "POWER8";
4044# else
4045 cpu_model = "750";
4046# endif
4047#elif defined TARGET_SH4
4048 cpu_model = TYPE_SH7785_CPU;
4049#elif defined TARGET_S390X
4050 cpu_model = "qemu";
4051#else
4052 cpu_model = "any";
4053#endif
4054 }
4055 tcg_exec_init(0);
4056
4057
4058 cpu = cpu_init(cpu_model);
4059 if (!cpu) {
4060 fprintf(stderr, "Unable to find CPU definition\n");
4061 exit(EXIT_FAILURE);
4062 }
4063 env = cpu->env_ptr;
4064 cpu_reset(cpu);
4065
4066 thread_cpu = cpu;
4067
4068 if (getenv("QEMU_STRACE")) {
4069 do_strace = 1;
4070 }
4071
4072 if (getenv("QEMU_RAND_SEED")) {
4073 handle_arg_randseed(getenv("QEMU_RAND_SEED"));
4074 }
4075
4076 target_environ = envlist_to_environ(envlist, NULL);
4077 envlist_free(envlist);
4078
4079
4080
4081
4082
4083 guest_base = HOST_PAGE_ALIGN(guest_base);
4084
4085 if (reserved_va || have_guest_base) {
4086 guest_base = init_guest_space(guest_base, reserved_va, 0,
4087 have_guest_base);
4088 if (guest_base == (unsigned long)-1) {
4089 fprintf(stderr, "Unable to reserve 0x%lx bytes of virtual address "
4090 "space for use as guest address space (check your virtual "
4091 "memory ulimit setting or reserve less using -R option)\n",
4092 reserved_va);
4093 exit(EXIT_FAILURE);
4094 }
4095
4096 if (reserved_va) {
4097 mmap_next_start = reserved_va;
4098 }
4099 }
4100
4101
4102
4103
4104
4105
4106 {
4107 FILE *fp;
4108
4109 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
4110 unsigned long tmp;
4111 if (fscanf(fp, "%lu", &tmp) == 1) {
4112 mmap_min_addr = tmp;
4113 qemu_log_mask(CPU_LOG_PAGE, "host mmap_min_addr=0x%lx\n", mmap_min_addr);
4114 }
4115 fclose(fp);
4116 }
4117 }
4118
4119
4120
4121
4122 target_argc = argc - optind;
4123 target_argv = calloc(target_argc + 1, sizeof (char *));
4124 if (target_argv == NULL) {
4125 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
4126 exit(EXIT_FAILURE);
4127 }
4128
4129
4130
4131
4132
4133 i = 0;
4134 if (argv0 != NULL) {
4135 target_argv[i++] = strdup(argv0);
4136 }
4137 for (; i < target_argc; i++) {
4138 target_argv[i] = strdup(argv[optind + i]);
4139 }
4140 target_argv[target_argc] = NULL;
4141
4142 ts = g_new0(TaskState, 1);
4143 init_task_state(ts);
4144
4145 ts->info = info;
4146 ts->bprm = &bprm;
4147 cpu->opaque = ts;
4148 task_settid(ts);
4149
4150 execfd = qemu_getauxval(AT_EXECFD);
4151 if (execfd == 0) {
4152 execfd = open(filename, O_RDONLY);
4153 if (execfd < 0) {
4154 printf("Error while loading %s: %s\n", filename, strerror(errno));
4155 _exit(EXIT_FAILURE);
4156 }
4157 }
4158
4159 ret = loader_exec(execfd, filename, target_argv, target_environ, regs,
4160 info, &bprm);
4161 if (ret != 0) {
4162 printf("Error while loading %s: %s\n", filename, strerror(-ret));
4163 _exit(EXIT_FAILURE);
4164 }
4165
4166 for (wrk = target_environ; *wrk; wrk++) {
4167 free(*wrk);
4168 }
4169
4170 free(target_environ);
4171
4172 if (qemu_loglevel_mask(CPU_LOG_PAGE)) {
4173 qemu_log("guest_base 0x%lx\n", guest_base);
4174 log_page_dump();
4175
4176 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
4177 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
4178 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
4179 info->start_code);
4180 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
4181 info->start_data);
4182 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
4183 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
4184 info->start_stack);
4185 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
4186 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
4187 }
4188
4189 target_set_brk(info->brk);
4190 syscall_init();
4191 signal_init();
4192
4193
4194
4195
4196 tcg_prologue_init(&tcg_ctx);
4197
4198#if defined(TARGET_I386)
4199 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
4200 env->hflags |= HF_PE_MASK | HF_CPL_MASK;
4201 if (env->features[FEAT_1_EDX] & CPUID_SSE) {
4202 env->cr[4] |= CR4_OSFXSR_MASK;
4203 env->hflags |= HF_OSFXSR_MASK;
4204 }
4205#ifndef TARGET_ABI32
4206
4207 if (!(env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM)) {
4208 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
4209 exit(EXIT_FAILURE);
4210 }
4211 env->cr[4] |= CR4_PAE_MASK;
4212 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
4213 env->hflags |= HF_LMA_MASK;
4214#endif
4215
4216
4217 env->eflags |= IF_MASK;
4218
4219
4220#ifndef TARGET_ABI32
4221 env->regs[R_EAX] = regs->rax;
4222 env->regs[R_EBX] = regs->rbx;
4223 env->regs[R_ECX] = regs->rcx;
4224 env->regs[R_EDX] = regs->rdx;
4225 env->regs[R_ESI] = regs->rsi;
4226 env->regs[R_EDI] = regs->rdi;
4227 env->regs[R_EBP] = regs->rbp;
4228 env->regs[R_ESP] = regs->rsp;
4229 env->eip = regs->rip;
4230#else
4231 env->regs[R_EAX] = regs->eax;
4232 env->regs[R_EBX] = regs->ebx;
4233 env->regs[R_ECX] = regs->ecx;
4234 env->regs[R_EDX] = regs->edx;
4235 env->regs[R_ESI] = regs->esi;
4236 env->regs[R_EDI] = regs->edi;
4237 env->regs[R_EBP] = regs->ebp;
4238 env->regs[R_ESP] = regs->esp;
4239 env->eip = regs->eip;
4240#endif
4241
4242
4243#ifndef TARGET_ABI32
4244 env->idt.limit = 511;
4245#else
4246 env->idt.limit = 255;
4247#endif
4248 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
4249 PROT_READ|PROT_WRITE,
4250 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
4251 idt_table = g2h(env->idt.base);
4252 set_idt(0, 0);
4253 set_idt(1, 0);
4254 set_idt(2, 0);
4255 set_idt(3, 3);
4256 set_idt(4, 3);
4257 set_idt(5, 0);
4258 set_idt(6, 0);
4259 set_idt(7, 0);
4260 set_idt(8, 0);
4261 set_idt(9, 0);
4262 set_idt(10, 0);
4263 set_idt(11, 0);
4264 set_idt(12, 0);
4265 set_idt(13, 0);
4266 set_idt(14, 0);
4267 set_idt(15, 0);
4268 set_idt(16, 0);
4269 set_idt(17, 0);
4270 set_idt(18, 0);
4271 set_idt(19, 0);
4272 set_idt(0x80, 3);
4273
4274
4275 {
4276 uint64_t *gdt_table;
4277 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
4278 PROT_READ|PROT_WRITE,
4279 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
4280 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
4281 gdt_table = g2h(env->gdt.base);
4282#ifdef TARGET_ABI32
4283 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
4284 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4285 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
4286#else
4287
4288 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
4289 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4290 DESC_L_MASK |
4291 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
4292#endif
4293 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
4294 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
4295 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
4296 }
4297 cpu_x86_load_seg(env, R_CS, __USER_CS);
4298 cpu_x86_load_seg(env, R_SS, __USER_DS);
4299#ifdef TARGET_ABI32
4300 cpu_x86_load_seg(env, R_DS, __USER_DS);
4301 cpu_x86_load_seg(env, R_ES, __USER_DS);
4302 cpu_x86_load_seg(env, R_FS, __USER_DS);
4303 cpu_x86_load_seg(env, R_GS, __USER_DS);
4304
4305 env->segs[R_FS].selector = 0;
4306#else
4307 cpu_x86_load_seg(env, R_DS, 0);
4308 cpu_x86_load_seg(env, R_ES, 0);
4309 cpu_x86_load_seg(env, R_FS, 0);
4310 cpu_x86_load_seg(env, R_GS, 0);
4311#endif
4312#elif defined(TARGET_AARCH64)
4313 {
4314 int i;
4315
4316 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
4317 fprintf(stderr,
4318 "The selected ARM CPU does not support 64 bit mode\n");
4319 exit(EXIT_FAILURE);
4320 }
4321
4322 for (i = 0; i < 31; i++) {
4323 env->xregs[i] = regs->regs[i];
4324 }
4325 env->pc = regs->pc;
4326 env->xregs[31] = regs->sp;
4327 }
4328#elif defined(TARGET_ARM)
4329 {
4330 int i;
4331 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
4332 CPSRWriteByInstr);
4333 for(i = 0; i < 16; i++) {
4334 env->regs[i] = regs->uregs[i];
4335 }
4336#ifdef TARGET_WORDS_BIGENDIAN
4337
4338 if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4
4339 && (info->elf_flags & EF_ARM_BE8)) {
4340 env->uncached_cpsr |= CPSR_E;
4341 env->cp15.sctlr_el[1] |= SCTLR_E0E;
4342 } else {
4343 env->cp15.sctlr_el[1] |= SCTLR_B;
4344 }
4345#endif
4346 }
4347#elif defined(TARGET_UNICORE32)
4348 {
4349 int i;
4350 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
4351 for (i = 0; i < 32; i++) {
4352 env->regs[i] = regs->uregs[i];
4353 }
4354 }
4355#elif defined(TARGET_SPARC)
4356 {
4357 int i;
4358 env->pc = regs->pc;
4359 env->npc = regs->npc;
4360 env->y = regs->y;
4361 for(i = 0; i < 8; i++)
4362 env->gregs[i] = regs->u_regs[i];
4363 for(i = 0; i < 8; i++)
4364 env->regwptr[i] = regs->u_regs[i + 8];
4365 }
4366#elif defined(TARGET_PPC)
4367 {
4368 int i;
4369
4370#if defined(TARGET_PPC64)
4371 int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF;
4372#if defined(TARGET_ABI32)
4373 env->msr &= ~((target_ulong)1 << flag);
4374#else
4375 env->msr |= (target_ulong)1 << flag;
4376#endif
4377#endif
4378 env->nip = regs->nip;
4379 for(i = 0; i < 32; i++) {
4380 env->gpr[i] = regs->gpr[i];
4381 }
4382 }
4383#elif defined(TARGET_M68K)
4384 {
4385 env->pc = regs->pc;
4386 env->dregs[0] = regs->d0;
4387 env->dregs[1] = regs->d1;
4388 env->dregs[2] = regs->d2;
4389 env->dregs[3] = regs->d3;
4390 env->dregs[4] = regs->d4;
4391 env->dregs[5] = regs->d5;
4392 env->dregs[6] = regs->d6;
4393 env->dregs[7] = regs->d7;
4394 env->aregs[0] = regs->a0;
4395 env->aregs[1] = regs->a1;
4396 env->aregs[2] = regs->a2;
4397 env->aregs[3] = regs->a3;
4398 env->aregs[4] = regs->a4;
4399 env->aregs[5] = regs->a5;
4400 env->aregs[6] = regs->a6;
4401 env->aregs[7] = regs->usp;
4402 env->sr = regs->sr;
4403 ts->sim_syscalls = 1;
4404 }
4405#elif defined(TARGET_MICROBLAZE)
4406 {
4407 env->regs[0] = regs->r0;
4408 env->regs[1] = regs->r1;
4409 env->regs[2] = regs->r2;
4410 env->regs[3] = regs->r3;
4411 env->regs[4] = regs->r4;
4412 env->regs[5] = regs->r5;
4413 env->regs[6] = regs->r6;
4414 env->regs[7] = regs->r7;
4415 env->regs[8] = regs->r8;
4416 env->regs[9] = regs->r9;
4417 env->regs[10] = regs->r10;
4418 env->regs[11] = regs->r11;
4419 env->regs[12] = regs->r12;
4420 env->regs[13] = regs->r13;
4421 env->regs[14] = regs->r14;
4422 env->regs[15] = regs->r15;
4423 env->regs[16] = regs->r16;
4424 env->regs[17] = regs->r17;
4425 env->regs[18] = regs->r18;
4426 env->regs[19] = regs->r19;
4427 env->regs[20] = regs->r20;
4428 env->regs[21] = regs->r21;
4429 env->regs[22] = regs->r22;
4430 env->regs[23] = regs->r23;
4431 env->regs[24] = regs->r24;
4432 env->regs[25] = regs->r25;
4433 env->regs[26] = regs->r26;
4434 env->regs[27] = regs->r27;
4435 env->regs[28] = regs->r28;
4436 env->regs[29] = regs->r29;
4437 env->regs[30] = regs->r30;
4438 env->regs[31] = regs->r31;
4439 env->sregs[SR_PC] = regs->pc;
4440 }
4441#elif defined(TARGET_MIPS)
4442 {
4443 int i;
4444
4445 for(i = 0; i < 32; i++) {
4446 env->active_tc.gpr[i] = regs->regs[i];
4447 }
4448 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
4449 if (regs->cp0_epc & 1) {
4450 env->hflags |= MIPS_HFLAG_M16;
4451 }
4452 if (((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
4453 ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) {
4454 if ((env->active_fpu.fcr31_rw_bitmask &
4455 (1 << FCR31_NAN2008)) == 0) {
4456 fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");
4457 exit(1);
4458 }
4459 if ((info->elf_flags & EF_MIPS_NAN2008) != 0) {
4460 env->active_fpu.fcr31 |= (1 << FCR31_NAN2008);
4461 } else {
4462 env->active_fpu.fcr31 &= ~(1 << FCR31_NAN2008);
4463 }
4464 restore_snan_bit_mode(env);
4465 }
4466 }
4467#elif defined(TARGET_OPENRISC)
4468 {
4469 int i;
4470
4471 for (i = 0; i < 32; i++) {
4472 env->gpr[i] = regs->gpr[i];
4473 }
4474
4475 env->sr = regs->sr;
4476 env->pc = regs->pc;
4477 }
4478#elif defined(TARGET_SH4)
4479 {
4480 int i;
4481
4482 for(i = 0; i < 16; i++) {
4483 env->gregs[i] = regs->regs[i];
4484 }
4485 env->pc = regs->pc;
4486 }
4487#elif defined(TARGET_ALPHA)
4488 {
4489 int i;
4490
4491 for(i = 0; i < 28; i++) {
4492 env->ir[i] = ((abi_ulong *)regs)[i];
4493 }
4494 env->ir[IR_SP] = regs->usp;
4495 env->pc = regs->pc;
4496 }
4497#elif defined(TARGET_CRIS)
4498 {
4499 env->regs[0] = regs->r0;
4500 env->regs[1] = regs->r1;
4501 env->regs[2] = regs->r2;
4502 env->regs[3] = regs->r3;
4503 env->regs[4] = regs->r4;
4504 env->regs[5] = regs->r5;
4505 env->regs[6] = regs->r6;
4506 env->regs[7] = regs->r7;
4507 env->regs[8] = regs->r8;
4508 env->regs[9] = regs->r9;
4509 env->regs[10] = regs->r10;
4510 env->regs[11] = regs->r11;
4511 env->regs[12] = regs->r12;
4512 env->regs[13] = regs->r13;
4513 env->regs[14] = info->start_stack;
4514 env->regs[15] = regs->acr;
4515 env->pc = regs->erp;
4516 }
4517#elif defined(TARGET_S390X)
4518 {
4519 int i;
4520 for (i = 0; i < 16; i++) {
4521 env->regs[i] = regs->gprs[i];
4522 }
4523 env->psw.mask = regs->psw.mask;
4524 env->psw.addr = regs->psw.addr;
4525 }
4526#elif defined(TARGET_TILEGX)
4527 {
4528 int i;
4529 for (i = 0; i < TILEGX_R_COUNT; i++) {
4530 env->regs[i] = regs->regs[i];
4531 }
4532 for (i = 0; i < TILEGX_SPR_COUNT; i++) {
4533 env->spregs[i] = 0;
4534 }
4535 env->pc = regs->pc;
4536 }
4537#else
4538#error unsupported target CPU
4539#endif
4540
4541#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
4542 ts->stack_base = info->start_stack;
4543 ts->heap_base = info->brk;
4544
4545 ts->heap_limit = 0;
4546#endif
4547
4548 if (gdbstub_port) {
4549 if (gdbserver_start(gdbstub_port) < 0) {
4550 fprintf(stderr, "qemu: could not open gdbserver on port %d\n",
4551 gdbstub_port);
4552 exit(EXIT_FAILURE);
4553 }
4554 gdb_handlesig(cpu, 0);
4555 }
4556 cpu_loop(env);
4557
4558 return 0;
4559}
4560