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24#include "qemu/osdep.h"
25#include "qapi/error.h"
26#include "cpu.h"
27#include "qemu-common.h"
28#include "mmu.h"
29#include "exec/exec-all.h"
30
31
32static void cris_cpu_set_pc(CPUState *cs, vaddr value)
33{
34 CRISCPU *cpu = CRIS_CPU(cs);
35
36 cpu->env.pc = value;
37}
38
39static bool cris_cpu_has_work(CPUState *cs)
40{
41 return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
42}
43
44
45static void cris_cpu_reset(CPUState *s)
46{
47 CRISCPU *cpu = CRIS_CPU(s);
48 CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(cpu);
49 CPUCRISState *env = &cpu->env;
50 uint32_t vr;
51
52 ccc->parent_reset(s);
53
54 vr = env->pregs[PR_VR];
55 memset(env, 0, offsetof(CPUCRISState, load_info));
56 env->pregs[PR_VR] = vr;
57 tlb_flush(s, 1);
58
59#if defined(CONFIG_USER_ONLY)
60
61 env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
62#else
63 cris_mmu_init(env);
64 env->pregs[PR_CCS] = 0;
65#endif
66}
67
68static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
69{
70 ObjectClass *oc;
71 char *typename;
72
73 if (cpu_model == NULL) {
74 return NULL;
75 }
76
77#if defined(CONFIG_USER_ONLY)
78 if (strcasecmp(cpu_model, "any") == 0) {
79 return object_class_by_name("crisv32-" TYPE_CRIS_CPU);
80 }
81#endif
82
83 typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model);
84 oc = object_class_by_name(typename);
85 g_free(typename);
86 if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) ||
87 object_class_is_abstract(oc))) {
88 oc = NULL;
89 }
90 return oc;
91}
92
93CRISCPU *cpu_cris_init(const char *cpu_model)
94{
95 return CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model));
96}
97
98
99static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
100{
101 CRISCPUClass *ccc_a = CRIS_CPU_CLASS(a);
102 CRISCPUClass *ccc_b = CRIS_CPU_CLASS(b);
103
104
105 if (ccc_a->vr > ccc_b->vr) {
106 return 1;
107 } else if (ccc_a->vr < ccc_b->vr) {
108 return -1;
109 } else {
110 return 0;
111 }
112}
113
114static void cris_cpu_list_entry(gpointer data, gpointer user_data)
115{
116 ObjectClass *oc = data;
117 CPUListState *s = user_data;
118 const char *typename = object_class_get_name(oc);
119 char *name;
120
121 name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU));
122 (*s->cpu_fprintf)(s->file, " %s\n", name);
123 g_free(name);
124}
125
126void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
127{
128 CPUListState s = {
129 .file = f,
130 .cpu_fprintf = cpu_fprintf,
131 };
132 GSList *list;
133
134 list = object_class_get_list(TYPE_CRIS_CPU, false);
135 list = g_slist_sort(list, cris_cpu_list_compare);
136 (*cpu_fprintf)(f, "Available CPUs:\n");
137 g_slist_foreach(list, cris_cpu_list_entry, &s);
138 g_slist_free(list);
139}
140
141static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
142{
143 CPUState *cs = CPU(dev);
144 CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev);
145 Error *local_err = NULL;
146
147 cpu_exec_realizefn(cs, &local_err);
148 if (local_err != NULL) {
149 error_propagate(errp, local_err);
150 return;
151 }
152
153 cpu_reset(cs);
154 qemu_init_vcpu(cs);
155
156 ccc->parent_realize(dev, errp);
157}
158
159#ifndef CONFIG_USER_ONLY
160static void cris_cpu_set_irq(void *opaque, int irq, int level)
161{
162 CRISCPU *cpu = opaque;
163 CPUState *cs = CPU(cpu);
164 int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI;
165
166 if (level) {
167 cpu_interrupt(cs, type);
168 } else {
169 cpu_reset_interrupt(cs, type);
170 }
171}
172#endif
173
174static void cris_disas_set_info(CPUState *cpu, disassemble_info *info)
175{
176 CRISCPU *cc = CRIS_CPU(cpu);
177 CPUCRISState *env = &cc->env;
178
179 if (env->pregs[PR_VR] != 32) {
180 info->mach = bfd_mach_cris_v0_v10;
181 info->print_insn = print_insn_crisv10;
182 } else {
183 info->mach = bfd_mach_cris_v32;
184 info->print_insn = print_insn_crisv32;
185 }
186}
187
188static void cris_cpu_initfn(Object *obj)
189{
190 CPUState *cs = CPU(obj);
191 CRISCPU *cpu = CRIS_CPU(obj);
192 CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj);
193 CPUCRISState *env = &cpu->env;
194 static bool tcg_initialized;
195
196 cs->env_ptr = env;
197
198 env->pregs[PR_VR] = ccc->vr;
199
200#ifndef CONFIG_USER_ONLY
201
202 qdev_init_gpio_in(DEVICE(cpu), cris_cpu_set_irq, 2);
203#endif
204
205 if (tcg_enabled() && !tcg_initialized) {
206 tcg_initialized = true;
207 if (env->pregs[PR_VR] < 32) {
208 cris_initialize_crisv10_tcg();
209 } else {
210 cris_initialize_tcg();
211 }
212 }
213}
214
215static void crisv8_cpu_class_init(ObjectClass *oc, void *data)
216{
217 CPUClass *cc = CPU_CLASS(oc);
218 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
219
220 ccc->vr = 8;
221 cc->do_interrupt = crisv10_cpu_do_interrupt;
222 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
223}
224
225static void crisv9_cpu_class_init(ObjectClass *oc, void *data)
226{
227 CPUClass *cc = CPU_CLASS(oc);
228 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
229
230 ccc->vr = 9;
231 cc->do_interrupt = crisv10_cpu_do_interrupt;
232 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
233}
234
235static void crisv10_cpu_class_init(ObjectClass *oc, void *data)
236{
237 CPUClass *cc = CPU_CLASS(oc);
238 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
239
240 ccc->vr = 10;
241 cc->do_interrupt = crisv10_cpu_do_interrupt;
242 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
243}
244
245static void crisv11_cpu_class_init(ObjectClass *oc, void *data)
246{
247 CPUClass *cc = CPU_CLASS(oc);
248 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
249
250 ccc->vr = 11;
251 cc->do_interrupt = crisv10_cpu_do_interrupt;
252 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
253}
254
255static void crisv17_cpu_class_init(ObjectClass *oc, void *data)
256{
257 CPUClass *cc = CPU_CLASS(oc);
258 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
259
260 ccc->vr = 17;
261 cc->do_interrupt = crisv10_cpu_do_interrupt;
262 cc->gdb_read_register = crisv10_cpu_gdb_read_register;
263}
264
265static void crisv32_cpu_class_init(ObjectClass *oc, void *data)
266{
267 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
268
269 ccc->vr = 32;
270}
271
272#define TYPE(model) model "-" TYPE_CRIS_CPU
273
274static const TypeInfo cris_cpu_model_type_infos[] = {
275 {
276 .name = TYPE("crisv8"),
277 .parent = TYPE_CRIS_CPU,
278 .class_init = crisv8_cpu_class_init,
279 }, {
280 .name = TYPE("crisv9"),
281 .parent = TYPE_CRIS_CPU,
282 .class_init = crisv9_cpu_class_init,
283 }, {
284 .name = TYPE("crisv10"),
285 .parent = TYPE_CRIS_CPU,
286 .class_init = crisv10_cpu_class_init,
287 }, {
288 .name = TYPE("crisv11"),
289 .parent = TYPE_CRIS_CPU,
290 .class_init = crisv11_cpu_class_init,
291 }, {
292 .name = TYPE("crisv17"),
293 .parent = TYPE_CRIS_CPU,
294 .class_init = crisv17_cpu_class_init,
295 }, {
296 .name = TYPE("crisv32"),
297 .parent = TYPE_CRIS_CPU,
298 .class_init = crisv32_cpu_class_init,
299 }
300};
301
302#undef TYPE
303
304static void cris_cpu_class_init(ObjectClass *oc, void *data)
305{
306 DeviceClass *dc = DEVICE_CLASS(oc);
307 CPUClass *cc = CPU_CLASS(oc);
308 CRISCPUClass *ccc = CRIS_CPU_CLASS(oc);
309
310 ccc->parent_realize = dc->realize;
311 dc->realize = cris_cpu_realizefn;
312
313 ccc->parent_reset = cc->reset;
314 cc->reset = cris_cpu_reset;
315
316 cc->class_by_name = cris_cpu_class_by_name;
317 cc->has_work = cris_cpu_has_work;
318 cc->do_interrupt = cris_cpu_do_interrupt;
319 cc->cpu_exec_interrupt = cris_cpu_exec_interrupt;
320 cc->dump_state = cris_cpu_dump_state;
321 cc->set_pc = cris_cpu_set_pc;
322 cc->gdb_read_register = cris_cpu_gdb_read_register;
323 cc->gdb_write_register = cris_cpu_gdb_write_register;
324#ifdef CONFIG_USER_ONLY
325 cc->handle_mmu_fault = cris_cpu_handle_mmu_fault;
326#else
327 cc->get_phys_page_debug = cris_cpu_get_phys_page_debug;
328 dc->vmsd = &vmstate_cris_cpu;
329#endif
330
331 cc->gdb_num_core_regs = 49;
332 cc->gdb_stop_before_watchpoint = true;
333
334 cc->disas_set_info = cris_disas_set_info;
335}
336
337static const TypeInfo cris_cpu_type_info = {
338 .name = TYPE_CRIS_CPU,
339 .parent = TYPE_CPU,
340 .instance_size = sizeof(CRISCPU),
341 .instance_init = cris_cpu_initfn,
342 .abstract = true,
343 .class_size = sizeof(CRISCPUClass),
344 .class_init = cris_cpu_class_init,
345};
346
347static void cris_cpu_register_types(void)
348{
349 int i;
350
351 type_register_static(&cris_cpu_type_info);
352 for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) {
353 type_register_static(&cris_cpu_model_type_infos[i]);
354 }
355}
356
357type_init(cris_cpu_register_types)
358
