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25#ifndef S390_TCG_TARGET_H
26#define S390_TCG_TARGET_H
27
28#define TCG_TARGET_INSN_UNIT_SIZE 2
29#define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
30
31typedef enum TCGReg {
32 TCG_REG_R0 = 0,
33 TCG_REG_R1,
34 TCG_REG_R2,
35 TCG_REG_R3,
36 TCG_REG_R4,
37 TCG_REG_R5,
38 TCG_REG_R6,
39 TCG_REG_R7,
40 TCG_REG_R8,
41 TCG_REG_R9,
42 TCG_REG_R10,
43 TCG_REG_R11,
44 TCG_REG_R12,
45 TCG_REG_R13,
46 TCG_REG_R14,
47 TCG_REG_R15
48} TCGReg;
49
50#define TCG_TARGET_NB_REGS 16
51
52
53#define TCG_TARGET_HAS_div2_i32 1
54#define TCG_TARGET_HAS_rot_i32 1
55#define TCG_TARGET_HAS_ext8s_i32 1
56#define TCG_TARGET_HAS_ext16s_i32 1
57#define TCG_TARGET_HAS_ext8u_i32 1
58#define TCG_TARGET_HAS_ext16u_i32 1
59#define TCG_TARGET_HAS_bswap16_i32 1
60#define TCG_TARGET_HAS_bswap32_i32 1
61#define TCG_TARGET_HAS_not_i32 0
62#define TCG_TARGET_HAS_neg_i32 1
63#define TCG_TARGET_HAS_andc_i32 0
64#define TCG_TARGET_HAS_orc_i32 0
65#define TCG_TARGET_HAS_eqv_i32 0
66#define TCG_TARGET_HAS_nand_i32 0
67#define TCG_TARGET_HAS_nor_i32 0
68#define TCG_TARGET_HAS_deposit_i32 1
69#define TCG_TARGET_HAS_movcond_i32 1
70#define TCG_TARGET_HAS_add2_i32 1
71#define TCG_TARGET_HAS_sub2_i32 1
72#define TCG_TARGET_HAS_mulu2_i32 0
73#define TCG_TARGET_HAS_muls2_i32 0
74#define TCG_TARGET_HAS_muluh_i32 0
75#define TCG_TARGET_HAS_mulsh_i32 0
76#define TCG_TARGET_HAS_extrl_i64_i32 0
77#define TCG_TARGET_HAS_extrh_i64_i32 0
78
79#define TCG_TARGET_HAS_div2_i64 1
80#define TCG_TARGET_HAS_rot_i64 1
81#define TCG_TARGET_HAS_ext8s_i64 1
82#define TCG_TARGET_HAS_ext16s_i64 1
83#define TCG_TARGET_HAS_ext32s_i64 1
84#define TCG_TARGET_HAS_ext8u_i64 1
85#define TCG_TARGET_HAS_ext16u_i64 1
86#define TCG_TARGET_HAS_ext32u_i64 1
87#define TCG_TARGET_HAS_bswap16_i64 1
88#define TCG_TARGET_HAS_bswap32_i64 1
89#define TCG_TARGET_HAS_bswap64_i64 1
90#define TCG_TARGET_HAS_not_i64 0
91#define TCG_TARGET_HAS_neg_i64 1
92#define TCG_TARGET_HAS_andc_i64 0
93#define TCG_TARGET_HAS_orc_i64 0
94#define TCG_TARGET_HAS_eqv_i64 0
95#define TCG_TARGET_HAS_nand_i64 0
96#define TCG_TARGET_HAS_nor_i64 0
97#define TCG_TARGET_HAS_deposit_i64 1
98#define TCG_TARGET_HAS_movcond_i64 1
99#define TCG_TARGET_HAS_add2_i64 1
100#define TCG_TARGET_HAS_sub2_i64 1
101#define TCG_TARGET_HAS_mulu2_i64 1
102#define TCG_TARGET_HAS_muls2_i64 0
103#define TCG_TARGET_HAS_muluh_i64 0
104#define TCG_TARGET_HAS_mulsh_i64 0
105
106extern bool tcg_target_deposit_valid(int ofs, int len);
107#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid
108#define TCG_TARGET_deposit_i64_valid tcg_target_deposit_valid
109
110
111#define TCG_REG_CALL_STACK TCG_REG_R15
112#define TCG_TARGET_STACK_ALIGN 8
113#define TCG_TARGET_CALL_STACK_OFFSET 160
114
115#define TCG_TARGET_EXTEND_ARGS 1
116
117enum {
118 TCG_AREG0 = TCG_REG_R10,
119};
120
121static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
122{
123}
124
125#endif
126