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30#include "qemu/osdep.h"
31#include "hw/hw.h"
32#include "hw/loader.h"
33#include "sysemu/arch_init.h"
34#include "hw/i2c/smbus.h"
35#include "hw/boards.h"
36#include "hw/timer/mc146818rtc.h"
37#include "hw/xen/xen.h"
38#include "sysemu/kvm.h"
39#include "hw/kvm/clock.h"
40#include "hw/pci-host/q35.h"
41#include "exec/address-spaces.h"
42#include "hw/i386/pc.h"
43#include "hw/i386/ich9.h"
44#include "hw/smbios/smbios.h"
45#include "hw/ide/pci.h"
46#include "hw/ide/ahci.h"
47#include "hw/usb.h"
48#include "qemu/error-report.h"
49#include "migration/migration.h"
50
51
52#define MAX_SATA_PORTS 6
53
54
55static void pc_q35_init(MachineState *machine)
56{
57 PCMachineState *pcms = PC_MACHINE(machine);
58 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
59 Q35PCIHost *q35_host;
60 PCIHostState *phb;
61 PCIBus *host_bus;
62 PCIDevice *lpc;
63 DeviceState *lpc_dev;
64 BusState *idebus[MAX_SATA_PORTS];
65 ISADevice *rtc_state;
66 MemoryRegion *system_io = get_system_io();
67 MemoryRegion *pci_memory;
68 MemoryRegion *rom_memory;
69 MemoryRegion *ram_memory;
70 GSIState *gsi_state;
71 ISABus *isa_bus;
72 qemu_irq *i8259;
73 int i;
74 ICH9LPCState *ich9_lpc;
75 PCIDevice *ahci;
76 ram_addr_t lowmem;
77 DriveInfo *hd[MAX_SATA_PORTS];
78 MachineClass *mc = MACHINE_GET_CLASS(machine);
79
80
81
82
83
84
85
86
87 if (machine->ram_size >= 0xb0000000) {
88 lowmem = 0x80000000;
89 } else {
90 lowmem = 0xb0000000;
91 }
92
93
94
95
96 if (!pcms->max_ram_below_4g) {
97 pcms->max_ram_below_4g = 1ULL << 32; ;
98 }
99 if (lowmem > pcms->max_ram_below_4g) {
100 lowmem = pcms->max_ram_below_4g;
101 if (machine->ram_size - lowmem > lowmem &&
102 lowmem & ((1ULL << 30) - 1)) {
103 error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
104 ") not a multiple of 1G; possible bad performance.",
105 pcms->max_ram_below_4g);
106 }
107 }
108
109 if (machine->ram_size >= lowmem) {
110 pcms->above_4g_mem_size = machine->ram_size - lowmem;
111 pcms->below_4g_mem_size = lowmem;
112 } else {
113 pcms->above_4g_mem_size = 0;
114 pcms->below_4g_mem_size = machine->ram_size;
115 }
116
117 if (xen_enabled()) {
118 xen_hvm_init(pcms, &ram_memory);
119 }
120
121 pc_cpus_init(pcms);
122
123 kvmclock_create();
124
125
126 if (pcmc->pci_enabled) {
127 pci_memory = g_new(MemoryRegion, 1);
128 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
129 rom_memory = pci_memory;
130 } else {
131 pci_memory = NULL;
132 rom_memory = get_system_memory();
133 }
134
135 pc_guest_info_init(pcms);
136
137 if (pcmc->smbios_defaults) {
138
139 smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)",
140 mc->name, pcmc->smbios_legacy_mode,
141 pcmc->smbios_uuid_encoded,
142 SMBIOS_ENTRY_POINT_21);
143 }
144
145
146 if (!xen_enabled()) {
147 pc_memory_init(pcms, get_system_memory(),
148 rom_memory, &ram_memory);
149 }
150
151
152 gsi_state = g_malloc0(sizeof(*gsi_state));
153 if (kvm_ioapic_in_kernel()) {
154 kvm_pc_setup_irq_routing(pcmc->pci_enabled);
155 pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
156 GSI_NUM_PINS);
157 } else {
158 pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
159 }
160
161
162 q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
163
164 object_property_add_child(qdev_get_machine(), "q35", OBJECT(q35_host), NULL);
165 object_property_set_link(OBJECT(q35_host), OBJECT(ram_memory),
166 MCH_HOST_PROP_RAM_MEM, NULL);
167 object_property_set_link(OBJECT(q35_host), OBJECT(pci_memory),
168 MCH_HOST_PROP_PCI_MEM, NULL);
169 object_property_set_link(OBJECT(q35_host), OBJECT(get_system_memory()),
170 MCH_HOST_PROP_SYSTEM_MEM, NULL);
171 object_property_set_link(OBJECT(q35_host), OBJECT(system_io),
172 MCH_HOST_PROP_IO_MEM, NULL);
173 object_property_set_int(OBJECT(q35_host), pcms->below_4g_mem_size,
174 PCI_HOST_BELOW_4G_MEM_SIZE, NULL);
175 object_property_set_int(OBJECT(q35_host), pcms->above_4g_mem_size,
176 PCI_HOST_ABOVE_4G_MEM_SIZE, NULL);
177
178 qdev_init_nofail(DEVICE(q35_host));
179 phb = PCI_HOST_BRIDGE(q35_host);
180 host_bus = phb->bus;
181
182 lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV,
183 ICH9_LPC_FUNC), true,
184 TYPE_ICH9_LPC_DEVICE);
185
186 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
187 TYPE_HOTPLUG_HANDLER,
188 (Object **)&pcms->acpi_dev,
189 object_property_allow_set_link,
190 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
191 object_property_set_link(OBJECT(machine), OBJECT(lpc),
192 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
193
194 ich9_lpc = ICH9_LPC_DEVICE(lpc);
195 lpc_dev = DEVICE(lpc);
196 for (i = 0; i < GSI_NUM_PINS; i++) {
197 qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, pcms->gsi[i]);
198 }
199 pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
200 ICH9_LPC_NB_PIRQS);
201 pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
202 isa_bus = ich9_lpc->isa_bus;
203
204 if (kvm_pic_in_kernel()) {
205 i8259 = kvm_i8259_init(isa_bus);
206 } else if (xen_enabled()) {
207 i8259 = xen_interrupt_controller_init();
208 } else {
209 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
210 }
211
212 for (i = 0; i < ISA_NUM_IRQS; i++) {
213 gsi_state->i8259_irq[i] = i8259[i];
214 }
215 g_free(i8259);
216
217 if (pcmc->pci_enabled) {
218 ioapic_init_gsi(gsi_state, "q35");
219 }
220
221 pc_register_ferr_irq(pcms->gsi[13]);
222
223 assert(pcms->vmport != ON_OFF_AUTO__MAX);
224 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
225 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
226 }
227
228
229 pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, !mc->no_floppy,
230 (pcms->vmport != ON_OFF_AUTO_ON), pcms->pit,
231 0xff0104);
232
233
234 ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms));
235
236 if (pcms->sata) {
237
238 ahci = pci_create_simple_multifunction(host_bus,
239 PCI_DEVFN(ICH9_SATA1_DEV,
240 ICH9_SATA1_FUNC),
241 true, "ich9-ahci");
242 idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
243 idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
244 g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
245 ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
246 ahci_ide_create_devs(ahci, hd);
247 } else {
248 idebus[0] = idebus[1] = NULL;
249 }
250
251 if (machine_usb(machine)) {
252
253 ehci_create_ich9_with_companions(host_bus, 0x1d);
254 }
255
256 if (pcms->smbus) {
257
258 smbus_eeprom_init(ich9_smb_init(host_bus,
259 PCI_DEVFN(ICH9_SMB_DEV, ICH9_SMB_FUNC),
260 0xb100),
261 8, NULL, 0);
262 }
263
264 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
265
266
267 pc_vga_init(isa_bus, host_bus);
268 pc_nic_init(isa_bus, host_bus);
269 if (pcmc->pci_enabled) {
270 pc_pci_device_init(host_bus);
271 }
272
273 if (pcms->acpi_nvdimm_state.is_enabled) {
274 nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
275 pcms->fw_cfg, OBJECT(pcms));
276 }
277}
278
279#define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
280 static void pc_init_##suffix(MachineState *machine) \
281 { \
282 void (*compat)(MachineState *m) = (compatfn); \
283 if (compat) { \
284 compat(machine); \
285 } \
286 pc_q35_init(machine); \
287 } \
288 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
289
290
291static void pc_q35_machine_options(MachineClass *m)
292{
293 m->family = "pc_q35";
294 m->desc = "Standard PC (Q35 + ICH9, 2009)";
295 m->hot_add_cpu = pc_hot_add_cpu;
296 m->units_per_default_bus = 1;
297 m->default_machine_opts = "firmware=bios-256k.bin";
298 m->default_display = "std";
299 m->no_floppy = 1;
300 m->has_dynamic_sysbus = true;
301 m->max_cpus = 288;
302}
303
304static void pc_q35_2_9_machine_options(MachineClass *m)
305{
306 pc_q35_machine_options(m);
307 m->alias = "q35";
308}
309
310DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL,
311 pc_q35_2_9_machine_options);
312
313static void pc_q35_2_8_machine_options(MachineClass *m)
314{
315 pc_q35_2_9_machine_options(m);
316 m->alias = NULL;
317 SET_MACHINE_COMPAT(m, PC_COMPAT_2_8);
318}
319
320DEFINE_Q35_MACHINE(v2_8, "pc-q35-2.8", NULL,
321 pc_q35_2_8_machine_options);
322
323static void pc_q35_2_7_machine_options(MachineClass *m)
324{
325 pc_q35_2_8_machine_options(m);
326 m->max_cpus = 255;
327 SET_MACHINE_COMPAT(m, PC_COMPAT_2_7);
328}
329
330DEFINE_Q35_MACHINE(v2_7, "pc-q35-2.7", NULL,
331 pc_q35_2_7_machine_options);
332
333static void pc_q35_2_6_machine_options(MachineClass *m)
334{
335 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
336 pc_q35_2_7_machine_options(m);
337 pcmc->legacy_cpu_hotplug = true;
338 SET_MACHINE_COMPAT(m, PC_COMPAT_2_6);
339}
340
341DEFINE_Q35_MACHINE(v2_6, "pc-q35-2.6", NULL,
342 pc_q35_2_6_machine_options);
343
344static void pc_q35_2_5_machine_options(MachineClass *m)
345{
346 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
347 pc_q35_2_6_machine_options(m);
348 pcmc->save_tsc_khz = false;
349 m->legacy_fw_cfg_order = 1;
350 SET_MACHINE_COMPAT(m, PC_COMPAT_2_5);
351}
352
353DEFINE_Q35_MACHINE(v2_5, "pc-q35-2.5", NULL,
354 pc_q35_2_5_machine_options);
355
356static void pc_q35_2_4_machine_options(MachineClass *m)
357{
358 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
359 pc_q35_2_5_machine_options(m);
360 m->hw_version = "2.4.0";
361 pcmc->broken_reserved_end = true;
362 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
363}
364
365DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
366 pc_q35_2_4_machine_options);
367
