qemu/hw/ppc/mac_oldworld.c
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   1
   2/*
   3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
   4 *
   5 * Copyright (c) 2004-2007 Fabrice Bellard
   6 * Copyright (c) 2007 Jocelyn Mayer
   7 *
   8 * Permission is hereby granted, free of charge, to any person obtaining a copy
   9 * of this software and associated documentation files (the "Software"), to deal
  10 * in the Software without restriction, including without limitation the rights
  11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12 * copies of the Software, and to permit persons to whom the Software is
  13 * furnished to do so, subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice shall be included in
  16 * all copies or substantial portions of the Software.
  17 *
  18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24 * THE SOFTWARE.
  25 */
  26#include "qemu/osdep.h"
  27#include "qemu/units.h"
  28#include "qapi/error.h"
  29#include "hw/hw.h"
  30#include "hw/ppc/ppc.h"
  31#include "mac.h"
  32#include "hw/input/adb.h"
  33#include "hw/timer/m48t59.h"
  34#include "sysemu/sysemu.h"
  35#include "net/net.h"
  36#include "hw/isa/isa.h"
  37#include "hw/pci/pci.h"
  38#include "hw/pci/pci_host.h"
  39#include "hw/boards.h"
  40#include "hw/nvram/fw_cfg.h"
  41#include "hw/char/escc.h"
  42#include "hw/misc/macio/macio.h"
  43#include "hw/ide.h"
  44#include "hw/loader.h"
  45#include "elf.h"
  46#include "qemu/error-report.h"
  47#include "sysemu/kvm.h"
  48#include "kvm_ppc.h"
  49#include "exec/address-spaces.h"
  50
  51#define MAX_IDE_BUS 2
  52#define CFG_ADDR 0xf0000510
  53#define TBFREQ 16600000UL
  54#define CLOCKFREQ 266000000UL
  55#define BUSFREQ 66000000UL
  56
  57#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
  58
  59#define GRACKLE_BASE 0xfec00000
  60
  61static void fw_cfg_boot_set(void *opaque, const char *boot_device,
  62                            Error **errp)
  63{
  64    fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  65}
  66
  67static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  68{
  69    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  70}
  71
  72static void ppc_heathrow_reset(void *opaque)
  73{
  74    PowerPCCPU *cpu = opaque;
  75
  76    cpu_reset(CPU(cpu));
  77}
  78
  79static void ppc_heathrow_init(MachineState *machine)
  80{
  81    ram_addr_t ram_size = machine->ram_size;
  82    const char *kernel_filename = machine->kernel_filename;
  83    const char *kernel_cmdline = machine->kernel_cmdline;
  84    const char *initrd_filename = machine->initrd_filename;
  85    const char *boot_device = machine->boot_order;
  86    MemoryRegion *sysmem = get_system_memory();
  87    PowerPCCPU *cpu = NULL;
  88    CPUPPCState *env = NULL;
  89    char *filename;
  90    int linux_boot, i;
  91    MemoryRegion *ram = g_new(MemoryRegion, 1);
  92    MemoryRegion *bios = g_new(MemoryRegion, 1);
  93    uint32_t kernel_base, initrd_base, cmdline_base = 0;
  94    int32_t kernel_size, initrd_size;
  95    PCIBus *pci_bus;
  96    OldWorldMacIOState *macio;
  97    MACIOIDEState *macio_ide;
  98    SysBusDevice *s;
  99    DeviceState *dev, *pic_dev;
 100    BusState *adb_bus;
 101    int bios_size, ndrv_size;
 102    uint8_t *ndrv_file;
 103    uint16_t ppc_boot_device;
 104    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 105    void *fw_cfg;
 106    uint64_t tbfreq;
 107
 108    linux_boot = (kernel_filename != NULL);
 109
 110    /* init CPUs */
 111    for (i = 0; i < smp_cpus; i++) {
 112        cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
 113        env = &cpu->env;
 114
 115        /* Set time-base frequency to 16.6 Mhz */
 116        cpu_ppc_tb_init(env,  TBFREQ);
 117        qemu_register_reset(ppc_heathrow_reset, cpu);
 118    }
 119
 120    /* allocate RAM */
 121    if (ram_size > 2047 * MiB) {
 122        error_report("Too much memory for this machine: %" PRId64 " MB, "
 123                     "maximum 2047 MB", ram_size / MiB);
 124        exit(1);
 125    }
 126
 127    memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
 128                                         ram_size);
 129    memory_region_add_subregion(sysmem, 0, ram);
 130
 131    /* allocate and load BIOS */
 132    memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
 133                           &error_fatal);
 134
 135    if (bios_name == NULL)
 136        bios_name = PROM_FILENAME;
 137    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 138    memory_region_set_readonly(bios, true);
 139    memory_region_add_subregion(sysmem, PROM_ADDR, bios);
 140
 141    /* Load OpenBIOS (ELF) */
 142    if (filename) {
 143        bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
 144                             1, PPC_ELF_MACHINE, 0, 0);
 145        g_free(filename);
 146    } else {
 147        bios_size = -1;
 148    }
 149    if (bios_size < 0 || bios_size > BIOS_SIZE) {
 150        error_report("could not load PowerPC bios '%s'", bios_name);
 151        exit(1);
 152    }
 153
 154    if (linux_boot) {
 155        uint64_t lowaddr = 0;
 156        int bswap_needed;
 157
 158#ifdef BSWAP_NEEDED
 159        bswap_needed = 1;
 160#else
 161        bswap_needed = 0;
 162#endif
 163        kernel_base = KERNEL_LOAD_ADDR;
 164        kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 165                               NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
 166                               0, 0);
 167        if (kernel_size < 0)
 168            kernel_size = load_aout(kernel_filename, kernel_base,
 169                                    ram_size - kernel_base, bswap_needed,
 170                                    TARGET_PAGE_SIZE);
 171        if (kernel_size < 0)
 172            kernel_size = load_image_targphys(kernel_filename,
 173                                              kernel_base,
 174                                              ram_size - kernel_base);
 175        if (kernel_size < 0) {
 176            error_report("could not load kernel '%s'", kernel_filename);
 177            exit(1);
 178        }
 179        /* load initrd */
 180        if (initrd_filename) {
 181            initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 182            initrd_size = load_image_targphys(initrd_filename, initrd_base,
 183                                              ram_size - initrd_base);
 184            if (initrd_size < 0) {
 185                error_report("could not load initial ram disk '%s'",
 186                             initrd_filename);
 187                exit(1);
 188            }
 189            cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
 190        } else {
 191            initrd_base = 0;
 192            initrd_size = 0;
 193            cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 194        }
 195        ppc_boot_device = 'm';
 196    } else {
 197        kernel_base = 0;
 198        kernel_size = 0;
 199        initrd_base = 0;
 200        initrd_size = 0;
 201        ppc_boot_device = '\0';
 202        for (i = 0; boot_device[i] != '\0'; i++) {
 203            /* TOFIX: for now, the second IDE channel is not properly
 204             *        used by OHW. The Mac floppy disk are not emulated.
 205             *        For now, OHW cannot boot from the network.
 206             */
 207#if 0
 208            if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 209                ppc_boot_device = boot_device[i];
 210                break;
 211            }
 212#else
 213            if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 214                ppc_boot_device = boot_device[i];
 215                break;
 216            }
 217#endif
 218        }
 219        if (ppc_boot_device == '\0') {
 220            error_report("No valid boot device for G3 Beige machine");
 221            exit(1);
 222        }
 223    }
 224
 225    /* XXX: we register only 1 output pin for heathrow PIC */
 226    pic_dev = qdev_create(NULL, TYPE_HEATHROW);
 227    qdev_init_nofail(pic_dev);
 228
 229    /* Connect the heathrow PIC outputs to the 6xx bus */
 230    for (i = 0; i < smp_cpus; i++) {
 231        switch (PPC_INPUT(env)) {
 232        case PPC_FLAGS_INPUT_6xx:
 233            qdev_connect_gpio_out(pic_dev, 0,
 234                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
 235            break;
 236        default:
 237            error_report("Bus model not supported on OldWorld Mac machine");
 238            exit(1);
 239        }
 240    }
 241
 242    /* Timebase Frequency */
 243    if (kvm_enabled()) {
 244        tbfreq = kvmppc_get_tbfreq();
 245    } else {
 246        tbfreq = TBFREQ;
 247    }
 248
 249    /* init basic PC hardware */
 250    if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 251        error_report("Only 6xx bus is supported on heathrow machine");
 252        exit(1);
 253    }
 254
 255    /* Grackle PCI host bridge */
 256    dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
 257    object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 258                             &error_abort);
 259    qdev_init_nofail(dev);
 260    s = SYS_BUS_DEVICE(dev);
 261    sysbus_mmio_map(s, 0, GRACKLE_BASE);
 262    sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
 263    /* PCI hole */
 264    memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 265                                sysbus_mmio_get_region(s, 2));
 266    /* Register 2 MB of ISA IO space */
 267    memory_region_add_subregion(get_system_memory(), 0xfe000000,
 268                                sysbus_mmio_get_region(s, 3));
 269
 270    pci_bus = PCI_HOST_BRIDGE(dev)->bus;
 271
 272    pci_vga_init(pci_bus);
 273
 274    for (i = 0; i < nb_nics; i++) {
 275        pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
 276    }
 277
 278    ide_drive_get(hd, ARRAY_SIZE(hd));
 279
 280    /* MacIO */
 281    macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
 282    dev = DEVICE(macio);
 283    qdev_prop_set_uint64(dev, "frequency", tbfreq);
 284    object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
 285                             &error_abort);
 286    qdev_init_nofail(dev);
 287
 288    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 289                                                        "ide[0]"));
 290    macio_ide_init_drives(macio_ide, hd);
 291
 292    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 293                                                        "ide[1]"));
 294    macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 295
 296    dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 297    adb_bus = qdev_get_child_bus(dev, "adb.0");
 298    dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 299    qdev_init_nofail(dev);
 300    dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 301    qdev_init_nofail(dev);
 302
 303    if (machine_usb(machine)) {
 304        pci_create_simple(pci_bus, -1, "pci-ohci");
 305    }
 306
 307    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 308        graphic_depth = 15;
 309
 310    /* No PCI init: the BIOS will do it */
 311
 312    fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2);
 313    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 314    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
 315    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 316    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
 317    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 318    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 319    if (kernel_cmdline) {
 320        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 321        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 322    } else {
 323        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 324    }
 325    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 326    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 327    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 328
 329    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 330    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 331    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 332
 333    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 334    if (kvm_enabled()) {
 335#ifdef CONFIG_KVM
 336        uint8_t *hypercall;
 337
 338        hypercall = g_malloc(16);
 339        kvmppc_get_hypercall(env, hypercall, 16);
 340        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 341        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 342#endif
 343    }
 344    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 345    /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 346    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 347    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 348
 349    /* MacOS NDRV VGA driver */
 350    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
 351    if (filename) {
 352        ndrv_size = get_image_size(filename);
 353        if (ndrv_size != -1) {
 354            ndrv_file = g_malloc(ndrv_size);
 355            ndrv_size = load_image(filename, ndrv_file);
 356
 357            fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
 358        }
 359        g_free(filename);
 360    }
 361
 362    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 363}
 364
 365static int heathrow_kvm_type(const char *arg)
 366{
 367    /* Always force PR KVM */
 368    return 2;
 369}
 370
 371static void heathrow_class_init(ObjectClass *oc, void *data)
 372{
 373    MachineClass *mc = MACHINE_CLASS(oc);
 374
 375    mc->desc = "Heathrow based PowerMAC";
 376    mc->init = ppc_heathrow_init;
 377    mc->block_default_type = IF_IDE;
 378    mc->max_cpus = MAX_CPUS;
 379#ifndef TARGET_PPC64
 380    mc->is_default = 1;
 381#endif
 382    /* TOFIX "cad" when Mac floppy is implemented */
 383    mc->default_boot_order = "cd";
 384    mc->kvm_type = heathrow_kvm_type;
 385    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
 386    mc->default_display = "std";
 387}
 388
 389static const TypeInfo ppc_heathrow_machine_info = {
 390    .name          = MACHINE_TYPE_NAME("g3beige"),
 391    .parent        = TYPE_MACHINE,
 392    .class_init    = heathrow_class_init
 393};
 394
 395static void ppc_heathrow_register_types(void)
 396{
 397    type_register_static(&ppc_heathrow_machine_info);
 398}
 399
 400type_init(ppc_heathrow_register_types);
 401