LXR qemu/hw/sparc64/niagara.c

   1/*
   2 * QEMU Sun4v/Niagara System Emulator
   3 *
   4 * Copyright (c) 2016 Artyom Tarasenko
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#include "qemu/osdep.h"
  26#include "qemu/units.h"
  27#include "qemu-common.h"
  28#include "cpu.h"
  29#include "hw/hw.h"
  30#include "hw/boards.h"
  31#include "hw/char/serial.h"
  32#include "hw/empty_slot.h"
  33#include "hw/loader.h"
  34#include "hw/sparc/sparc64.h"
  35#include "hw/timer/sun4v-rtc.h"
  36#include "exec/address-spaces.h"
  37#include "sysemu/block-backend.h"
  38#include "qemu/error-report.h"
  39#include "sysemu/qtest.h"
  40
  41
  42typedef struct NiagaraBoardState {
  43    MemoryRegion hv_ram;
  44    MemoryRegion partition_ram;
  45    MemoryRegion nvram;
  46    MemoryRegion md_rom;
  47    MemoryRegion hv_rom;
  48    MemoryRegion vdisk_ram;
  49    MemoryRegion prom;
  50} NiagaraBoardState;
  51
  52#define NIAGARA_HV_RAM_BASE 0x100000ULL
  53#define NIAGARA_HV_RAM_SIZE 0x3f00000ULL /* 63 MiB */
  54
  55#define NIAGARA_PARTITION_RAM_BASE 0x80000000ULL
  56
  57#define NIAGARA_UART_BASE   0x1f10000000ULL
  58
  59#define NIAGARA_NVRAM_BASE  0x1f11000000ULL
  60#define NIAGARA_NVRAM_SIZE  0x2000
  61
  62#define NIAGARA_MD_ROM_BASE 0x1f12000000ULL
  63#define NIAGARA_MD_ROM_SIZE 0x2000
  64
  65#define NIAGARA_HV_ROM_BASE 0x1f12080000ULL
  66#define NIAGARA_HV_ROM_SIZE 0x2000
  67
  68#define NIAGARA_IOBBASE     0x9800000000ULL
  69#define NIAGARA_IOBSIZE     0x0100000000ULL
  70
  71#define NIAGARA_VDISK_BASE  0x1f40000000ULL
  72#define NIAGARA_RTC_BASE    0xfff0c1fff8ULL
  73#define NIAGARA_UART_BASE   0x1f10000000ULL
  74
  75/* Firmware layout
  76 *
  77 * |------------------|
  78 * |   openboot.bin   |
  79 * |------------------| PROM_ADDR + OBP_OFFSET
  80 * |      q.bin       |
  81 * |------------------| PROM_ADDR + Q_OFFSET
  82 * |     reset.bin    |
  83 * |------------------| PROM_ADDR
  84 */
  85#define NIAGARA_PROM_BASE   0xfff0000000ULL
  86#define NIAGARA_Q_OFFSET    0x10000ULL
  87#define NIAGARA_OBP_OFFSET  0x80000ULL
  88#define PROM_SIZE_MAX       (4 * MiB)
  89
  90static void add_rom_or_fail(const char *file, const hwaddr addr)
  91{
  92    /* XXX remove qtest_enabled() check once firmware files are
  93     * in the qemu tree
  94     */
  95    if (!qtest_enabled() && rom_add_file_fixed(file, addr, -1)) {
  96        error_report("Unable to load a firmware for -M niagara");
  97        exit(1);
  98    }
  99
 100}
 101/* Niagara hardware initialisation */
 102static void niagara_init(MachineState *machine)
 103{
 104    NiagaraBoardState *s = g_new(NiagaraBoardState, 1);
 105    DriveInfo *dinfo = drive_get_next(IF_PFLASH);
 106    MemoryRegion *sysmem = get_system_memory();
 107
 108    /* init CPUs */
 109    sparc64_cpu_devinit(machine->cpu_type, NIAGARA_PROM_BASE);
 110    /* set up devices */
 111    memory_region_allocate_system_memory(&s->hv_ram, NULL, "sun4v-hv.ram",
 112                                         NIAGARA_HV_RAM_SIZE);
 113    memory_region_add_subregion(sysmem, NIAGARA_HV_RAM_BASE, &s->hv_ram);
 114
 115    memory_region_allocate_system_memory(&s->partition_ram, NULL,
 116                                         "sun4v-partition.ram",
 117                                         machine->ram_size);
 118    memory_region_add_subregion(sysmem, NIAGARA_PARTITION_RAM_BASE,
 119                                &s->partition_ram);
 120
 121    memory_region_allocate_system_memory(&s->nvram, NULL,
 122                                         "sun4v.nvram", NIAGARA_NVRAM_SIZE);
 123    memory_region_add_subregion(sysmem, NIAGARA_NVRAM_BASE, &s->nvram);
 124    memory_region_allocate_system_memory(&s->md_rom, NULL,
 125                                         "sun4v-md.rom", NIAGARA_MD_ROM_SIZE);
 126    memory_region_add_subregion(sysmem, NIAGARA_MD_ROM_BASE, &s->md_rom);
 127    memory_region_allocate_system_memory(&s->hv_rom, NULL,
 128                                         "sun4v-hv.rom", NIAGARA_HV_ROM_SIZE);
 129    memory_region_add_subregion(sysmem, NIAGARA_HV_ROM_BASE, &s->hv_rom);
 130    memory_region_allocate_system_memory(&s->prom, NULL,
 131                                         "sun4v.prom", PROM_SIZE_MAX);
 132    memory_region_add_subregion(sysmem, NIAGARA_PROM_BASE, &s->prom);
 133
 134    add_rom_or_fail("nvram1", NIAGARA_NVRAM_BASE);
 135    add_rom_or_fail("1up-md.bin", NIAGARA_MD_ROM_BASE);
 136    add_rom_or_fail("1up-hv.bin", NIAGARA_HV_ROM_BASE);
 137
 138    add_rom_or_fail("reset.bin", NIAGARA_PROM_BASE);
 139    add_rom_or_fail("q.bin", NIAGARA_PROM_BASE + NIAGARA_Q_OFFSET);
 140    add_rom_or_fail("openboot.bin", NIAGARA_PROM_BASE + NIAGARA_OBP_OFFSET);
 141
 142    /* the virtual ramdisk is kind of initrd, but it resides
 143       outside of the partition RAM */
 144    if (dinfo) {
 145        BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
 146        int size = blk_getlength(blk);
 147        if (size > 0) {
 148            memory_region_allocate_system_memory(&s->vdisk_ram, NULL,
 149                                                 "sun4v_vdisk.ram", size);
 150            memory_region_add_subregion(get_system_memory(),
 151                                        NIAGARA_VDISK_BASE, &s->vdisk_ram);
 152            dinfo->is_default = 1;
 153            rom_add_file_fixed(blk_bs(blk)->filename, NIAGARA_VDISK_BASE, -1);
 154        } else {
 155            error_report("could not load ram disk '%s'",
 156                         blk_bs(blk)->filename);
 157            exit(1);
 158        }
 159    }
 160    if (serial_hd(0)) {
 161        serial_mm_init(sysmem, NIAGARA_UART_BASE, 0, NULL, 115200,
 162                       serial_hd(0), DEVICE_BIG_ENDIAN);
 163    }
 164    empty_slot_init(NIAGARA_IOBBASE, NIAGARA_IOBSIZE);
 165    sun4v_rtc_init(NIAGARA_RTC_BASE);
 166}
 167
 168static void niagara_class_init(ObjectClass *oc, void *data)
 169{
 170    MachineClass *mc = MACHINE_CLASS(oc);
 171
 172    mc->desc = "Sun4v platform, Niagara";
 173    mc->init = niagara_init;
 174    mc->max_cpus = 1; /* XXX for now */
 175    mc->default_boot_order = "c";
 176    mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Sun-UltraSparc-T1");
 177}
 178
 179static const TypeInfo niagara_type = {
 180    .name = MACHINE_TYPE_NAME("niagara"),
 181    .parent = TYPE_MACHINE,
 182    .class_init = niagara_class_init,
 183};
 184
 185static void niagara_register_types(void)
 186{
 187    type_register_static(&niagara_type);
 188}
 189
 190type_init(niagara_register_types)
 191