1#ifndef QEMU_ELF_H 2#define QEMU_ELF_H 3 4/* 32-bit ELF base types. */ 5typedef uint32_t Elf32_Addr; 6typedef uint16_t Elf32_Half; 7typedef uint32_t Elf32_Off; 8typedef int32_t Elf32_Sword; 9typedef uint32_t Elf32_Word; 10 11/* 64-bit ELF base types. */ 12typedef uint64_t Elf64_Addr; 13typedef uint16_t Elf64_Half; 14typedef int16_t Elf64_SHalf; 15typedef uint64_t Elf64_Off; 16typedef int32_t Elf64_Sword; 17typedef uint32_t Elf64_Word; 18typedef uint64_t Elf64_Xword; 19typedef int64_t Elf64_Sxword; 20 21/* These constants are for the segment types stored in the image headers */ 22#define PT_NULL 0 23#define PT_LOAD 1 24#define PT_DYNAMIC 2 25#define PT_INTERP 3 26#define PT_NOTE 4 27#define PT_SHLIB 5 28#define PT_PHDR 6 29#define PT_LOPROC 0x70000000 30#define PT_HIPROC 0x7fffffff 31#define PT_MIPS_REGINFO 0x70000000 32#define PT_MIPS_OPTIONS 0x70000001 33 34/* Flags in the e_flags field of the header */ 35/* MIPS architecture level. */ 36#define EF_MIPS_ARCH 0xf0000000 37 38/* Legal values for MIPS architecture level. */ 39#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ 40#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ 41#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ 42#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ 43#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ 44#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ 45#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ 46#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32r2 code. */ 47#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64r2 code. */ 48#define EF_MIPS_ARCH_32R6 0x90000000 /* MIPS32r6 code. */ 49#define EF_MIPS_ARCH_64R6 0xa0000000 /* MIPS64r6 code. */ 50 51/* The ABI of a file. */ 52#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ 53#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */ 54 55#define EF_MIPS_NOREORDER 0x00000001 56#define EF_MIPS_PIC 0x00000002 57#define EF_MIPS_CPIC 0x00000004 58#define EF_MIPS_ABI2 0x00000020 59#define EF_MIPS_OPTIONS_FIRST 0x00000080 60#define EF_MIPS_32BITMODE 0x00000100 61#define EF_MIPS_ABI 0x0000f000 62#define EF_MIPS_FP64 0x00000200 63#define EF_MIPS_NAN2008 0x00000400 64#define EF_MIPS_ARCH 0xf0000000 65 66/* These constants define the different elf file types */ 67#define ET_NONE 0 68#define ET_REL 1 69#define ET_EXEC 2 70#define ET_DYN 3 71#define ET_CORE 4 72#define ET_LOPROC 0xff00 73#define ET_HIPROC 0xffff 74 75/* These constants define the various ELF target machines */ 76#define EM_NONE 0 77#define EM_M32 1 78#define EM_SPARC 2 79#define EM_386 3 80#define EM_68K 4 81#define EM_88K 5 82#define EM_486 6 /* Perhaps disused */ 83#define EM_860 7 84 85#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */ 86 87#define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */ 88 89#define EM_PARISC 15 /* HPPA */ 90 91#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */ 92 93#define EM_PPC 20 /* PowerPC */ 94#define EM_PPC64 21 /* PowerPC64 */ 95 96#define EM_ARM 40 /* ARM */ 97 98#define EM_SH 42 /* SuperH */ 99 100#define EM_SPARCV9 43 /* SPARC v9 64-bit */ 101 102#define EM_TRICORE 44 /* Infineon TriCore */ 103 104#define EM_IA_64 50 /* HP/Intel IA-64 */ 105 106#define EM_X86_64 62 /* AMD x86-64 */ 107 108#define EM_S390 22 /* IBM S/390 */ 109 110#define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */ 111 112#define EM_V850 87 /* NEC v850 */ 113 114#define EM_H8_300H 47 /* Hitachi H8/300H */ 115#define EM_H8S 48 /* Hitachi H8S */ 116#define EM_LATTICEMICO32 138 /* LatticeMico32 */ 117 118#define EM_OPENRISC 92 /* OpenCores OpenRISC */ 119 120#define EM_UNICORE32 110 /* UniCore32 */ 121 122#define EM_RISCV 243 /* RISC-V */ 123 124/* 125 * This is an interim value that we will use until the committee comes 126 * up with a final number. 127 */ 128#define EM_ALPHA 0x9026 129 130/* Bogus old v850 magic number, used by old tools. */ 131#define EM_CYGNUS_V850 0x9080 132 133/* 134 * This is the old interim value for S/390 architecture 135 */ 136#define EM_S390_OLD 0xA390 137 138#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */ 139 140#define EM_MICROBLAZE 189 141#define EM_MICROBLAZE_OLD 0xBAAB 142 143#define EM_XTENSA 94 /* Tensilica Xtensa */ 144 145#define EM_AARCH64 183 146 147#define EM_TILEGX 191 /* TILE-Gx */ 148 149#define EM_MOXIE 223 /* Moxie processor family */ 150#define EM_MOXIE_OLD 0xFEED 151 152/* This is the info that is needed to parse the dynamic section of the file */ 153#define DT_NULL 0 154#define DT_NEEDED 1 155#define DT_PLTRELSZ 2 156#define DT_PLTGOT 3 157#define DT_HASH 4 158#define DT_STRTAB 5 159#define DT_SYMTAB 6 160#define DT_RELA 7 161#define DT_RELASZ 8 162#define DT_RELAENT 9 163#define DT_STRSZ 10 164#define DT_SYMENT 11 165#define DT_INIT 12 166#define DT_FINI 13 167#define DT_SONAME 14 168#define DT_RPATH 15 169#define DT_SYMBOLIC 16 170#define DT_REL 17 171#define DT_RELSZ 18 172#define DT_RELENT 19 173#define DT_PLTREL 20 174#define DT_DEBUG 21 175#define DT_TEXTREL 22 176#define DT_JMPREL 23 177#define DT_BINDNOW 24 178#define DT_INIT_ARRAY 25 179#define DT_FINI_ARRAY 26 180#define DT_INIT_ARRAYSZ 27 181#define DT_FINI_ARRAYSZ 28 182#define DT_RUNPATH 29 183#define DT_FLAGS 30 184#define DT_LOOS 0x6000000d 185#define DT_HIOS 0x6ffff000 186#define DT_LOPROC 0x70000000 187#define DT_HIPROC 0x7fffffff 188 189/* DT_ entries which fall between DT_VALRNGLO and DT_VALRNDHI use 190 the d_val field of the Elf*_Dyn structure. I.e. they contain scalars. */ 191#define DT_VALRNGLO 0x6ffffd00 192#define DT_VALRNGHI 0x6ffffdff 193 194/* DT_ entries which fall between DT_ADDRRNGLO and DT_ADDRRNGHI use 195 the d_ptr field of the Elf*_Dyn structure. I.e. they contain pointers. */ 196#define DT_ADDRRNGLO 0x6ffffe00 197#define DT_ADDRRNGHI 0x6ffffeff 198 199#define DT_VERSYM 0x6ffffff0 200#define DT_RELACOUNT 0x6ffffff9 201#define DT_RELCOUNT 0x6ffffffa 202#define DT_FLAGS_1 0x6ffffffb 203#define DT_VERDEF 0x6ffffffc 204#define DT_VERDEFNUM 0x6ffffffd 205#define DT_VERNEED 0x6ffffffe 206#define DT_VERNEEDNUM 0x6fffffff 207 208#define DT_MIPS_RLD_VERSION 0x70000001 209#define DT_MIPS_TIME_STAMP 0x70000002 210#define DT_MIPS_ICHECKSUM 0x70000003 211#define DT_MIPS_IVERSION 0x70000004 212#define DT_MIPS_FLAGS 0x70000005 213 #define RHF_NONE 0 214 #define RHF_HARDWAY 1 215 #define RHF_NOTPOT 2 216#define DT_MIPS_BASE_ADDRESS 0x70000006 217#define DT_MIPS_CONFLICT 0x70000008 218#define DT_MIPS_LIBLIST 0x70000009 219#define DT_MIPS_LOCAL_GOTNO 0x7000000a 220#define DT_MIPS_CONFLICTNO 0x7000000b 221#define DT_MIPS_LIBLISTNO 0x70000010 222#define DT_MIPS_SYMTABNO 0x70000011 223#define DT_MIPS_UNREFEXTNO 0x70000012 224#define DT_MIPS_GOTSYM 0x70000013 225#define DT_MIPS_HIPAGENO 0x70000014 226#define DT_MIPS_RLD_MAP 0x70000016 227 228/* This info is needed when parsing the symbol table */ 229#define STB_LOCAL 0 230#define STB_GLOBAL 1 231#define STB_WEAK 2 232 233#define STT_NOTYPE 0 234#define STT_OBJECT 1 235#define STT_FUNC 2 236#define STT_SECTION 3 237#define STT_FILE 4 238 239#define ELF_ST_BIND(x) ((x) >> 4) 240#define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf) 241#define ELF_ST_INFO(bind, type) (((bind) << 4) | ((type) & 0xf)) 242#define ELF32_ST_BIND(x) ELF_ST_BIND(x) 243#define ELF32_ST_TYPE(x) ELF_ST_TYPE(x) 244#define ELF64_ST_BIND(x) ELF_ST_BIND(x) 245#define ELF64_ST_TYPE(x) ELF_ST_TYPE(x) 246 247/* Symbolic values for the entries in the auxiliary table 248 put on the initial stack */ 249#define AT_NULL 0 /* end of vector */ 250#define AT_IGNORE 1 /* entry should be ignored */ 251#define AT_EXECFD 2 /* file descriptor of program */ 252#define AT_PHDR 3 /* program headers for program */ 253#define AT_PHENT 4 /* size of program header entry */ 254#define AT_PHNUM 5 /* number of program headers */ 255#define AT_PAGESZ 6 /* system page size */ 256#define AT_BASE 7 /* base address of interpreter */ 257#define AT_FLAGS 8 /* flags */ 258#define AT_ENTRY 9 /* entry point of program */ 259#define AT_NOTELF 10 /* program is not ELF */ 260#define AT_UID 11 /* real uid */ 261#define AT_EUID 12 /* effective uid */ 262#define AT_GID 13 /* real gid */ 263#define AT_EGID 14 /* effective gid */ 264#define AT_PLATFORM 15 /* string identifying CPU for optimizations */ 265#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ 266#define AT_CLKTCK 17 /* frequency at which times() increments */ 267#define AT_FPUCW 18 /* info about fpu initialization by kernel */ 268#define AT_DCACHEBSIZE 19 /* data cache block size */ 269#define AT_ICACHEBSIZE 20 /* instruction cache block size */ 270#define AT_UCACHEBSIZE 21 /* unified cache block size */ 271#define AT_IGNOREPPC 22 /* ppc only; entry should be ignored */ 272#define AT_SECURE 23 /* boolean, was exec suid-like? */ 273#define AT_BASE_PLATFORM 24 /* string identifying real platforms */ 274#define AT_RANDOM 25 /* address of 16 random bytes */ 275#define AT_HWCAP2 26 /* extension of AT_HWCAP */ 276#define AT_EXECFN 31 /* filename of the executable */ 277#define AT_SYSINFO 32 /* address of kernel entry point */ 278#define AT_SYSINFO_EHDR 33 /* address of kernel vdso */ 279#define AT_L1I_CACHESHAPE 34 /* shapes of the caches: */ 280#define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */ 281#define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */ 282#define AT_L3_CACHESHAPE 37 /* val&~255: cache size. */ 283 284typedef struct dynamic{ 285 Elf32_Sword d_tag; 286 union{ 287 Elf32_Sword d_val; 288 Elf32_Addr d_ptr; 289 } d_un; 290} Elf32_Dyn; 291 292typedef struct { 293 Elf64_Sxword d_tag; /* entry tag value */ 294 union { 295 Elf64_Xword d_val; 296 Elf64_Addr d_ptr; 297 } d_un; 298} Elf64_Dyn; 299 300/* The following are used with relocations */ 301#define ELF32_R_SYM(x) ((x) >> 8) 302#define ELF32_R_TYPE(x) ((x) & 0xff) 303 304#define ELF64_R_SYM(i) ((i) >> 32) 305#define ELF64_R_TYPE(i) ((i) & 0xffffffff) 306#define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000) 307 308#define R_386_NONE 0 309#define R_386_32 1 310#define R_386_PC32 2 311#define R_386_GOT32 3 312#define R_386_PLT32 4 313#define R_386_COPY 5 314#define R_386_GLOB_DAT 6 315#define R_386_JMP_SLOT 7 316#define R_386_RELATIVE 8 317#define R_386_GOTOFF 9 318#define R_386_GOTPC 10 319#define R_386_NUM 11 320/* Not a dynamic reloc, so not included in R_386_NUM. Used in TCG. */ 321#define R_386_PC8 23 322 323#define R_MIPS_NONE 0 324#define R_MIPS_16 1 325#define R_MIPS_32 2 326#define R_MIPS_REL32 3 327#define R_MIPS_26 4 328#define R_MIPS_HI16 5 329#define R_MIPS_LO16 6 330#define R_MIPS_GPREL16 7 331#define R_MIPS_LITERAL 8 332#define R_MIPS_GOT16 9 333#define R_MIPS_PC16 10 334#define R_MIPS_CALL16 11 335#define R_MIPS_GPREL32 12 336/* The remaining relocs are defined on Irix, although they are not 337 in the MIPS ELF ABI. */ 338#define R_MIPS_UNUSED1 13 339#define R_MIPS_UNUSED2 14 340#define R_MIPS_UNUSED3 15 341#define R_MIPS_SHIFT5 16 342#define R_MIPS_SHIFT6 17 343#define R_MIPS_64 18 344#define R_MIPS_GOT_DISP 19 345#define R_MIPS_GOT_PAGE 20 346#define R_MIPS_GOT_OFST 21 347/* 348 * The following two relocation types are specified in the MIPS ABI 349 * conformance guide version 1.2 but not yet in the psABI. 350 */ 351#define R_MIPS_GOTHI16 22 352#define R_MIPS_GOTLO16 23 353#define R_MIPS_SUB 24 354#define R_MIPS_INSERT_A 25 355#define R_MIPS_INSERT_B 26 356#define R_MIPS_DELETE 27 357#define R_MIPS_HIGHER 28 358#define R_MIPS_HIGHEST 29 359/* 360 * The following two relocation types are specified in the MIPS ABI 361 * conformance guide version 1.2 but not yet in the psABI. 362 */ 363#define R_MIPS_CALLHI16 30 364#define R_MIPS_CALLLO16 31 365/* 366 * This range is reserved for vendor specific relocations. 367 */ 368#define R_MIPS_LOVENDOR 100 369#define R_MIPS_HIVENDOR 127 370 371 372/* SUN SPARC specific definitions. */ 373 374/* Values for Elf64_Ehdr.e_flags. */ 375 376#define EF_SPARCV9_MM 3 377#define EF_SPARCV9_TSO 0 378#define EF_SPARCV9_PSO 1 379#define EF_SPARCV9_RMO 2 380#define EF_SPARC_LEDATA 0x800000 /* little endian data */ 381#define EF_SPARC_EXT_MASK 0xFFFF00 382#define EF_SPARC_32PLUS 0x000100 /* generic V8+ features */ 383#define EF_SPARC_SUN_US1 0x000200 /* Sun UltraSPARC1 extensions */ 384#define EF_SPARC_HAL_R1 0x000400 /* HAL R1 extensions */ 385#define EF_SPARC_SUN_US3 0x000800 /* Sun UltraSPARCIII extensions */ 386 387/* 388 * Sparc ELF relocation types 389 */ 390#define R_SPARC_NONE 0 391#define R_SPARC_8 1 392#define R_SPARC_16 2 393#define R_SPARC_32 3 394#define R_SPARC_DISP8 4 395#define R_SPARC_DISP16 5 396#define R_SPARC_DISP32 6 397#define R_SPARC_WDISP30 7 398#define R_SPARC_WDISP22 8 399#define R_SPARC_HI22 9 400#define R_SPARC_22 10 401#define R_SPARC_13 11 402#define R_SPARC_LO10 12 403#define R_SPARC_GOT10 13 404#define R_SPARC_GOT13 14 405#define R_SPARC_GOT22 15 406#define R_SPARC_PC10 16 407#define R_SPARC_PC22 17 408#define R_SPARC_WPLT30 18 409#define R_SPARC_COPY 19 410#define R_SPARC_GLOB_DAT 20 411#define R_SPARC_JMP_SLOT 21 412#define R_SPARC_RELATIVE 22 413#define R_SPARC_UA32 23 414#define R_SPARC_PLT32 24 415#define R_SPARC_HIPLT22 25 416#define R_SPARC_LOPLT10 26 417#define R_SPARC_PCPLT32 27 418#define R_SPARC_PCPLT22 28 419#define R_SPARC_PCPLT10 29 420#define R_SPARC_10 30 421#define R_SPARC_11 31 422#define R_SPARC_64 32 423#define R_SPARC_OLO10 33 424#define R_SPARC_HH22 34 425#define R_SPARC_HM10 35 426#define R_SPARC_LM22 36 427#define R_SPARC_WDISP16 40 428#define R_SPARC_WDISP19 41 429#define R_SPARC_7 43 430#define R_SPARC_5 44 431#define R_SPARC_6 45 432 433/* Bits present in AT_HWCAP for ARM. */ 434 435#define HWCAP_ARM_SWP (1 << 0) 436#define HWCAP_ARM_HALF (1 << 1) 437#define HWCAP_ARM_THUMB (1 << 2) 438#define HWCAP_ARM_26BIT (1 << 3) 439#define HWCAP_ARM_FAST_MULT (1 << 4) 440#define HWCAP_ARM_FPA (1 << 5) 441#define HWCAP_ARM_VFP (1 << 6) 442#define HWCAP_ARM_EDSP (1 << 7) 443#define HWCAP_ARM_JAVA (1 << 8) 444#define HWCAP_ARM_IWMMXT (1 << 9) 445#define HWCAP_ARM_CRUNCH (1 << 10) 446#define HWCAP_ARM_THUMBEE (1 << 11) 447#define HWCAP_ARM_NEON (1 << 12) 448#define HWCAP_ARM_VFPv3 (1 << 13) 449#define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ 450#define HWCAP_ARM_TLS (1 << 15) 451#define HWCAP_ARM_VFPv4 (1 << 16) 452#define HWCAP_ARM_IDIVA (1 << 17) 453#define HWCAP_ARM_IDIVT (1 << 18) 454#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 455#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs */ 456#define HWCAP_LPAE (1 << 20) 457 458/* Bits present in AT_HWCAP for PowerPC. */ 459 460#define PPC_FEATURE_32 0x80000000 461#define PPC_FEATURE_64 0x40000000 462#define PPC_FEATURE_601_INSTR 0x20000000 463#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 464#define PPC_FEATURE_HAS_FPU 0x08000000 465#define PPC_FEATURE_HAS_MMU 0x04000000 466#define PPC_FEATURE_HAS_4xxMAC 0x02000000 467#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 468#define PPC_FEATURE_HAS_SPE 0x00800000 469#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 470#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 471#define PPC_FEATURE_NO_TB 0x00100000 472#define PPC_FEATURE_POWER4 0x00080000 473#define PPC_FEATURE_POWER5 0x00040000 474#define PPC_FEATURE_POWER5_PLUS 0x00020000 475#define PPC_FEATURE_CELL 0x00010000 476#define PPC_FEATURE_BOOKE 0x00008000 477#define PPC_FEATURE_SMT 0x00004000 478#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 479#define PPC_FEATURE_ARCH_2_05 0x00001000 480#define PPC_FEATURE_PA6T 0x00000800 481#define PPC_FEATURE_HAS_DFP 0x00000400 482#define PPC_FEATURE_POWER6_EXT 0x00000200 483#define PPC_FEATURE_ARCH_2_06 0x00000100 484#define PPC_FEATURE_HAS_VSX 0x00000080 485 486#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \ 487 0x00000040 488 489#define PPC_FEATURE_TRUE_LE 0x00000002 490#define PPC_FEATURE_PPC_LE 0x00000001 491 492/* Bits present in AT_HWCAP2 for PowerPC. */ 493 494#define PPC_FEATURE2_ARCH_2_07 0x80000000 495#define PPC_FEATURE2_HAS_HTM 0x40000000 496#define PPC_FEATURE2_HAS_DSCR 0x20000000 497#define PPC_FEATURE2_HAS_EBB 0x10000000 498#define PPC_FEATURE2_HAS_ISEL 0x08000000 499#define PPC_FEATURE2_HAS_TAR 0x04000000 500#define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000 501#define PPC_FEATURE2_HTM_NOSC 0x01000000 502#define PPC_FEATURE2_ARCH_3_00 0x00800000 503#define PPC_FEATURE2_HAS_IEEE128 0x00400000 504 505/* Bits present in AT_HWCAP for Sparc. */ 506 507#define HWCAP_SPARC_FLUSH 0x00000001 508#define HWCAP_SPARC_STBAR 0x00000002 509#define HWCAP_SPARC_SWAP 0x00000004 510#define HWCAP_SPARC_MULDIV 0x00000008 511#define HWCAP_SPARC_V9 0x00000010 512#define HWCAP_SPARC_ULTRA3 0x00000020 513#define HWCAP_SPARC_BLKINIT 0x00000040 514#define HWCAP_SPARC_N2 0x00000080 515#define HWCAP_SPARC_MUL32 0x00000100 516#define HWCAP_SPARC_DIV32 0x00000200 517#define HWCAP_SPARC_FSMULD 0x00000400 518#define HWCAP_SPARC_V8PLUS 0x00000800 519#define HWCAP_SPARC_POPC 0x00001000 520#define HWCAP_SPARC_VIS 0x00002000 521#define HWCAP_SPARC_VIS2 0x00004000 522#define HWCAP_SPARC_ASI_BLK_INIT 0x00008000 523#define HWCAP_SPARC_FMAF 0x00010000 524#define HWCAP_SPARC_VIS3 0x00020000 525#define HWCAP_SPARC_HPC 0x00040000 526#define HWCAP_SPARC_RANDOM 0x00080000 527#define HWCAP_SPARC_TRANS 0x00100000 528#define HWCAP_SPARC_FJFMAU 0x00200000 529#define HWCAP_SPARC_IMA 0x00400000 530#define HWCAP_SPARC_ASI_CACHE_SPARING 0x00800000 531#define HWCAP_SPARC_PAUSE 0x01000000 532#define HWCAP_SPARC_CBCOND 0x02000000 533#define HWCAP_SPARC_CRYPTO 0x04000000 534 535/* Bits present in AT_HWCAP for s390. */ 536 537#define HWCAP_S390_ESAN3 1 538#define HWCAP_S390_ZARCH 2 539#define HWCAP_S390_STFLE 4 540#define HWCAP_S390_MSA 8 541#define HWCAP_S390_LDISP 16 542#define HWCAP_S390_EIMM 32 543#define HWCAP_S390_DFP 64 544#define HWCAP_S390_HPAGE 128 545#define HWCAP_S390_ETF3EH 256 546#define HWCAP_S390_HIGH_GPRS 512 547#define HWCAP_S390_TE 1024 548 549/* M68K specific definitions. */ 550/* We use the top 24 bits to encode information about the 551 architecture variant. */ 552#define EF_M68K_CPU32 0x00810000 553#define EF_M68K_M68000 0x01000000 554#define EF_M68K_CFV4E 0x00008000 555#define EF_M68K_FIDO 0x02000000 556#define EF_M68K_ARCH_MASK \ 557 (EF_M68K_M68000 | EF_M68K_CPU32 | EF_M68K_CFV4E | EF_M68K_FIDO) 558 559/* We use the bottom 8 bits to encode information about the 560 coldfire variant. If we use any of these bits, the top 24 bits are 561 either 0 or EF_M68K_CFV4E. */ 562#define EF_M68K_CF_ISA_MASK 0x0F /* Which ISA */ 563#define EF_M68K_CF_ISA_A_NODIV 0x01 /* ISA A except for div */ 564#define EF_M68K_CF_ISA_A 0x02 565#define EF_M68K_CF_ISA_A_PLUS 0x03 566#define EF_M68K_CF_ISA_B_NOUSP 0x04 /* ISA_B except for USP */ 567#define EF_M68K_CF_ISA_B 0x05 568#define EF_M68K_CF_ISA_C 0x06 569#define EF_M68K_CF_ISA_C_NODIV 0x07 /* ISA C except for div */ 570#define EF_M68K_CF_MAC_MASK 0x30 571#define EF_M68K_CF_MAC 0x10 /* MAC */ 572#define EF_M68K_CF_EMAC 0x20 /* EMAC */ 573#define EF_M68K_CF_EMAC_B 0x30 /* EMAC_B */ 574#define EF_M68K_CF_FLOAT 0x40 /* Has float insns */ 575#define EF_M68K_CF_MASK 0xFF 576 577/* 578 * 68k ELF relocation types 579 */ 580#define R_68K_NONE 0 581#define R_68K_32 1 582#define R_68K_16 2 583#define R_68K_8 3 584#define R_68K_PC32 4 585#define R_68K_PC16 5 586#define R_68K_PC8 6 587#define R_68K_GOT32 7 588#define R_68K_GOT16 8 589#define R_68K_GOT8 9 590#define R_68K_GOT32O 10 591#define R_68K_GOT16O 11 592#define R_68K_GOT8O 12 593#define R_68K_PLT32 13 594#define R_68K_PLT16 14 595#define R_68K_PLT8 15 596#define R_68K_PLT32O 16 597#define R_68K_PLT16O 17 598#define R_68K_PLT8O 18 599#define R_68K_COPY 19 600#define R_68K_GLOB_DAT 20 601#define R_68K_JMP_SLOT 21 602#define R_68K_RELATIVE 22 603 604/* 605 * Alpha ELF relocation types 606 */ 607#define R_ALPHA_NONE 0 /* No reloc */ 608#define R_ALPHA_REFLONG 1 /* Direct 32 bit */ 609#define R_ALPHA_REFQUAD 2 /* Direct 64 bit */ 610#define R_ALPHA_GPREL32 3 /* GP relative 32 bit */ 611#define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */ 612#define R_ALPHA_LITUSE 5 /* Optimization hint for LITERAL */ 613#define R_ALPHA_GPDISP 6 /* Add displacement to GP */ 614#define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */ 615#define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */ 616#define R_ALPHA_SREL16 9 /* PC relative 16 bit */ 617#define R_ALPHA_SREL32 10 /* PC relative 32 bit */ 618#define R_ALPHA_SREL64 11 /* PC relative 64 bit */ 619#define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */ 620#define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */ 621#define R_ALPHA_GPREL16 19 /* GP relative 16 bit */ 622#define R_ALPHA_COPY 24 /* Copy symbol at runtime */ 623#define R_ALPHA_GLOB_DAT 25 /* Create GOT entry */ 624#define R_ALPHA_JMP_SLOT 26 /* Create PLT entry */ 625#define R_ALPHA_RELATIVE 27 /* Adjust by program base */ 626#define R_ALPHA_BRSGP 28 627#define R_ALPHA_TLSGD 29 628#define R_ALPHA_TLS_LDM 30 629#define R_ALPHA_DTPMOD64 31 630#define R_ALPHA_GOTDTPREL 32 631#define R_ALPHA_DTPREL64 33 632#define R_ALPHA_DTPRELHI 34 633#define R_ALPHA_DTPRELLO 35 634#define R_ALPHA_DTPREL16 36 635#define R_ALPHA_GOTTPREL 37 636#define R_ALPHA_TPREL64 38 637#define R_ALPHA_TPRELHI 39 638#define R_ALPHA_TPRELLO 40 639#define R_ALPHA_TPREL16 41 640 641#define SHF_ALPHA_GPREL 0x10000000 642 643 644/* PowerPC specific definitions. */ 645 646/* Processor specific flags for the ELF header e_flags field. */ 647#define EF_PPC64_ABI 0x3 648 649/* PowerPC relocations defined by the ABIs */ 650#define R_PPC_NONE 0 651#define R_PPC_ADDR32 1 /* 32bit absolute address */ 652#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ 653#define R_PPC_ADDR16 3 /* 16bit absolute address */ 654#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ 655#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ 656#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ 657#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ 658#define R_PPC_ADDR14_BRTAKEN 8 659#define R_PPC_ADDR14_BRNTAKEN 9 660#define R_PPC_REL24 10 /* PC relative 26 bit */ 661#define R_PPC_REL14 11 /* PC relative 16 bit */ 662#define R_PPC_REL14_BRTAKEN 12 663#define R_PPC_REL14_BRNTAKEN 13 664#define R_PPC_GOT16 14 665#define R_PPC_GOT16_LO 15 666#define R_PPC_GOT16_HI 16 667#define R_PPC_GOT16_HA 17 668#define R_PPC_PLTREL24 18 669#define R_PPC_COPY 19 670#define R_PPC_GLOB_DAT 20 671#define R_PPC_JMP_SLOT 21 672#define R_PPC_RELATIVE 22 673#define R_PPC_LOCAL24PC 23 674#define R_PPC_UADDR32 24 675#define R_PPC_UADDR16 25 676#define R_PPC_REL32 26 677#define R_PPC_PLT32 27 678#define R_PPC_PLTREL32 28 679#define R_PPC_PLT16_LO 29 680#define R_PPC_PLT16_HI 30 681#define R_PPC_PLT16_HA 31 682#define R_PPC_SDAREL16 32 683#define R_PPC_SECTOFF 33 684#define R_PPC_SECTOFF_LO 34 685#define R_PPC_SECTOFF_HI 35 686#define R_PPC_SECTOFF_HA 36 687/* Keep this the last entry. */ 688#ifndef R_PPC_NUM 689#define R_PPC_NUM 37 690#endif 691 692/* ARM specific declarations */ 693 694/* Processor specific flags for the ELF header e_flags field. */ 695#define EF_ARM_RELEXEC 0x01 696#define EF_ARM_HASENTRY 0x02 697#define EF_ARM_INTERWORK 0x04 698#define EF_ARM_APCS_26 0x08 699#define EF_ARM_APCS_FLOAT 0x10 700#define EF_ARM_PIC 0x20 701#define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */ 702#define EF_NEW_ABI 0x80 703#define EF_OLD_ABI 0x100 704#define EF_ARM_SOFT_FLOAT 0x200 705#define EF_ARM_VFP_FLOAT 0x400 706#define EF_ARM_MAVERICK_FLOAT 0x800 707 708/* Other constants defined in the ARM ELF spec. version B-01. */ 709#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */ 710#define EF_ARM_DYNSYMSUSESEGIDX 0x08 /* NB conflicts with EF_APCS26 */ 711#define EF_ARM_MAPSYMSFIRST 0x10 /* NB conflicts with EF_APCS_FLOAT */ 712#define EF_ARM_EABIMASK 0xFF000000 713 714/* Constants defined in AAELF. */ 715#define EF_ARM_BE8 0x00800000 716#define EF_ARM_LE8 0x00400000 717 718#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK) 719#define EF_ARM_EABI_UNKNOWN 0x00000000 720#define EF_ARM_EABI_VER1 0x01000000 721#define EF_ARM_EABI_VER2 0x02000000 722#define EF_ARM_EABI_VER3 0x03000000 723#define EF_ARM_EABI_VER4 0x04000000 724#define EF_ARM_EABI_VER5 0x05000000 725 726/* Additional symbol types for Thumb */ 727#define STT_ARM_TFUNC 0xd 728 729/* ARM-specific values for sh_flags */ 730#define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ 731#define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined 732 in the input to a link step */ 733 734/* ARM-specific program header flags */ 735#define PF_ARM_SB 0x10000000 /* Segment contains the location 736 addressed by the static base */ 737 738/* ARM relocs. */ 739#define R_ARM_NONE 0 /* No reloc */ 740#define R_ARM_PC24 1 /* PC relative 26 bit branch */ 741#define R_ARM_ABS32 2 /* Direct 32 bit */ 742#define R_ARM_REL32 3 /* PC relative 32 bit */ 743#define R_ARM_PC13 4 744#define R_ARM_ABS16 5 /* Direct 16 bit */ 745#define R_ARM_ABS12 6 /* Direct 12 bit */ 746#define R_ARM_THM_ABS5 7 747#define R_ARM_ABS8 8 /* Direct 8 bit */ 748#define R_ARM_SBREL32 9 749#define R_ARM_THM_PC22 10 750#define R_ARM_THM_PC8 11 751#define R_ARM_AMP_VCALL9 12 752#define R_ARM_SWI24 13 753#define R_ARM_THM_SWI8 14 754#define R_ARM_XPC25 15 755#define R_ARM_THM_XPC22 16 756#define R_ARM_COPY 20 /* Copy symbol at runtime */ 757#define R_ARM_GLOB_DAT 21 /* Create GOT entry */ 758#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */ 759#define R_ARM_RELATIVE 23 /* Adjust by program base */ 760#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */ 761#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */ 762#define R_ARM_GOT32 26 /* 32 bit GOT entry */ 763#define R_ARM_PLT32 27 /* 32 bit PLT address */ 764#define R_ARM_CALL 28 765#define R_ARM_JUMP24 29 766#define R_ARM_GNU_VTENTRY 100 767#define R_ARM_GNU_VTINHERIT 101 768#define R_ARM_THM_PC11 102 /* thumb unconditional branch */ 769#define R_ARM_THM_PC9 103 /* thumb conditional branch */ 770#define R_ARM_RXPC25 249 771#define R_ARM_RSBREL32 250 772#define R_ARM_THM_RPC22 251 773#define R_ARM_RREL32 252 774#define R_ARM_RABS22 253 775#define R_ARM_RPC24 254 776#define R_ARM_RBASE 255 777/* Keep this the last entry. */ 778#define R_ARM_NUM 256 779 780/* ARM Aarch64 relocation types */ 781#define R_AARCH64_NONE 256 /* also accepts R_ARM_NONE (0) */ 782/* static data relocations */ 783#define R_AARCH64_ABS64 257 784#define R_AARCH64_ABS32 258 785#define R_AARCH64_ABS16 259 786#define R_AARCH64_PREL64 260 787#define R_AARCH64_PREL32 261 788#define R_AARCH64_PREL16 262 789/* static aarch64 group relocations */ 790/* group relocs to create unsigned data value or address inline */ 791#define R_AARCH64_MOVW_UABS_G0 263 792#define R_AARCH64_MOVW_UABS_G0_NC 264 793#define R_AARCH64_MOVW_UABS_G1 265 794#define R_AARCH64_MOVW_UABS_G1_NC 266 795#define R_AARCH64_MOVW_UABS_G2 267 796#define R_AARCH64_MOVW_UABS_G2_NC 268 797#define R_AARCH64_MOVW_UABS_G3 269 798/* group relocs to create signed data or offset value inline */ 799#define R_AARCH64_MOVW_SABS_G0 270 800#define R_AARCH64_MOVW_SABS_G1 271 801#define R_AARCH64_MOVW_SABS_G2 272 802/* relocs to generate 19, 21, and 33 bit PC-relative addresses */ 803#define R_AARCH64_LD_PREL_LO19 273 804#define R_AARCH64_ADR_PREL_LO21 274 805#define R_AARCH64_ADR_PREL_PG_HI21 275 806#define R_AARCH64_ADR_PREL_PG_HI21_NC 276 807#define R_AARCH64_ADD_ABS_LO12_NC 277 808#define R_AARCH64_LDST8_ABS_LO12_NC 278 809#define R_AARCH64_LDST16_ABS_LO12_NC 284 810#define R_AARCH64_LDST32_ABS_LO12_NC 285 811#define R_AARCH64_LDST64_ABS_LO12_NC 286 812#define R_AARCH64_LDST128_ABS_LO12_NC 299 813/* relocs for control-flow - all offsets as multiple of 4 */ 814#define R_AARCH64_TSTBR14 279 815#define R_AARCH64_CONDBR19 280 816#define R_AARCH64_JUMP26 282 817#define R_AARCH64_CALL26 283 818/* group relocs to create pc-relative offset inline */ 819#define R_AARCH64_MOVW_PREL_G0 287 820#define R_AARCH64_MOVW_PREL_G0_NC 288 821#define R_AARCH64_MOVW_PREL_G1 289 822#define R_AARCH64_MOVW_PREL_G1_NC 290 823#define R_AARCH64_MOVW_PREL_G2 291 824#define R_AARCH64_MOVW_PREL_G2_NC 292 825#define R_AARCH64_MOVW_PREL_G3 293 826/* group relocs to create a GOT-relative offset inline */ 827#define R_AARCH64_MOVW_GOTOFF_G0 300 828#define R_AARCH64_MOVW_GOTOFF_G0_NC 301 829#define R_AARCH64_MOVW_GOTOFF_G1 302 830#define R_AARCH64_MOVW_GOTOFF_G1_NC 303 831#define R_AARCH64_MOVW_GOTOFF_G2 304 832#define R_AARCH64_MOVW_GOTOFF_G2_NC 305 833#define R_AARCH64_MOVW_GOTOFF_G3 306 834/* GOT-relative data relocs */ 835#define R_AARCH64_GOTREL64 307 836#define R_AARCH64_GOTREL32 308 837/* GOT-relative instr relocs */ 838#define R_AARCH64_GOT_LD_PREL19 309 839#define R_AARCH64_LD64_GOTOFF_LO15 310 840#define R_AARCH64_ADR_GOT_PAGE 311 841#define R_AARCH64_LD64_GOT_LO12_NC 312 842#define R_AARCH64_LD64_GOTPAGE_LO15 313 843/* General Dynamic TLS relocations */ 844#define R_AARCH64_TLSGD_ADR_PREL21 512 845#define R_AARCH64_TLSGD_ADR_PAGE21 513 846#define R_AARCH64_TLSGD_ADD_LO12_NC 514 847#define R_AARCH64_TLSGD_MOVW_G1 515 848#define R_AARCH64_TLSGD_MOVW_G0_NC 516 849/* Local Dynamic TLS relocations */ 850#define R_AARCH64_TLSLD_ADR_PREL21 517 851#define R_AARCH64_TLSLD_ADR_PAGE21 518 852#define R_AARCH64_TLSLD_ADD_LO12_NC 519 853#define R_AARCH64_TLSLD_MOVW_G1 520 854#define R_AARCH64_TLSLD_MOVW_G0_NC 521 855#define R_AARCH64_TLSLD_LD_PREL19 522 856#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 857#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 858#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 859#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 860#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 861#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 862#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 863#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 864#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 865#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 866#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 867#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 868#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 869#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 870#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 871#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 872/* initial exec TLS relocations */ 873#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 874#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 875#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 876#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 877#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 878/* local exec TLS relocations */ 879#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 880#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 881#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 882#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 883#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 884#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 885#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 886#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 887#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 888#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 889#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 890#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 891#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 892#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 893#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 894#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 895/* Dynamic Relocations */ 896#define R_AARCH64_COPY 1024 897#define R_AARCH64_GLOB_DAT 1025 898#define R_AARCH64_JUMP_SLOT 1026 899#define R_AARCH64_RELATIVE 1027 900#define R_AARCH64_TLS_DTPREL64 1028 901#define R_AARCH64_TLS_DTPMOD64 1029 902#define R_AARCH64_TLS_TPREL64 1030 903#define R_AARCH64_TLS_DTPREL32 1031 904#define R_AARCH64_TLS_DTPMOD32 1032 905#define R_AARCH64_TLS_TPREL32 1033 906 907/* s390 relocations defined by the ABIs */ 908#define R_390_NONE 0 /* No reloc. */ 909#define R_390_8 1 /* Direct 8 bit. */ 910#define R_390_12 2 /* Direct 12 bit. */ 911#define R_390_16 3 /* Direct 16 bit. */ 912#define R_390_32 4 /* Direct 32 bit. */ 913#define R_390_PC32 5 /* PC relative 32 bit. */ 914#define R_390_GOT12 6 /* 12 bit GOT offset. */ 915#define R_390_GOT32 7 /* 32 bit GOT offset. */ 916#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ 917#define R_390_COPY 9 /* Copy symbol at runtime. */ 918#define R_390_GLOB_DAT 10 /* Create GOT entry. */ 919#define R_390_JMP_SLOT 11 /* Create PLT entry. */ 920#define R_390_RELATIVE 12 /* Adjust by program base. */ 921#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ 922#define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */ 923#define R_390_GOT16 15 /* 16 bit GOT offset. */ 924#define R_390_PC16 16 /* PC relative 16 bit. */ 925#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ 926#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ 927#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ 928#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ 929#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ 930#define R_390_64 22 /* Direct 64 bit. */ 931#define R_390_PC64 23 /* PC relative 64 bit. */ 932#define R_390_GOT64 24 /* 64 bit GOT offset. */ 933#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */ 934#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ 935#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ 936#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ 937#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ 938#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ 939#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ 940#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ 941#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ 942#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ 943#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ 944#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ 945#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ 946#define R_390_TLS_GDCALL 38 /* Tag for function call in general 947 dynamic TLS code. */ 948#define R_390_TLS_LDCALL 39 /* Tag for function call in local 949 dynamic TLS code. */ 950#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic 951 thread local data. */ 952#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic 953 thread local data. */ 954#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS 955 block offset. */ 956#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS 957 block offset. */ 958#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS 959 block offset. */ 960#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic 961 thread local data in LD code. */ 962#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic 963 thread local data in LD code. */ 964#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for 965 negated static TLS block offset. */ 966#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for 967 negated static TLS block offset. */ 968#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for 969 negated static TLS block offset. */ 970#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to 971 static TLS block. */ 972#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to 973 static TLS block. */ 974#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS 975 block. */ 976#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS 977 block. */ 978#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ 979#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ 980#define R_390_TLS_TPOFF 56 /* Negate offset in static TLS 981 block. */ 982#define R_390_20 57 983/* Keep this the last entry. */ 984#define R_390_NUM 58 985 986/* x86-64 relocation types */ 987#define R_X86_64_NONE 0 /* No reloc */ 988#define R_X86_64_64 1 /* Direct 64 bit */ 989#define R_X86_64_PC32 2 /* PC relative 32 bit signed */ 990#define R_X86_64_GOT32 3 /* 32 bit GOT entry */ 991#define R_X86_64_PLT32 4 /* 32 bit PLT address */ 992#define R_X86_64_COPY 5 /* Copy symbol at runtime */ 993#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ 994#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ 995#define R_X86_64_RELATIVE 8 /* Adjust by program base */ 996#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative 997 offset to GOT */ 998#define R_X86_64_32 10 /* Direct 32 bit zero extended */ 999#define R_X86_64_32S 11 /* Direct 32 bit sign extended */ 1000#define R_X86_64_16 12 /* Direct 16 bit zero extended */
1001#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ 1002#define R_X86_64_8 14 /* Direct 8 bit sign extended */ 1003#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ 1004 1005#define R_X86_64_NUM 16 1006 1007/* Legal values for e_flags field of Elf64_Ehdr. */ 1008 1009#define EF_ALPHA_32BIT 1 /* All addresses are below 2GB */ 1010 1011/* HPPA specific definitions. */ 1012 1013/* Legal values for e_flags field of Elf32_Ehdr. */ 1014 1015#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */ 1016#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */ 1017#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ 1018#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ 1019#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch 1020 prediction. */ 1021#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ 1022#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ 1023 1024/* Defined values for `e_flags & EF_PARISC_ARCH' are: */ 1025 1026#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */ 1027#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */ 1028#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */ 1029 1030/* Additional section indeces. */ 1031 1032#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared 1033 symbols in ANSI C. */ 1034#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ 1035 1036/* Legal values for sh_type field of Elf32_Shdr. */ 1037 1038#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */ 1039#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */ 1040#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */ 1041 1042/* Legal values for sh_flags field of Elf32_Shdr. */ 1043 1044#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */ 1045#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */ 1046#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */ 1047 1048/* Legal values for ST_TYPE subfield of st_info (symbol type). */ 1049 1050#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */ 1051 1052#define STT_HP_OPAQUE (STT_LOOS + 0x1) 1053#define STT_HP_STUB (STT_LOOS + 0x2) 1054 1055/* HPPA relocs. */ 1056 1057#define R_PARISC_NONE 0 /* No reloc. */ 1058#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */ 1059#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */ 1060#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */ 1061#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */ 1062#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */ 1063#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */ 1064#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */ 1065#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */ 1066#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */ 1067#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */ 1068#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */ 1069#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */ 1070#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */ 1071#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */ 1072#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */ 1073#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */ 1074#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */ 1075#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */ 1076#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */ 1077#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */ 1078#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */ 1079#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */ 1080#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */ 1081#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */ 1082#define R_PARISC_FPTR64 64 /* 64 bits function address. */ 1083#define R_PARISC_PLABEL32 65 /* 32 bits function address. */ 1084#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */ 1085#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */ 1086#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */ 1087#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */ 1088#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */ 1089#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */ 1090#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */ 1091#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */ 1092#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */ 1093#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */ 1094#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */ 1095#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */ 1096#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */ 1097#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */ 1098#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */ 1099#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */ 1100#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */ 1101#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */ 1102#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */ 1103#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */ 1104#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */ 1105#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */ 1106#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */ 1107#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */ 1108#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */ 1109#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */ 1110#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */ 1111#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */ 1112#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */ 1113#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */ 1114#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */ 1115#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */ 1116#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */ 1117#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */ 1118#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */ 1119#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */ 1120#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */ 1121#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */ 1122#define R_PARISC_LORESERVE 128 1123#define R_PARISC_COPY 128 /* Copy relocation. */ 1124#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */ 1125#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */ 1126#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */ 1127#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */ 1128#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */ 1129#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */ 1130#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/ 1131#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */ 1132#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */ 1133#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */ 1134#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */ 1135#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */ 1136#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */ 1137#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */ 1138#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */ 1139#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/ 1140#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/ 1141#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */ 1142#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */ 1143#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */ 1144#define R_PARISC_HIRESERVE 255 1145 1146/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */ 1147 1148#define PT_HP_TLS (PT_LOOS + 0x0) 1149#define PT_HP_CORE_NONE (PT_LOOS + 0x1) 1150#define PT_HP_CORE_VERSION (PT_LOOS + 0x2) 1151#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3) 1152#define PT_HP_CORE_COMM (PT_LOOS + 0x4) 1153#define PT_HP_CORE_PROC (PT_LOOS + 0x5) 1154#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6) 1155#define PT_HP_CORE_STACK (PT_LOOS + 0x7) 1156#define PT_HP_CORE_SHM (PT_LOOS + 0x8) 1157#define PT_HP_CORE_MMF (PT_LOOS + 0x9) 1158#define PT_HP_PARALLEL (PT_LOOS + 0x10) 1159#define PT_HP_FASTBIND (PT_LOOS + 0x11) 1160#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12) 1161#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13) 1162#define PT_HP_STACK (PT_LOOS + 0x14) 1163 1164#define PT_PARISC_ARCHEXT 0x70000000 1165#define PT_PARISC_UNWIND 0x70000001 1166 1167/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */ 1168 1169#define PF_PARISC_SBP 0x08000000 1170 1171#define PF_HP_PAGE_SIZE 0x00100000 1172#define PF_HP_FAR_SHARED 0x00200000 1173#define PF_HP_NEAR_SHARED 0x00400000 1174#define PF_HP_CODE 0x01000000 1175#define PF_HP_MODIFY 0x02000000 1176#define PF_HP_LAZYSWAP 0x04000000 1177#define PF_HP_SBP 0x08000000 1178 1179/* IA-64 specific declarations. */ 1180 1181/* Processor specific flags for the Ehdr e_flags field. */ 1182#define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */ 1183#define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */ 1184#define EF_IA_64_ARCH 0xff000000 /* arch. version mask */ 1185 1186/* Processor specific values for the Phdr p_type field. */ 1187#define PT_IA_64_ARCHEXT (PT_LOPROC + 0) /* arch extension bits */ 1188#define PT_IA_64_UNWIND (PT_LOPROC + 1) /* ia64 unwind bits */ 1189 1190/* Processor specific flags for the Phdr p_flags field. */ 1191#define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ 1192 1193/* Processor specific values for the Shdr sh_type field. */ 1194#define SHT_IA_64_EXT (SHT_LOPROC + 0) /* extension bits */ 1195#define SHT_IA_64_UNWIND (SHT_LOPROC + 1) /* unwind bits */ 1196 1197/* Processor specific flags for the Shdr sh_flags field. */ 1198#define SHF_IA_64_SHORT 0x10000000 /* section near gp */ 1199#define SHF_IA_64_NORECOV 0x20000000 /* spec insns w/o recovery */ 1200 1201/* Processor specific values for the Dyn d_tag field. */ 1202#define DT_IA_64_PLT_RESERVE (DT_LOPROC + 0) 1203#define DT_IA_64_NUM 1 1204 1205/* IA-64 relocations. */ 1206#define R_IA64_NONE 0x00 /* none */ 1207#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ 1208#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ 1209#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ 1210#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ 1211#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ 1212#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ 1213#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ 1214#define R_IA64_GPREL22 0x2a /* @gprel(sym + add), add imm22 */ 1215#define R_IA64_GPREL64I 0x2b /* @gprel(sym + add), mov imm64 */ 1216#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym + add), data4 MSB */ 1217#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym + add), data4 LSB */ 1218#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym + add), data8 MSB */ 1219#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym + add), data8 LSB */ 1220#define R_IA64_LTOFF22 0x32 /* @ltoff(sym + add), add imm22 */ 1221#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym + add), mov imm64 */ 1222#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym + add), add imm22 */ 1223#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym + add), mov imm64 */ 1224#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym + add), data8 MSB */ 1225#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym + add), data8 LSB */ 1226#define R_IA64_FPTR64I 0x43 /* @fptr(sym + add), mov imm64 */ 1227#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym + add), data4 MSB */ 1228#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym + add), data4 LSB */ 1229#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym + add), data8 MSB */ 1230#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym + add), data8 LSB */ 1231#define R_IA64_PCREL60B 0x48 /* @pcrel(sym + add), brl */ 1232#define R_IA64_PCREL21B 0x49 /* @pcrel(sym + add), ptb, call */ 1233#define R_IA64_PCREL21M 0x4a /* @pcrel(sym + add), chk.s */ 1234#define R_IA64_PCREL21F 0x4b /* @pcrel(sym + add), fchkf */ 1235#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym + add), data4 MSB */ 1236#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym + add), data4 LSB */ 1237#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym + add), data8 MSB */ 1238#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym + add), data8 LSB */ 1239#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ 1240#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ 1241#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), data4 MSB */ 1242#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), data4 LSB */ 1243#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), data8 MSB */ 1244#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), data8 LSB */ 1245#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym + add), data4 MSB */ 1246#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym + add), data4 LSB */ 1247#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym + add), data8 MSB */ 1248#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym + add), data8 LSB */ 1249#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym + add), data4 MSB */ 1250#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym + add), data4 LSB */ 1251#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym + add), data8 MSB */ 1252#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym + add), data8 LSB */ 1253#define R_IA64_REL32MSB 0x6c /* data 4 + REL */ 1254#define R_IA64_REL32LSB 0x6d /* data 4 + REL */ 1255#define R_IA64_REL64MSB 0x6e /* data 8 + REL */ 1256#define R_IA64_REL64LSB 0x6f /* data 8 + REL */ 1257#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ 1258#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ 1259#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ 1260#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ 1261#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */ 1262#define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */ 1263#define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */ 1264#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ 1265#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ 1266#define R_IA64_COPY 0x84 /* copy relocation */ 1267#define R_IA64_SUB 0x85 /* Addend and symbol difference */ 1268#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ 1269#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ 1270#define R_IA64_TPREL14 0x91 /* @tprel(sym + add), imm14 */ 1271#define R_IA64_TPREL22 0x92 /* @tprel(sym + add), imm22 */ 1272#define R_IA64_TPREL64I 0x93 /* @tprel(sym + add), imm64 */ 1273#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym + add), data8 MSB */ 1274#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym + add), data8 LSB */ 1275#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), imm2 */ 1276#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym + add), data8 MSB */ 1277#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym + add), data8 LSB */ 1278#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(sym + add)), imm22 */ 1279#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym + add), imm14 */ 1280#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym + add), imm22 */ 1281#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym + add), imm64 */ 1282#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym + add), data4 MSB */ 1283#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym + add), data4 LSB */ 1284#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym + add), data8 MSB */ 1285#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym + add), data8 LSB */ 1286#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ 1287 1288typedef struct elf32_rel { 1289 Elf32_Addr r_offset; 1290 Elf32_Word r_info; 1291} Elf32_Rel; 1292 1293typedef struct elf64_rel { 1294 Elf64_Addr r_offset; /* Location at which to apply the action */ 1295 Elf64_Xword r_info; /* index and type of relocation */ 1296} Elf64_Rel; 1297 1298typedef struct elf32_rela{ 1299 Elf32_Addr r_offset; 1300 Elf32_Word r_info; 1301 Elf32_Sword r_addend; 1302} Elf32_Rela; 1303 1304typedef struct elf64_rela { 1305 Elf64_Addr r_offset; /* Location at which to apply the action */ 1306 Elf64_Xword r_info; /* index and type of relocation */ 1307 Elf64_Sxword r_addend; /* Constant addend used to compute value */ 1308} Elf64_Rela; 1309 1310typedef struct elf32_sym{ 1311 Elf32_Word st_name; 1312 Elf32_Addr st_value; 1313 Elf32_Word st_size; 1314 unsigned char st_info; 1315 unsigned char st_other; 1316 Elf32_Half st_shndx; 1317} Elf32_Sym; 1318 1319typedef struct elf64_sym { 1320 Elf64_Word st_name; /* Symbol name, index in string tbl */ 1321 unsigned char st_info; /* Type and binding attributes */ 1322 unsigned char st_other; /* No defined meaning, 0 */ 1323 Elf64_Half st_shndx; /* Associated section index */ 1324 Elf64_Addr st_value; /* Value of the symbol */ 1325 Elf64_Xword st_size; /* Associated symbol size */ 1326} Elf64_Sym; 1327 1328 1329#define EI_NIDENT 16 1330 1331/* Special value for e_phnum. This indicates that the real number of 1332 program headers is too large to fit into e_phnum. Instead the real 1333 value is in the field sh_info of section 0. */ 1334#define PN_XNUM 0xffff 1335 1336typedef struct elf32_hdr{ 1337 unsigned char e_ident[EI_NIDENT]; 1338 Elf32_Half e_type; 1339 Elf32_Half e_machine; 1340 Elf32_Word e_version; 1341 Elf32_Addr e_entry; /* Entry point */ 1342 Elf32_Off e_phoff; 1343 Elf32_Off e_shoff; 1344 Elf32_Word e_flags; 1345 Elf32_Half e_ehsize; 1346 Elf32_Half e_phentsize; 1347 Elf32_Half e_phnum; 1348 Elf32_Half e_shentsize; 1349 Elf32_Half e_shnum; 1350 Elf32_Half e_shstrndx; 1351} Elf32_Ehdr; 1352 1353typedef struct elf64_hdr { 1354 unsigned char e_ident[16]; /* ELF "magic number" */ 1355 Elf64_Half e_type; 1356 Elf64_Half e_machine; 1357 Elf64_Word e_version; 1358 Elf64_Addr e_entry; /* Entry point virtual address */ 1359 Elf64_Off e_phoff; /* Program header table file offset */ 1360 Elf64_Off e_shoff; /* Section header table file offset */ 1361 Elf64_Word e_flags; 1362 Elf64_Half e_ehsize; 1363 Elf64_Half e_phentsize; 1364 Elf64_Half e_phnum; 1365 Elf64_Half e_shentsize; 1366 Elf64_Half e_shnum; 1367 Elf64_Half e_shstrndx; 1368} Elf64_Ehdr; 1369 1370/* These constants define the permissions on sections in the program 1371 header, p_flags. */ 1372#define PF_R 0x4 1373#define PF_W 0x2 1374#define PF_X 0x1 1375 1376typedef struct elf32_phdr{ 1377 Elf32_Word p_type; 1378 Elf32_Off p_offset; 1379 Elf32_Addr p_vaddr; 1380 Elf32_Addr p_paddr; 1381 Elf32_Word p_filesz; 1382 Elf32_Word p_memsz; 1383 Elf32_Word p_flags; 1384 Elf32_Word p_align; 1385} Elf32_Phdr; 1386 1387typedef struct elf64_phdr { 1388 Elf64_Word p_type; 1389 Elf64_Word p_flags; 1390 Elf64_Off p_offset; /* Segment file offset */ 1391 Elf64_Addr p_vaddr; /* Segment virtual address */ 1392 Elf64_Addr p_paddr; /* Segment physical address */ 1393 Elf64_Xword p_filesz; /* Segment size in file */ 1394 Elf64_Xword p_memsz; /* Segment size in memory */ 1395 Elf64_Xword p_align; /* Segment alignment, file & memory */ 1396} Elf64_Phdr; 1397 1398/* sh_type */ 1399#define SHT_NULL 0 1400#define SHT_PROGBITS 1 1401#define SHT_SYMTAB 2 1402#define SHT_STRTAB 3 1403#define SHT_RELA 4 1404#define SHT_HASH 5 1405#define SHT_DYNAMIC 6 1406#define SHT_NOTE 7 1407#define SHT_NOBITS 8 1408#define SHT_REL 9 1409#define SHT_SHLIB 10 1410#define SHT_DYNSYM 11 1411#define SHT_NUM 12 1412#define SHT_LOPROC 0x70000000 1413#define SHT_HIPROC 0x7fffffff 1414#define SHT_LOUSER 0x80000000 1415#define SHT_HIUSER 0xffffffff 1416#define SHT_MIPS_LIST 0x70000000 1417#define SHT_MIPS_CONFLICT 0x70000002 1418#define SHT_MIPS_GPTAB 0x70000003 1419#define SHT_MIPS_UCODE 0x70000004 1420 1421/* sh_flags */ 1422#define SHF_WRITE 0x1 1423#define SHF_ALLOC 0x2 1424#define SHF_EXECINSTR 0x4 1425#define SHF_MASKPROC 0xf0000000 1426#define SHF_MIPS_GPREL 0x10000000 1427 1428/* special section indexes */ 1429#define SHN_UNDEF 0 1430#define SHN_LORESERVE 0xff00 1431#define SHN_LOPROC 0xff00 1432#define SHN_HIPROC 0xff1f 1433#define SHN_ABS 0xfff1 1434#define SHN_COMMON 0xfff2 1435#define SHN_HIRESERVE 0xffff 1436#define SHN_MIPS_ACCOMON 0xff00 1437 1438typedef struct elf32_shdr { 1439 Elf32_Word sh_name; 1440 Elf32_Word sh_type; 1441 Elf32_Word sh_flags; 1442 Elf32_Addr sh_addr; 1443 Elf32_Off sh_offset; 1444 Elf32_Word sh_size; 1445 Elf32_Word sh_link; 1446 Elf32_Word sh_info; 1447 Elf32_Word sh_addralign; 1448 Elf32_Word sh_entsize; 1449} Elf32_Shdr; 1450 1451typedef struct elf64_shdr { 1452 Elf64_Word sh_name; /* Section name, index in string tbl */ 1453 Elf64_Word sh_type; /* Type of section */ 1454 Elf64_Xword sh_flags; /* Miscellaneous section attributes */ 1455 Elf64_Addr sh_addr; /* Section virtual addr at execution */ 1456 Elf64_Off sh_offset; /* Section file offset */ 1457 Elf64_Xword sh_size; /* Size of section in bytes */ 1458 Elf64_Word sh_link; /* Index of another section */ 1459 Elf64_Word sh_info; /* Additional section information */ 1460 Elf64_Xword sh_addralign; /* Section alignment */ 1461 Elf64_Xword sh_entsize; /* Entry size if section holds table */ 1462} Elf64_Shdr; 1463 1464#define EI_MAG0 0 /* e_ident[] indexes */ 1465#define EI_MAG1 1 1466#define EI_MAG2 2 1467#define EI_MAG3 3 1468#define EI_CLASS 4 1469#define EI_DATA 5 1470#define EI_VERSION 6 1471#define EI_OSABI 7 1472#define EI_PAD 8 1473 1474#define ELFOSABI_NONE 0 /* UNIX System V ABI */ 1475#define ELFOSABI_SYSV 0 /* Alias. */ 1476#define ELFOSABI_HPUX 1 /* HP-UX */ 1477#define ELFOSABI_NETBSD 2 /* NetBSD. */ 1478#define ELFOSABI_LINUX 3 /* Linux. */ 1479#define ELFOSABI_SOLARIS 6 /* Sun Solaris. */ 1480#define ELFOSABI_AIX 7 /* IBM AIX. */ 1481#define ELFOSABI_IRIX 8 /* SGI Irix. */ 1482#define ELFOSABI_FREEBSD 9 /* FreeBSD. */ 1483#define ELFOSABI_TRU64 10 /* Compaq TRU64 UNIX. */ 1484#define ELFOSABI_MODESTO 11 /* Novell Modesto. */ 1485#define ELFOSABI_OPENBSD 12 /* OpenBSD. */ 1486#define ELFOSABI_ARM_FDPIC 65 /* ARM FDPIC */ 1487#define ELFOSABI_ARM 97 /* ARM */ 1488#define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ 1489 1490#define ELFMAG0 0x7f /* EI_MAG */ 1491#define ELFMAG1 'E' 1492#define ELFMAG2 'L' 1493#define ELFMAG3 'F' 1494#define ELFMAG "\177ELF" 1495#define SELFMAG 4 1496 1497#define ELFCLASSNONE 0 /* EI_CLASS */ 1498#define ELFCLASS32 1 1499#define ELFCLASS64 2 1500#define ELFCLASSNUM 3 1501 1502#define ELFDATANONE 0 /* e_ident[EI_DATA] */ 1503#define ELFDATA2LSB 1 1504#define ELFDATA2MSB 2 1505 1506#define EV_NONE 0 /* e_version, EI_VERSION */ 1507#define EV_CURRENT 1 1508#define EV_NUM 2 1509 1510/* Notes used in ET_CORE */ 1511#define NT_PRSTATUS 1 1512#define NT_FPREGSET 2 1513#define NT_PRFPREG 2 1514#define NT_PRPSINFO 3 1515#define NT_TASKSTRUCT 4 1516#define NT_AUXV 6 1517#define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */ 1518#define NT_S390_GS_CB 0x30b /* s390 guarded storage registers */ 1519#define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */ 1520#define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 (lower half) */ 1521#define NT_S390_PREFIX 0x305 /* s390 prefix register */ 1522#define NT_S390_CTRS 0x304 /* s390 control registers */ 1523#define NT_S390_TODPREG 0x303 /* s390 TOD programmable register */ 1524#define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */ 1525#define NT_S390_TIMER 0x301 /* s390 timer register */ 1526#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */ 1527#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */ 1528#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ 1529#define NT_ARM_VFP 0x400 /* ARM VFP/NEON registers */ 1530#define NT_ARM_TLS 0x401 /* ARM TLS register */ 1531#define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */ 1532#define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */ 1533#define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */ 1534 1535 1536/* Note header in a PT_NOTE section */ 1537typedef struct elf32_note { 1538 Elf32_Word n_namesz; /* Name size */ 1539 Elf32_Word n_descsz; /* Content size */ 1540 Elf32_Word n_type; /* Content type */ 1541} Elf32_Nhdr; 1542 1543/* Note header in a PT_NOTE section */ 1544typedef struct elf64_note { 1545 Elf64_Word n_namesz; /* Name size */ 1546 Elf64_Word n_descsz; /* Content size */ 1547 Elf64_Word n_type; /* Content type */ 1548} Elf64_Nhdr; 1549 1550 1551/* This data structure represents a PT_LOAD segment. */ 1552struct elf32_fdpic_loadseg { 1553 /* Core address to which the segment is mapped. */ 1554 Elf32_Addr addr; 1555 /* VMA recorded in the program header. */ 1556 Elf32_Addr p_vaddr; 1557 /* Size of this segment in memory. */ 1558 Elf32_Word p_memsz; 1559}; 1560struct elf32_fdpic_loadmap { 1561 /* Protocol version number, must be zero. */ 1562 Elf32_Half version; 1563 /* Number of segments in this map. */ 1564 Elf32_Half nsegs; 1565 /* The actual memory map. */ 1566 struct elf32_fdpic_loadseg segs[/*nsegs*/]; 1567}; 1568 1569#ifdef ELF_CLASS 1570#if ELF_CLASS == ELFCLASS32 1571 1572#define elfhdr elf32_hdr 1573#define elf_phdr elf32_phdr 1574#define elf_note elf32_note 1575#define elf_shdr elf32_shdr 1576#define elf_sym elf32_sym 1577#define elf_addr_t Elf32_Off 1578#define elf_rela elf32_rela 1579 1580#ifdef ELF_USES_RELOCA 1581# define ELF_RELOC Elf32_Rela 1582#else 1583# define ELF_RELOC Elf32_Rel 1584#endif 1585 1586#else 1587 1588#define elfhdr elf64_hdr 1589#define elf_phdr elf64_phdr 1590#define elf_note elf64_note 1591#define elf_shdr elf64_shdr 1592#define elf_sym elf64_sym 1593#define elf_addr_t Elf64_Off 1594#define elf_rela elf64_rela 1595 1596#ifdef ELF_USES_RELOCA 1597# define ELF_RELOC Elf64_Rela 1598#else 1599# define ELF_RELOC Elf64_Rel 1600#endif 1601 1602#endif /* ELF_CLASS */ 1603 1604#ifndef ElfW 1605# if ELF_CLASS == ELFCLASS32 1606# define ElfW(x) Elf32_ ## x 1607# define ELFW(x) ELF32_ ## x 1608# else 1609# define ElfW(x) Elf64_ ## x 1610# define ELFW(x) ELF64_ ## x 1611# endif 1612#endif 1613 1614#endif /* ELF_CLASS */ 1615 1616 1617#endif /* QEMU_ELF_H */ 1618